Searched refs:UADDO (Results 1 - 24 of 24) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h252 SADDO, UADDO, enumerator in enum:llvm::ISD::NodeType
H A DTargetLowering.h2254 case ISD::UADDO:
2583 if (Opcode != ISD::UADDO)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h99 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY,
H A DSystemZISelLowering.cpp178 setOperationAction(ISD::UADDO, VT, Custom);
3593 // Lower SADDO/SSUBO/UADDO/USUBO nodes.
3616 case ISD::UADDO:
3617 BaseOp = SystemZISD::UADDO;
3641 return Carry.getOpcode() == ISD::UADDO;
5137 case ISD::UADDO:
5325 OPCODE(UADDO);
H A DSystemZISelDAGToDAG.cpp1361 case SystemZISD::UADDO:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp143 case ISD::UADDO:
1086 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB;
1913 case ISD::UADDO:
2282 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps);
2319 ISD::UADDO : ISD::USUBO,
2329 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps);
2448 case ISD::UADDO:
3577 SDValue Five = DAG.getNode(ISD::UADDO, dl, VTFullAddO, Three, Four);
H A DSelectionDAGDumper.cpp293 case ISD::UADDO: return "uaddo";
H A DLegalizeVectorOps.cpp449 case ISD::UADDO:
934 case ISD::UADDO:
H A DDAGCombiner.cpp1516 case ISD::UADDO: return visitADDO(N);
2263 N0.getOpcode() == ISD::UADDO ||
2397 V.getOpcode() != ISD::UADDO && V.getOpcode() != ISD::USUBO)
2707 TLI.isOperationLegalOrCustom(ISD::UADDO, N->getValueType(0)))
2708 return DAG.getNode(ISD::UADDO, DL, N->getVTList(), N0, N1);
2758 if (Carry1.getOpcode() != ISD::UADDO)
2770 } else if (Carry0.getOpcode() == ISD::UADDO &&
2852 if (Opcode != ISD::UADDO && Opcode != ISD::USUBO)
2872 unsigned NewOp = Opcode == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY;
2889 // Please note that because we have proven that the result of the UADDO/USUB
[all...]
H A DLegalizeVectorTypes.cpp156 case ISD::UADDO:
951 case ISD::UADDO:
2762 case ISD::UADDO:
H A DTargetLowering.cpp7124 OverflowOp = ISD::UADDO;
7401 bool IsAdd = Node->getOpcode() == ISD::UADDO;
H A DSelectionDAG.cpp3143 case ISD::UADDO:
3729 case ISD::UADDO:
9325 assert((Opcode == ISD::UADDO || Opcode == ISD::SADDO ||
H A DLegalizeDAG.cpp3490 case ISD::UADDO:
H A DSelectionDAGBuilder.cpp6636 case Intrinsic::uadd_with_overflow: Op = ISD::UADDO; break;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp2136 { ISD::UADDO, MVT::i64, 1 },
2151 { ISD::UADDO, MVT::i32, 1 },
2152 { ISD::UADDO, MVT::i16, 1 },
2153 { ISD::UADDO, MVT::i8, 1 },
2200 ISD = ISD::UADDO;
H A DX86ISelLowering.cpp1928 setOperationAction(ISD::UADDO, VT, Custom);
21976 case ISD::UADDO:
22277 CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO ||
22830 Cond.getOperand(0).getOpcode() == ISD::UADDO ||
22876 // e.g. SADDO, UADDO.
22884 if (CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO ||
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1396 setOperationAction(ISD::UADDO, VT, Custom);
1476 ISD::UADDO, ISD::SSUBO, ISD::USUBO, ISD::SMUL_LOHI, ISD::UMUL_LOHI,
2819 if (Opc == ISD::UADDO) {
2913 case ISD::UADDO:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp774 case ISD::UADDO:
1077 unsigned Opc = N->getOpcode() == ISD::UADDO ?
H A DR600ISelLowering.cpp179 setOperationAction(ISD::UADDO, MVT::i32, Custom);
485 case ISD::UADDO: return LowerUADDSUBO(Op, DAG, ISD::ADD, AMDGPUISD::CARRY);
H A DSIISelLowering.cpp244 setOperationAction(ISD::UADDO, MVT::i32, Legal);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp667 setOperationAction(ISD::UADDO, VT, Expand);
H A DCodeGenPrepare.cpp1276 if (!TLI->shouldFormOverflowOp(ISD::UADDO,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1042 setOperationAction(ISD::UADDO, MVT::i32, Custom);
4419 case ISD::UADDO:
4530 case ISD::UADDO:
4587 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
5222 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
5273 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
9357 case ISD::UADDO:
16475 !isOperationLegalOrCustom(ISD::UADDO, HalfT))
16489 Lo = DAG.getNode(ISD::UADDO, dl, VTList, Tmp, Lo);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp375 setOperationAction(ISD::UADDO, MVT::i32, Custom);
376 setOperationAction(ISD::UADDO, MVT::i64, Custom);
2221 case ISD::UADDO:
2339 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
3190 case ISD::UADDO:

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