/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 514 /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded 517 SHL_PARTS, SRA_PARTS, SRL_PARTS, enumerator in enum:llvm::ISD::NodeType
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 98 setOperationAction(ISD::SRA_PARTS, VT, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 302 case ISD::SRA_PARTS: return "sra_parts";
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H A D | LegalizeDAG.cpp | 1201 case ISD::SRA_PARTS:
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H A D | LegalizeIntegerTypes.cpp | 3345 PartsOpc = ISD::SRA_PARTS;
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H A D | SelectionDAG.cpp | 7450 case ISD::SRA_PARTS:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 412 setOperationAction(ISD::SRA_PARTS, MVT::i32 , Custom); 415 setOperationAction(ISD::SRA_PARTS, MVT::i64 , Custom); 1957 /// LowerShiftRightParts - Lower SRL_PARTS, SRA_PARTS, which 1965 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); 1973 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; 2197 case ISD::SRA_PARTS:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 116 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand); 117 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 223 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); 483 case ISD::SRA_PARTS: 837 const bool SRA = Op.getOpcode() == ISD::SRA_PARTS;
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H A D | SIISelLowering.cpp | 251 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 123 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 149 setOperationAction(ISD::SRA_PARTS, XLenVT, Custom); 414 case ISD::SRA_PARTS:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 377 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); 383 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); 1239 case ISD::SRA_PARTS: return lowerShiftRightParts(Op, DAG, true);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 88 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 114 ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, ISD::SRA_PARTS,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 103 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1644 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); 1678 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 242 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); 3236 case ISD::SRA_PARTS: 5878 /// LowerShiftRightParts - Lower SRA_PARTS, which returns two 5889 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; 5891 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1430 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1071 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); 1086 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); 5844 /// LowerShiftRightParts - Lower SRA_PARTS, which returns two 5857 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; 5859 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); 9329 case ISD::SRA_PARTS: return LowerShiftRightParts(Op, DAG);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 570 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); 575 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom); 10495 case ISD::SRA_PARTS: return LowerSRA_PARTS(Op, DAG);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 287 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 448 setOperationAction(ISD::SRA_PARTS, VT, Custom); 18478 /// Lower SRA_PARTS and friends, which return two i32 values 18486 bool isSRA = Op.getOpcode() == ISD::SRA_PARTS; [all...] |