/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 514 /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded 517 SHL_PARTS, SRA_PARTS, SRL_PARTS, enumerator in enum:llvm::ISD::NodeType
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 121 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); 194 case ISD::SHL_PARTS:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 96 setOperationAction(ISD::SHL_PARTS, VT, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 301 case ISD::SHL_PARTS: return "shl_parts";
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H A D | LegalizeDAG.cpp | 1202 case ISD::SHL_PARTS: {
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H A D | LegalizeIntegerTypes.cpp | 3340 PartsOpc = ISD::SHL_PARTS; 3348 // Next check to see if the target supports this SHL_PARTS operation or if it 3349 // will custom expand it. Don't lower this to SHL_PARTS when we optimise for 3365 // the new SHL_PARTS operation would need further legalization.
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H A D | SelectionDAG.cpp | 7452 case ISD::SHL_PARTS:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 112 setOperationAction(ISD::SHL_PARTS, MVT::i8, Expand); 113 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 411 setOperationAction(ISD::SHL_PARTS, MVT::i32 , Custom); 414 setOperationAction(ISD::SHL_PARTS, MVT::i64 , Custom); 2018 /// LowerShiftLeftParts - Lower SHL_PARTS, which 2026 assert(Op.getOpcode() == ISD::SHL_PARTS); 2195 case ISD::SHL_PARTS:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 221 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); 482 case ISD::SHL_PARTS: return LowerSHLParts(Op, DAG);
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H A D | SIISelLowering.cpp | 250 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 147 setOperationAction(ISD::SHL_PARTS, XLenVT, Custom); 412 case ISD::SHL_PARTS:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 376 setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); 382 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); 1238 case ISD::SHL_PARTS: return lowerShiftLeftParts(Op, DAG);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 87 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 114 ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, ISD::SRA_PARTS,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 102 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1643 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); 1677 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1430 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 241 setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); 3233 case ISD::SHL_PARTS: 5935 /// LowerShiftLeftParts - Lower SHL_PARTS, which returns two 5947 assert(Op.getOpcode() == ISD::SHL_PARTS);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 569 setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); 574 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); 10493 case ISD::SHL_PARTS: return LowerSHL_PARTS(Op, DAG);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1070 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); 1085 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); 5888 /// LowerShiftLeftParts - Lower SHL_PARTS, which returns two 5902 assert(Op.getOpcode() == ISD::SHL_PARTS); 9327 case ISD::SHL_PARTS: return LowerShiftLeftParts(Op, DAG);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 286 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 447 setOperationAction(ISD::SHL_PARTS, VT, Custom); 18500 if (Op.getOpcode() == ISD::SHL_PARTS) { 18517 if (Op.getOpcode() == ISD::SHL_PARTS) { [all...] |