Searched refs:SETULE (Results 1 - 16 of 16) sorted by relevance

/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/CodeGen/
H A DISDOpcodes.h720 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
739 SETULE, // 1 1 0 1 True if unordered, less than, or equal enumerator in enum:llvm::ISD::CondCode
764 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/
H A DAnalysis.cpp167 case FCmpInst::FCMP_ULE: return ISD::SETULE;
179 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE;
194 case ICmpInst::ICMP_ULE: return ISD::SETULE;
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp2088 case ISD::SETULE:
2110 case ISD::SETULE: {
2249 if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
2263 if ((Cond == ISD::SETLE || Cond == ISD::SETULE) && C1 == MaxVal)
2350 Cond == ISD::SETULE || Cond == ISD::SETUGT) {
2351 bool AdjOne = (Cond == ISD::SETULE || Cond == ISD::SETUGT);
2362 NewCond = (Cond == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
2420 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE);
2638 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> ~X | Y
H A DSelectionDAGDumper.cpp301 case ISD::SETULE: return "setule";
H A DLegalizeIntegerTypes.cpp829 case ISD::SETULE:
2541 case ISD::SETULE: LowCC = ISD::SETULE; break;
2571 CCCode == ISD::SETUGE || CCCode == ISD::SETULE)) ||
H A DSelectionDAG.cpp277 case ISD::SETULE:
326 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
1604 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1658 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
H A DLegalizeFloatTypes.cpp669 case ISD::SETULE:
H A DSelectionDAGBuilder.cpp1617 ISD::SETULE);
1622 DAG.getConstant(High-Low, VT), ISD::SETULE);
H A DLegalizeDAG.cpp1628 case ISD::SETULE:
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp574 case ISD::SETULE:
608 case ISD::SETULE:
609 case ISD::SETLE: Invert = true; return 1; // !Bit #1 = SETULE
738 // We already got the bit for the first part of the comparison (e.g. SETULE).
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/
H A DSparcISelLowering.cpp659 case ISD::SETULE: return SPCC::ICC_LEU;
683 case ISD::SETULE: return SPCC::FCC_ULE;
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/
H A DARMISelLowering.cpp1099 case ISD::SETULE: return ARMCC::LS;
1126 case ISD::SETULE: CondCode = ARMCC::LE; break;
2795 CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT;
2806 case ISD::SETULE:
2809 CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
3623 case ISD::SETULE: Invert = true; Opc = ARMISD::VCGT; break;
3657 case ISD::SETULE: Swap = true;
8888 case ISD::SETULE:
8892 IsUnordered = (CC == ISD::SETULT || CC == ISD::SETULE);
8898 if ((CC == ISD::SETLE || CC == ISD::SETOLE || CC == ISD::SETULE)
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp687 case ISD::SETULE:
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/
H A DX86ISelLowering.cpp3115 case ISD::SETULE: return X86::COND_BE;
3159 case ISD::SETULE:
8912 case ISD::SETULE: Swap = true; // Fallthrough
8966 case ISD::SETULE: Opc = X86ISD::PCMPGT; FlipSigns = true; Invert = true; break;
14071 case ISD::SETULE:
14163 case ISD::SETULE:
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/
H A DSPUISelLowering.cpp2606 case ISD::SETULE:
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/
H A DMipsISelLowering.cpp587 case ISD::SETULE: return Mips::FCOND_ULE;

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