/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 1043 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. 1069 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator in enum:llvm::ISD::CondCode 1081 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | Analysis.cpp | 230 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; 244 case ICmpInst::ICMP_SGE: return ISD::SETGE;
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H A D | TargetLoweringBase.cpp | 546 CCs[RTLIB::OGE_F32] = ISD::SETGE; 547 CCs[RTLIB::OGE_F64] = ISD::SETGE; 548 CCs[RTLIB::OGE_F128] = ISD::SETGE; 549 CCs[RTLIB::OGE_PPCF128] = ISD::SETGE;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 689 SET_NEWCC(SETGE, JSGE); 703 CC == ISD::SETGE ||
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInsertSkips.cpp | 204 case ISD::SETGE:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 430 case ISD::SETGE: 456 CC = ISD::SETGE; 481 CC = ISD::SETGE; 500 CC = ISD::SETGE;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86IntrinsicsInfo.h | 1002 X86_INTRINSIC_DATA(sse_comige_ss, COMI, X86ISD::COMI, ISD::SETGE), 1019 X86_INTRINSIC_DATA(sse_ucomige_ss, COMI, X86ISD::UCOMI, ISD::SETGE), 1026 X86_INTRINSIC_DATA(sse2_comige_sd, COMI, X86ISD::COMI, ISD::SETGE), 1073 X86_INTRINSIC_DATA(sse2_ucomige_sd, COMI, X86ISD::UCOMI, ISD::SETGE),
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 2943 case ISD::SETGE: { 2984 // Handle SETLT -1 (which is equivalent to SETGE 0). 3127 case ISD::SETGE: { 3286 case ISD::SETGE: { 3445 case ISD::SETGE: { 3799 case ISD::SETGE: 3826 case ISD::SETGE: 3880 case ISD::SETGE: 3905 case ISD::SETGE: Invert = true; return 0; // !Bit #0 = SETUGE 3933 case ISD::SETLE: CC = ISD::SETGE; Swa [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 202 { RTLIB::OGE_F64, "__mspabi_cmpd", ISD::SETGE }, 208 { RTLIB::OGE_F32, "__mspabi_cmpf", ISD::SETGE }, 1097 case ISD::SETGE:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 805 // For integer, only the SETEQ, SETNE, SETLT, SETLE, SETGT, SETGE, SETULT, 840 case ISD::SETGE: 1270 SetCC = DAG.getSetCC(dl, MVT::i32, ExtraShAmt, Zero, ISD::SETGE);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 1398 case ISD::SETGE: 3218 SDValue HLPos = DAG.getSetCC(dl, BoolNVT, ResultHL, NVTZero, ISD::SETGE); 3279 SDValue LHSSign = DAG.getSetCC(dl, OType, LHS, Zero, ISD::SETGE); 3280 SDValue RHSSign = DAG.getSetCC(dl, OType, RHS, Zero, ISD::SETGE); 3285 SDValue SumSign = DAG.getSetCC(dl, OType, Sum, Zero, ISD::SETGE); 3863 case ISD::SETGE: 3895 bool EqAllowed = (CCCode == ISD::SETLE || CCCode == ISD::SETGE || 3929 case ISD::SETLE: CCCode = ISD::SETGE; FlipOperands = true; break;
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H A D | SelectionDAGDumper.cpp | 426 case ISD::SETGE: return "setge";
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H A D | TargetLowering.cpp | 323 case ISD::SETGE: 3379 case ISD::SETGE: 3571 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 3579 ISD::CondCode NewCC = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; 3973 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> ~X | Y
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H A D | SelectionDAG.cpp | 392 case ISD::SETGE: return 1; 2068 case ISD::SETGE: return getBoolConstant(C1.sge(C2), dl, VT, OpVT); 2107 case ISD::SETGE: if (R==APFloat::cmpUnordered)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 59 case ISD::SETGE:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 364 setCondCodeAction(ISD::SETGE, Ty, Expand); 404 setCondCodeAction(ISD::SETGE, Ty, Expand); 959 case ISD::SETGE: return IsV216;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 161 ISD::SETGE, ISD::SETNE}; 382 case ISD::SETGE:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1839 case ISD::SETGE: return ARMCC::GE; 1859 case ISD::SETGE: 4226 case ISD::SETGE: 4242 CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; 4653 CC == ISD::SETULE || CC == ISD::SETGE || CC == ISD::SETLE) 4725 return CC == ISD::SETGT || CC == ISD::SETGE; 5870 ISD::SETGE, ARMcc, DAG, dl); 5880 ISD::SETGE, ARMcc, DAG, dl); 5913 ISD::SETGE, ARMcc, DAG, dl); 5918 ISD::SETGE, ARMc [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 117 setCondCodeAction(ISD::SETGE, T, Expand);
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H A D | HexagonISelLowering.cpp | 1566 setCondCodeAction(ISD::SETGE, VT, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 2009 ISD::SETGE); 2069 ISD::SETGE);
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H A D | NVPTXISelDAGToDAG.cpp | 575 case ISD::SETGE:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1372 case ISD::SETGE: return SPCC::ICC_GE; 1395 case ISD::SETGE:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1530 case ISD::SETGE: 1563 case ISD::SETGE: 2086 case ISD::SETGE: 2112 CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; 5913 Cmp = emitComparison(ExtraShAmt, DAG.getConstant(0, dl, MVT::i64), ISD::SETGE, 5969 Cmp = emitComparison(ExtraShAmt, DAG.getConstant(0, dl, MVT::i64), ISD::SETGE,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2502 else if (Cond == ISD::SETGE || Cond == ISD::SETUGE) 2672 case ISD::SETGE:
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