Searched refs:bw (Results 51 - 75 of 389) sorted by relevance

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/linux-master/drivers/net/wireless/mediatek/mt76/mt7921/
H A Dmcu.h23 u8 bw; member in struct:mt7921_mcu_tx_done_event
/linux-master/drivers/media/dvb-frontends/
H A Dl64781.c127 int bw; local
131 bw = 8;
134 bw = 7;
137 bw = 6;
179 ddfs_offset_fixed = 0x4000-(ppm<<16)/bw/1000000;
183 bw & 0xFFFFFF);
189 spi_bias *= bw;
H A Dmt352.c104 u32 bw,value; local
108 bw = 6;
111 bw = 7;
115 bw = 8;
121 value = 64 * bw * (1<<16) / (7 * 8);
123 dprintk("%s: bw %d, adc_clock %d => 0x%x\n",
124 __func__, bw, adc_clock, value);
H A Dtda10048.c328 u32 bw)
339 t = bw * 10;
358 u32 bw)
373 do_div(t, bw);
384 u32 bw)
387 dprintk(1, "%s(bw=%d)\n", __func__, bw);
390 switch (bw) {
394 tda10048_set_wref(fe, state->sample_freq, bw);
395 tda10048_set_invwref(fe, state->sample_freq, bw);
327 tda10048_set_wref(struct dvb_frontend *fe, u32 sample_freq_hz, u32 bw) argument
357 tda10048_set_invwref(struct dvb_frontend *fe, u32 sample_freq_hz, u32 bw) argument
383 tda10048_set_bandwidth(struct dvb_frontend *fe, u32 bw) argument
407 tda10048_set_if(struct dvb_frontend *fe, u32 bw) argument
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H A Ddib7000m.h18 struct dibx000_bandwidth_config *bw; member in struct:dib7000m_config
/linux-master/net/mac80211/
H A Dvht.c511 enum ieee80211_sta_rx_bandwidth bw; local
521 bw = ieee80211_sta_cap_rx_bw(link_sta);
522 bw = min(bw, link_sta->cur_max_bandwidth);
537 bw = min(bw, ieee80211_chan_width_to_rx_bw(sta->tdls_chandef.width));
539 bw = min(bw, ieee80211_chan_width_to_rx_bw(bss_width));
541 return bw;
694 sta_opmode.bw
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H A Dairtime.c408 int bw, streams; local
412 switch (status->bw) {
414 bw = BW_20;
417 bw = BW_40;
420 bw = BW_80;
423 bw = BW_160;
434 group = VHT_GROUP_IDX(streams, sgi, bw);
439 group = HT_GROUP_IDX(streams, sgi, bw);
444 group = HE_GROUP_IDX(streams, status->he_gi, bw);
516 stat->bw
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/linux-master/drivers/net/wireless/intel/iwlwifi/mvm/
H A Drs.h157 u32 bw; member in struct:rs_rate
198 #define is_ht20(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_20)
199 #define is_ht40(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_40)
200 #define is_ht80(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_80)
201 #define is_ht160(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_160)
/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clk_mgr.c227 if (context->bw_ctx.bw.dce.dispclk_khz >
237 < context->bw_ctx.bw.dce.dispclk_khz)
619 context->bw_ctx.bw.dce.all_displays_in_sync;
621 context->bw_ctx.bw.dce.nbp_state_change_enable == false;
623 context->bw_ctx.bw.dce.cpuc_state_change_enable == false;
625 context->bw_ctx.bw.dce.cpup_state_change_enable == false;
627 context->bw_ctx.bw.dce.blackout_recovery_time_us;
629 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz
634 context->bw_ctx.bw.dce.sclk_khz);
647 = context->bw_ctx.bw
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/linux-master/tools/testing/selftests/net/mptcp/
H A Dmptcp_connect.c419 ssize_t bw; local
431 bw = write(fd, buf, do_w);
432 if (bw < 0)
433 return bw;
444 return bw;
453 ssize_t bw; local
455 bw = write(fd, buf + offset, len - offset);
456 if (bw < 0) {
461 written = (size_t)bw;
689 ssize_t bw; local
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/linux-master/drivers/net/ethernet/intel/ice/
H A Dice_sched.c2967 * @bw: bandwidth in Kbps - Kilo bits per sec
2971 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw) argument
2973 if (bw == ICE_SCHED_DFLT_BW) {
2975 bw_t_info->cir_bw.bw = 0;
2979 bw_t_info->cir_bw.bw = bw;
2986 * @bw: bandwidth in Kbps - Kilo bits per sec
2990 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw) argument
2992 if (bw == ICE_SCHED_DFLT_BW) {
2994 bw_t_info->eir_bw.bw
3015 ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw) argument
3044 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc, enum ice_rl_type rl_type, u32 bw) argument
3077 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw) argument
3121 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw, struct ice_aqc_rl_profile_elem *profile) argument
3192 ice_sched_add_rl_profile(struct ice_port_info *pi, enum ice_rl_type rl_type, u32 bw, u8 layer_num) argument
3541 ice_sched_set_eir_srl_excl(struct ice_port_info *pi, struct ice_sched_node *node, u8 layer_num, enum ice_rl_type rl_type, u32 bw) argument
3585 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node, enum ice_rl_type rl_type, u32 bw, u8 layer_num) argument
3682 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node, enum ice_rl_type rl_type, u32 bw) argument
3775 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw) argument
3805 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle, enum ice_rl_type rl_type, u32 bw) argument
3868 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle, enum ice_rl_type rl_type, u32 bw) argument
3954 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id, enum ice_agg_type agg_type, u8 tc, enum ice_rl_type rl_type, u32 bw) argument
3995 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc, enum ice_rl_type rl_type, u32 bw) argument
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/linux-master/drivers/gpu/drm/pl111/
H A Dpl111_display.c57 u64 bw; local
63 bw = mode->clock * 1000ULL; /* In Hz */
64 bw = bw * mode->hdisplay * mode->vdisplay * cpp;
65 bw = div_u64(bw, mode->htotal * mode->vtotal);
71 if (priv->memory_bw && (bw > priv->memory_bw)) {
72 DRM_DEBUG_KMS("%d x %d @ %d Hz, %d cpp, bw %llu too fast\n",
74 mode->clock * 1000, cpp, bw);
78 DRM_DEBUG_KMS("%d x %d @ %d Hz, %d cpp, bw
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/linux-master/drivers/net/wireless/realtek/rtw89/
H A Dphy_be.c455 void __phy_set_txpwr_byrate_be(struct rtw89_dev *rtwdev, u8 band, u8 bw, argument
468 if (bw > RTW89_CHANNEL_WIDTH_40 && ent->no_over_bw40)
476 v[pos] = rtw89_phy_read_txpwr_byrate(rtwdev, band, bw,
499 u8 bw, nss; local
504 for (bw = 0; bw <= RTW89_CHANNEL_WIDTH_320; bw++)
506 __phy_set_txpwr_byrate_be(rtwdev, band, bw, nss,
542 u8 band, u8 bw, u8 ntx, u8 rs, u8 ch)
547 (*ptr)[bf] = rtw89_phy_read_txpwr_limit(rtwdev, band, bw, nt
541 fill_limit_nonbf_bf(struct rtw89_dev *rtwdev, s8 (*ptr)[RTW89_BF_NUM], u8 band, u8 bw, u8 ntx, u8 rs, u8 ch) argument
552 fill_limit_nonbf_bf_min(struct rtw89_dev *rtwdev, s8 (*ptr)[RTW89_BF_NUM], u8 band, u8 bw, u8 ntx, u8 rs, u8 ch1, u8 ch2) argument
772 u8 bw = chan->band_width; local
912 u8 bw = chan->band_width; local
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/linux-master/drivers/media/tuners/
H A Dtda18271-fe.c75 u32 freq, u32 bw)
693 u32 freq, u32 bw)
727 N = freq + bw / 2;
740 N = freq + bw / 2 + 1000000;
884 struct tda18271_std_map_item *map, u32 freq, u32 bw)
889 tda_dbg("freq = %d, ifc = %d, bw = %d, agc_mode = %d, std = %d\n",
890 freq, map->if_freq, bw, map->agc_mode, map->std);
904 tda18271c1_rf_tracking_filter_calibration(fe, freq, bw);
910 ret = tda18271_channel_configuration(fe, map, freq, bw);
923 u32 bw local
73 tda18271_channel_configuration(struct dvb_frontend *fe, struct tda18271_std_map_item *map, u32 freq, u32 bw) argument
692 tda18271c1_rf_tracking_filter_calibration(struct dvb_frontend *fe, u32 freq, u32 bw) argument
883 tda18271_tune(struct dvb_frontend *fe, struct tda18271_std_map_item *map, u32 freq, u32 bw) argument
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H A Dmxl5007t.c374 enum mxl5007t_bw_mhz bw)
378 switch (bw) {
398 u32 rf_freq, enum mxl5007t_bw_mhz bw)
407 mxl5007t_set_bw_bits(state, bw);
521 enum mxl5007t_bw_mhz bw)
527 rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
595 enum mxl5007t_bw_mhz bw; local
603 bw = MxL_BW_6MHz;
607 bw = MxL_BW_6MHz;
614 bw
373 mxl5007t_set_bw_bits(struct mxl5007t_state *state, enum mxl5007t_bw_mhz bw) argument
397 mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state, u32 rf_freq, enum mxl5007t_bw_mhz bw) argument
520 mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz, enum mxl5007t_bw_mhz bw) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_wrapper.c446 display_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false;
447 display_state->bw_ctx.bw.dcn.legacy_svp_drr_stream_index_valid = false;
460 display_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = true;
500 display_state->bw_ctx.bw.dcn.legacy_svp_drr_stream_index_valid = true;
501 display_state->bw_ctx.bw.dcn.legacy_svp_drr_stream_index = drr_display_index;
526 display_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false;
527 display_state->bw_ctx.bw.dcn.legacy_svp_drr_stream_index_valid = false;
630 context->bw_ctx.bw.dcn.clk.dtbclk_en = is_dtbclk_required(in_dc, context);
638 dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.a, &dml2->v20.dml_core_ctx);
639 dml2_extract_watermark_set(&context->bw_ctx.bw
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/linux-master/drivers/media/dvb-frontends/cxd2880/
H A Dcxd2880_top.c688 enum cxd2880_dtv_bandwidth bw; local
702 bw = priv->dvbt_tune_param.bandwidth;
716 pre_ber_rate = 63000000 * bw * (info.constellation * 2 + 2) /
719 post_ber_rate = 1000 * cr_table[info.rate_hp] * bw *
723 ucblock_rate = 875 * cr_table[info.rate_hp] * bw *
745 63000000 * bw * (info.constellation * 2 + 2) /
748 post_ber_rate = 1000 * cr_table[info.rate_lp] * bw *
753 bw * (info.constellation * 2 + 2) /
757 63000000 * bw * 2 / denominator_tbl[info.guard];
759 post_ber_rate = 1000 * cr_table[info.rate_hp] * bw *
802 enum cxd2880_dtv_bandwidth bw = CXD2880_DTV_BW_1_7_MHZ; local
1039 enum cxd2880_dtv_bandwidth bw = CXD2880_DTV_BW_1_7_MHZ; local
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/linux-master/drivers/net/wireless/marvell/mwifiex/
H A Dcfp.c189 u8 bw = 0; local
195 /* 20M: bw=0, 40M: bw=1, 80M: bw=2, 160M: bw=3 */
196 bw = (ht_info & 0xC) >> 2;
202 rate = ac_mcs_rate_nss2[2 * (3 - bw) + gi][mcs_index];
204 rate = ac_mcs_rate_nss1[2 * (3 - bw) + gi][mcs_index];
206 /* 20M: bw=0, 40M: bw
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/linux-master/net/batman-adv/
H A Dbat_v.c518 * @bw: the pointer where the metric will be stored. The metric is computed as
524 static int batadv_v_gw_throughput_get(struct batadv_gw_node *gw_node, u32 *bw) argument
545 *bw = router_ifinfo->bat_v.throughput;
546 *bw = min_t(u32, *bw, gw_node->bandwidth_down);
566 u32 max_bw = 0, bw; local
573 if (batadv_v_gw_throughput_get(gw_node, &bw) < 0)
576 if (curr_gw && bw <= max_bw)
583 max_bw = bw;
/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dphy_shim.c145 void wlapi_bmac_bw_set(struct phy_shim_info *physhim, u16 bw) argument
147 brcms_b_bw_set(physhim->wlc_hw, bw);
/linux-master/drivers/net/wireless/ath/ath11k/
H A Dmac.h166 u8 ath11k_mac_bw_to_mac80211_bw(u8 bw);
170 enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw);
/linux-master/drivers/net/wireless/ath/ath9k/
H A Dcommon.c184 rxs->bw = RATE_INFO_BW_5;
186 rxs->bw = RATE_INFO_BW_10;
192 rxs->bw = rx_stats->bw;
/linux-master/drivers/net/wireless/broadcom/brcm80211/include/
H A Dbrcmu_d11.h127 * @bw: channel width
135 enum brcmu_chan_bw bw; member in struct:brcmu_chan
/linux-master/drivers/staging/rtl8723bs/include/
H A Drtl8723b_recv.h77 u32 bw:2; member in struct:rxreport_8723b
/linux-master/drivers/net/wireless/mediatek/mt76/
H A Dmt76_connac_mac.c691 rate.bw = RATE_INFO_BW_160;
695 rate.bw = RATE_INFO_BW_80;
699 rate.bw = RATE_INFO_BW_40;
703 rate.bw = RATE_INFO_BW_20;
756 status->bw = RATE_INFO_BW_HE_RU;
823 he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) |
829 if (status->bw >= RATE_INFO_BW_40) {
835 if (status->bw >= RATE_INFO_BW_80) {
1009 u8 stbc, gi, bw, dcm, nss; local
1027 bw
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