Searched refs:cond (Results 26 - 50 of 273) sorted by path

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/linux-master/arch/arm/lib/
H A Dmemcpy.S29 .macro ldr1b ptr reg cond=al abort
30 ldrb\cond \reg, [\ptr], #1
41 .macro str1b ptr reg cond=al abort
42 strb\cond \reg, [\ptr], #1
/linux-master/arch/arm/mach-bcm/
H A Dbcm63xx_pmb.c58 * shift is seen, masked with mask and is different from cond.
62 u32 shift, u32 mask, u32 cond)
76 } while (((*val >> shift) & mask) != cond);
60 bpcm_wr_rd_mask(void __iomem *master, unsigned int addr, u32 off, u32 *val, u32 shift, u32 mask, u32 cond) argument
/linux-master/arch/arm/mach-omap2/
H A Dcommon.h197 * @cond: condition to test until it evaluates to true
201 * Loop waiting for @cond to become true or until at least @timeout
206 #define omap_test_timeout(cond, timeout, index) \
209 if (cond) \
H A Dprcm-common.h438 * @cond: condition to test until it evaluates to true
442 * Loop waiting for @cond to become true or until at least @timeout
447 #define omap_test_timeout(cond, timeout, index) \
450 if (cond) \
/linux-master/arch/arm/net/
H A Dbpf_jit_32.c271 static inline void _emit(int cond, u32 inst, struct jit_ctx *ctx) argument
273 inst |= (cond << 28);
/linux-master/arch/arm64/include/asm/
H A Dinsn.h463 /* b, bl, cb*, tb*, ret*, b.cond, br*, blr* */
565 enum aarch64_insn_condition cond);
/linux-master/arch/arm64/kernel/
H A Dtraps.c688 int cond; local
698 cond = it >> 4;
700 cond = (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT;
703 return aarch32_opcode_cond_checks[cond](regs->pstate);
/linux-master/arch/arm64/kvm/hyp/
H A Daarch32.c51 int cond; local
58 cond = kvm_vcpu_get_condition(vcpu);
59 if (cond == 0xE)
64 if (cond < 0) {
74 /* The cond for this insn works out as the top 4 bits. */
75 cond = (it >> 4);
80 if (!((cc_map[cond] >> cpsr_cond) & 1))
98 unsigned long itbits, cond; local
105 cond = (cpsr & 0xe000) >> 13;
111 itbits = cond
[all...]
/linux-master/arch/arm64/lib/
H A Dinsn.c334 enum aarch64_insn_condition cond)
343 if (cond < AARCH64_INSN_COND_EQ || cond > AARCH64_INSN_COND_AL) {
344 pr_err("%s: unknown condition encoding %d\n", __func__, cond);
347 insn |= cond;
333 aarch64_insn_gen_cond_branch_imm(unsigned long pc, unsigned long addr, enum aarch64_insn_condition cond) argument
/linux-master/arch/arm64/net/
H A Dbpf_jit.h30 #define A64_COND_BRANCH(cond, offset) \
31 aarch64_insn_gen_cond_branch_imm(0, offset, cond)
42 #define A64_B_(cond, imm19) A64_COND_BRANCH(cond, (imm19) << 2)
/linux-master/arch/loongarch/net/
H A Dbpf_jit.c389 static bool is_signed_bpf_cond(u8 cond) argument
391 return cond == BPF_JSGT || cond == BPF_JSLT ||
392 cond == BPF_JSGE || cond == BPF_JSLE;
466 const u8 cond = BPF_OP(code); local
790 /* PC += off if dst cond src */
821 if (emit_cond_jmp(ctx, cond, t1, t2, jmp_offset) < 0)
825 /* PC += off if dst cond imm */
862 if (emit_cond_jmp(ctx, cond, t
[all...]
H A Dbpf_jit.h175 static inline int invert_jmp_cond(u8 cond) argument
177 switch (cond) {
203 static inline void cond_jmp_offset(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj, argument
206 switch (cond) {
251 static inline void cond_jmp_offs26(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj, argument
254 cond = invert_jmp_cond(cond);
255 cond_jmp_offset(ctx, cond, rj, rd, 2);
264 static inline int emit_cond_jmp(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj, argument
279 cond_jmp_offs26(ctx, cond, r
296 emit_tailcall_jmp(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj, enum loongarch_gpr rd, int jmp_offset) argument
[all...]
/linux-master/arch/mips/include/uapi/asm/
H A Dinst.h897 struct mm_fp4_format { /* FPU c.cond format (microMIPS) */
903 __BITFIELD_FIELD(unsigned int cond : 4,
/linux-master/arch/mips/kernel/
H A Dmips-r2-to-r6-emul.c202 u32 cond; local
205 cond = fpucondbit[MIPSInst_RT(ir) >> 2];
207 if (((csr & cond) == 0) && MIPSInst_RD(ir))
225 u32 cond; local
228 cond = fpucondbit[MIPSInst_RT(ir) >> 2];
230 if (((csr & cond) != 0) && MIPSInst_RD(ir))
/linux-master/arch/mips/math-emu/
H A Dcp1emu.c396 case mm_32f_74_op: /* c.cond.fmt */
404 insn.mm_fp4_format.cond | MM_MIPS32_COND_FC;
975 unsigned int cond, cbit, bit0; local
1190 cond = 0;
1196 cond = bit0 == 0;
1200 cond = bit0 != 0;
1213 cond = ctx->fcr31 & cbit;
1222 cond = !cond;
1234 if (cond) {
1689 unsigned int cond; local
[all...]
/linux-master/arch/parisc/include/asm/
H A Dalternative.h26 u16 cond; /* see ALT_COND_XXX */ member in struct:alt_instr
36 #define ALTERNATIVE(cond, replacement) "!0:" \
40 ".hword 1, " __stringify(cond) " !" \
47 #define ALTERNATIVE(from, to, cond, replacement)\
51 .hword (to - from)/4, cond ! \
56 #define ALTERNATIVE_CODE(from, num_instructions, cond, new_instr_ptr)\
60 .hword -num_instructions, cond ! \
/linux-master/arch/parisc/kernel/
H A Dalternative.c49 u16 cond; local
54 cond = entry->cond;
57 WARN_ON(!cond);
59 if ((cond & ALT_COND_ALWAYS) == 0 && no_alternatives)
63 index, cond, len, from, replacement);
66 if ((cond & cond_check) == 0)
84 index, cond, len, replacement, from, from);
/linux-master/arch/parisc/net/
H A Dbpf_jit.h105 #define hppa_or_cond(reg1, reg2, cond, f, target) \
106 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x09, target)
109 #define hppa_and_cond(reg1, reg2, cond, f, target) \
110 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x08, target)
182 r2, r1, condition, target_addr, nop) /* combt,cond,n r1,r2,addr */
196 r2, r1, condition, target_addr, nop) /* combf,cond,n r1,r2,addr */
275 /* Return -1 or inverted cond. */
276 static inline int invert_bpf_cond(u8 cond) argument
278 switch (cond) {
H A Dbpf_jit_comp64.c457 static bool is_signed_bpf_cond(u8 cond) argument
459 return cond == BPF_JSGT || cond == BPF_JSLT ||
460 cond == BPF_JSGE || cond == BPF_JSLE;
/linux-master/arch/powerpc/include/asm/
H A Dinterrupt.h82 #define INT_SOFT_MASK_BUG_ON(regs, cond) \
85 BUG_ON(cond); \
88 #define INT_SOFT_MASK_BUG_ON(regs, cond)
/linux-master/arch/powerpc/net/
H A Dbpf_jit.h39 /* "cond" here covers BO:BI fields. */
40 #define PPC_BCC_SHORT(cond, dest) \
47 EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \
93 #define PPC_BCC(cond, dest) do { \
95 PPC_BCC_SHORT(cond, dest); \
99 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, CTX_NIA(ctx) + 2*4); \
/linux-master/arch/riscv/net/
H A Dbpf_jit.h141 /* Return -1 or inverted cond. */
142 static inline int invert_bpf_cond(u8 cond) argument
144 switch (cond) {
H A Dbpf_jit_comp64.c274 static void emit_bcc(u8 cond, u8 rd, u8 rs, int rvoff, argument
277 switch (cond) {
310 static void emit_branch(u8 cond, u8 rd, u8 rs, int rvoff, argument
316 emit_bcc(cond, rd, rs, rvoff, ctx);
331 cond = invert_bpf_cond(cond);
333 emit_bcc(cond, rd, rs, 8, ctx);
344 emit_bcc(cond, rd, rs, 12, ctx);
442 static bool is_signed_bpf_cond(u8 cond) argument
444 return cond
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/linux-master/arch/x86/include/asm/
H A Dparavirt_types.h406 #define ____PVOP_ALT_CALL(ret, op, alt, cond, call_clbr, \
413 alt, cond) \
425 #define __PVOP_ALT_CALL(rettype, op, alt, cond, ...) \
426 ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), op, alt, cond, \
434 #define __PVOP_ALT_CALLEESAVE(rettype, op, alt, cond, ...) \
435 ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), op.func, alt, cond, \
443 #define __PVOP_ALT_VCALL(op, alt, cond, ...) \
444 (void)____PVOP_ALT_CALL(, op, alt, cond, \
452 #define __PVOP_ALT_VCALLEESAVE(op, alt, cond, ...) \
453 (void)____PVOP_ALT_CALL(, op.func, alt, cond, \
[all...]
H A Dpgtable.h341 pgprotval_t cond = (~v >> _PAGE_BIT_RW) & 1; local
343 v |= ((v >> _PAGE_BIT_DIRTY) & cond) << _PAGE_BIT_SAVED_DIRTY;
344 v &= ~(cond << _PAGE_BIT_DIRTY);
351 pgprotval_t cond = (v >> _PAGE_BIT_RW) & 1; local
353 v |= ((v >> _PAGE_BIT_SAVED_DIRTY) & cond) << _PAGE_BIT_DIRTY;
354 v &= ~(cond << _PAGE_BIT_SAVED_DIRTY);

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