Searched refs:gpio (Results 201 - 225 of 2002) sorted by last modified time

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/linux-master/drivers/pinctrl/
H A Dpinmux.c7 * Based on bits of regulator core, gpio core and clk core
79 * is either muxed to a different function or used as gpio.
85 * menaning that the gpio can be used.
261 * @gpio: number of requested GPIO
265 unsigned int pin, unsigned int gpio)
271 owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio);
263 pinmux_request_gpio(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin, unsigned int gpio) argument
H A Dpinctrl-st.c9 #include <linux/gpio/driver.h>
275 * of each gpio pin in a GPIO bank.
278 * 4-bits. Each 4-bit space is allocated for each pin in a gpio bank.
377 static inline int st_gpio_bank(int gpio) argument
379 return gpio/ST_GPIO_PINS_PER_BANK;
382 static inline int st_gpio_pin(int gpio) argument
384 return gpio%ST_GPIO_PINS_PER_BANK;
678 unsigned int gpio, unsigned int direction)
680 int offset = st_gpio_pin(gpio);
913 struct pinctrl_gpio_range *range, unsigned gpio,
677 st_gpio_direction(struct st_gpio_bank *bank, unsigned int gpio, unsigned int direction) argument
912 st_pmx_set_gpio_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned gpio, bool input) argument
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H A Dpinctrl-ocelot.c10 #include <linux/gpio/driver.h>
222 [FUNC_GPIO] = "gpio",
1200 * Note: ALT0/ALT1 are organized specially for 64 gpio targets
1228 * Note: ALT0/ALT1/ALT2 are organized specially for 78 gpio targets
1809 unsigned int gpio = irqd_to_hwirq(data); local
1811 regmap_update_bits(info->map, REG(OCELOT_GPIO_INTR_ENA, info, gpio),
1812 BIT(gpio % 32), 0);
1813 gpiochip_disable_irq(chip, gpio);
1822 unsigned int gpio = irqd_to_hwirq(data); local
1826 generic_handle_domain_irq(chip->irq.domain, gpio);
1838 unsigned int gpio = irqd_to_hwirq(data); local
1898 unsigned int gpio = irqd_to_hwirq(data); local
1909 unsigned int gpio = irqd_to_hwirq(data); local
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H A Dpinctrl-mcp23s08.c11 #include <linux/gpio/driver.h>
12 #include <linux/gpio/consumer.h>
378 int intcap, intcon, intf, i, gpio, gpio_orig, intcap_mask, defval, gpinten; local
406 if (mcp_read(mcp, MCP_GPIO, &gpio))
410 mcp->cached_gpio = gpio;
414 "intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n",
415 intcap, intf, gpio_orig, gpio);
450 gpio_set = BIT(i) & gpio;
452 (BIT(i) & gpio);
454 ((BIT(i) & gpio) !
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H A Dpinctrl-aw9523.c9 #include <linux/gpio/consumer.h>
10 #include <linux/gpio/driver.h>
60 * @cached_gpio: stores the previous gpio status for bit comparison
88 * @gpio: structure holding gpiochip params
98 struct gpio_chip gpio; member in struct:aw9523
167 .name = "gpio",
204 * high bit means "gpio" and a low bit means "pwm".
455 gpiochip_disable_irq(&awi->gpio, irqd_to_hwirq(d));
470 gpiochip_enable_irq(&awi->gpio, irqd_to_hwirq(d));
503 for_each_set_bit(n, &changed_gpio, awi->gpio
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H A Dpinctrl-da9062.c7 * - add pinmux and pinctrl support (gpio alternate mode)
20 #include <linux/gpio/consumer.h>
21 #include <linux/gpio/driver.h>
28 #define DA9062_PIN_ALTERNATE 0x00 /* gpio alternate mode */
29 #define DA9062_PIN_GPI 0x01 /* gpio in */
30 #define DA9062_PIN_GPO_OD 0x02 /* gpio out open-drain */
31 #define DA9062_PIN_GPO_PP 0x03 /* gpio out push-pull */
151 * If the gpio is active low we should set it in hw too. No worries
152 * about gpio_get() because we read and return the gpio-level. So the
190 * gpio inpu
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H A DMakefile13 obj-$(CONFIG_PINCTRL_APPLE_GPIO) += pinctrl-apple-gpio.o
/linux-master/drivers/pinctrl/nuvoton/
H A Dpinctrl-wpcm450.c14 #include <linux/gpio/driver.h>
99 static int wpcm450_gpio_irq_bitnum(struct wpcm450_gpio *gpio, struct irq_data *d) argument
101 const struct wpcm450_bank *bank = gpio->bank;
113 static int wpcm450_irq_bitnum_to_gpio(struct wpcm450_gpio *gpio, int bitnum) argument
115 const struct wpcm450_bank *bank = gpio->bank;
128 struct wpcm450_gpio *gpio = gpiochip_get_data(irq_data_get_irq_chip_data(d)); local
129 struct wpcm450_pinctrl *pctrl = gpio->pctrl;
133 bit = wpcm450_gpio_irq_bitnum(gpio, d);
145 struct wpcm450_gpio *gpio = gpiochip_get_data(gc); local
146 struct wpcm450_pinctrl *pctrl = gpio
167 struct wpcm450_gpio *gpio = gpiochip_get_data(gc); local
193 wpcm450_gpio_get(struct wpcm450_gpio *gpio, int offset) argument
213 wpcm450_gpio_fix_evpol(struct wpcm450_gpio *gpio, unsigned long all) argument
240 struct wpcm450_gpio *gpio = gpiochip_get_data(irq_data_get_irq_chip_data(d)); local
307 struct wpcm450_gpio *gpio = gpiochip_get_data(irq_desc_get_handler_data(desc)); local
915 debounce_bitnum(int gpio) argument
1010 struct wpcm450_gpio *gpio = gpiochip_get_data(chip); local
1017 struct wpcm450_gpio *gpio = gpiochip_get_data(chip); local
1042 struct wpcm450_gpio *gpio; local
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/linux-master/drivers/pinctrl/nomadik/
H A Dpinctrl-nomadik.c4 * depends on gpio-nomadik and some handling is intertwined; see nmk_gpio_chips
18 #include <linux/gpio/driver.h>
43 #include <linux/gpio/gpio-nomadik.h>
103 #define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
309 int gpio = nmk_chip->chip.base + offset; local
331 dev_dbg(nmk_chip->chip.parent, "%d: clearing interrupt mask\n", gpio);
475 /* Only called by gpio-nomadik but requires knowledge of struct nmk_pinctrl. */
476 int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) argument
489 if (npct->soc->altcx_pins[i].pin == gpio)
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H A Dpinctrl-nomadik-db8500.c6 #include <linux/gpio/driver.h>
8 #include <linux/gpio/gpio-nomadik.h>
H A Dpinctrl-nomadik-stn8815.c6 #include <linux/gpio/driver.h>
8 #include <linux/gpio/gpio-nomadik.h>
/linux-master/drivers/pinctrl/intel/
H A Dpinctrl-intel.c12 #include <linux/gpio/driver.h>
1164 .name = "intel-gpio",
/linux-master/drivers/pinctrl/cirrus/
H A Dpinctrl-cs42l43.c12 #include <linux/gpio/driver.h>
139 "gpio", "spdif", "irq", "mic-shutter", "spk-shutter",
148 PINCTRL_PINFUNCTION("gpio", cs42l43_pin_gpio_groups,
229 dev_dbg(priv->dev, "Setting gpio%d to %s\n",
241 dev_err(priv->dev, "Failed to set gpio%d direction: %d\n",
477 dev_err(priv->dev, "Failed to get gpio%d: %d\n", offset + 1, ret);
492 dev_dbg(priv->dev, "Setting gpio%d to %s\n",
504 dev_err(priv->dev, "Failed to set gpio%d: %d\n", offset + 1, ret);
/linux-master/drivers/pci/controller/dwc/
H A Dpcie-tegra194.c16 #include <linux/gpio.h>
17 #include <linux/gpio/consumer.h>
H A Dpcie-qcom.c15 #include <linux/gpio/consumer.h>
H A Dpcie-keembay.c12 #include <linux/gpio/consumer.h>
H A Dpci-imx6.c14 #include <linux/gpio.h>
1278 imx6_pcie->reset_gpio = of_get_named_gpio(node, "reset-gpio", 0);
1280 "reset-gpio-active-high");
1288 dev_err(dev, "unable to get reset gpio\n");
H A Dpci-keystone.c14 #include <linux/gpio/consumer.h>
/linux-master/drivers/net/ieee802154/
H A Dca8210.c54 #include <linux/gpio/consumer.h>
55 #include <linux/gpio.h>
352 * @extclockgpio: ca8210 output gpio of the external clock
353 * @gpio_reset: gpio number of ca8210 reset line
354 * @gpio_irq: gpio number of ca8210 interrupt line
2671 "extclock-gpio",
2793 "reset-gpio",
2822 "irq-gpio",
2830 "Could not get irq for gpio pin %d\n",
/linux-master/drivers/mmc/host/
H A Dtmio_mmc_core.c38 #include <linux/mmc/slot-gpio.h>
H A Dsh_mmcif.c46 #include <linux/mmc/slot-gpio.h>
H A Dmxcmmc.c35 #include <linux/mmc/slot-gpio.h>
902 * context or gpio is invalid), then let the mmc core decide
H A Dmmc_spi.c24 #include <linux/mmc/slot-gpio.h>
H A Dmvsdio.c22 #include <linux/mmc/slot-gpio.h>
H A Dmeson-mx-sdhc-mmc.c24 #include <linux/mmc/slot-gpio.h>

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