1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Driver for the MMC / SD / SDIO IP found in: 4 * 5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 6 * 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2017 Horms Solutions, Simon Horman 10 * Copyright (C) 2011 Guennadi Liakhovetski 11 * Copyright (C) 2007 Ian Molton 12 * Copyright (C) 2004 Ian Molton 13 * 14 * This driver draws mainly on scattered spec sheets, Reverse engineering 15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 16 * support). (Further 4 bit support from a later datasheet). 17 * 18 * TODO: 19 * Investigate using a workqueue for PIO transfers 20 * Eliminate FIXMEs 21 * Better Power management 22 * Handle MMC errors better 23 * double buffer support 24 * 25 */ 26 27#include <linux/delay.h> 28#include <linux/device.h> 29#include <linux/dma-mapping.h> 30#include <linux/highmem.h> 31#include <linux/interrupt.h> 32#include <linux/io.h> 33#include <linux/irq.h> 34#include <linux/mfd/tmio.h> 35#include <linux/mmc/card.h> 36#include <linux/mmc/host.h> 37#include <linux/mmc/mmc.h> 38#include <linux/mmc/slot-gpio.h> 39#include <linux/module.h> 40#include <linux/pagemap.h> 41#include <linux/platform_device.h> 42#include <linux/pm_qos.h> 43#include <linux/pm_runtime.h> 44#include <linux/regulator/consumer.h> 45#include <linux/mmc/sdio.h> 46#include <linux/scatterlist.h> 47#include <linux/sizes.h> 48#include <linux/spinlock.h> 49#include <linux/workqueue.h> 50 51#include "tmio_mmc.h" 52 53static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 54 struct mmc_data *data) 55{ 56 if (host->dma_ops) 57 host->dma_ops->start(host, data); 58} 59 60static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host) 61{ 62 if (host->dma_ops && host->dma_ops->end) 63 host->dma_ops->end(host); 64} 65 66static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 67{ 68 if (host->dma_ops) 69 host->dma_ops->enable(host, enable); 70} 71 72static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 73 struct tmio_mmc_data *pdata) 74{ 75 if (host->dma_ops) { 76 host->dma_ops->request(host, pdata); 77 } else { 78 host->chan_tx = NULL; 79 host->chan_rx = NULL; 80 } 81} 82 83static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 84{ 85 if (host->dma_ops) 86 host->dma_ops->release(host); 87} 88 89static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 90{ 91 if (host->dma_ops) 92 host->dma_ops->abort(host); 93} 94 95static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host) 96{ 97 if (host->dma_ops) 98 host->dma_ops->dataend(host); 99} 100 101void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 102{ 103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 105} 106EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs); 107 108void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 109{ 110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 112} 113EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs); 114 115static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 116{ 117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); 118} 119 120static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 121{ 122 host->sg_len = data->sg_len; 123 host->sg_ptr = data->sg; 124 host->sg_orig = data->sg; 125 host->sg_off = 0; 126} 127 128static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 129{ 130 host->sg_ptr = sg_next(host->sg_ptr); 131 host->sg_off = 0; 132 return --host->sg_len; 133} 134 135#define CMDREQ_TIMEOUT 5000 136 137static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 138{ 139 struct tmio_mmc_host *host = mmc_priv(mmc); 140 141 if (enable && !host->sdio_irq_enabled) { 142 u16 sdio_status; 143 144 /* Keep device active while SDIO irq is enabled */ 145 pm_runtime_get_sync(mmc_dev(mmc)); 146 147 host->sdio_irq_enabled = true; 148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ; 149 150 /* Clear obsolete interrupts before enabling */ 151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 153 sdio_status |= TMIO_SDIO_SETBITS_MASK; 154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 155 156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 157 } else if (!enable && host->sdio_irq_enabled) { 158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 160 161 host->sdio_irq_enabled = false; 162 pm_runtime_mark_last_busy(mmc_dev(mmc)); 163 pm_runtime_put_autosuspend(mmc_dev(mmc)); 164 } 165} 166 167static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 168 unsigned char bus_width) 169{ 170 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 171 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 172 173 /* reg now applies to MMC_BUS_WIDTH_4 */ 174 if (bus_width == MMC_BUS_WIDTH_1) 175 reg |= CARD_OPT_WIDTH; 176 else if (bus_width == MMC_BUS_WIDTH_8) 177 reg |= CARD_OPT_WIDTH8; 178 179 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); 180} 181 182static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve) 183{ 184 u16 card_opt, clk_ctrl, sdif_mode; 185 186 if (preserve) { 187 card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT); 188 clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL); 189 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) 190 sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE); 191 } 192 193 /* FIXME - should we set stop clock reg here */ 194 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 195 usleep_range(10000, 11000); 196 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 197 usleep_range(10000, 11000); 198 199 tmio_mmc_abort_dma(host); 200 201 if (host->reset) 202 host->reset(host, preserve); 203 204 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all); 205 host->sdcard_irq_mask = host->sdcard_irq_mask_all; 206 207 if (host->native_hotplug) 208 tmio_mmc_enable_mmc_irqs(host, 209 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 210 211 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width); 212 213 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 214 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 215 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 216 } 217 218 if (preserve) { 219 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt); 220 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl); 221 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) 222 sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode); 223 } 224 225 if (host->mmc->card) 226 mmc_retune_needed(host->mmc); 227} 228 229static void tmio_mmc_reset_work(struct work_struct *work) 230{ 231 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 232 delayed_reset_work.work); 233 struct mmc_request *mrq; 234 unsigned long flags; 235 236 spin_lock_irqsave(&host->lock, flags); 237 mrq = host->mrq; 238 239 /* 240 * is request already finished? Since we use a non-blocking 241 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 242 * us, so, have to check for IS_ERR(host->mrq) 243 */ 244 if (IS_ERR_OR_NULL(mrq) || 245 time_is_after_jiffies(host->last_req_ts + 246 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 247 spin_unlock_irqrestore(&host->lock, flags); 248 return; 249 } 250 251 dev_warn(&host->pdev->dev, 252 "timeout waiting for hardware interrupt (CMD%u)\n", 253 mrq->cmd->opcode); 254 255 if (host->data) 256 host->data->error = -ETIMEDOUT; 257 else if (host->cmd) 258 host->cmd->error = -ETIMEDOUT; 259 else 260 mrq->cmd->error = -ETIMEDOUT; 261 262 /* No new calls yet, but disallow concurrent tmio_mmc_done_work() */ 263 host->mrq = ERR_PTR(-EBUSY); 264 host->cmd = NULL; 265 host->data = NULL; 266 267 spin_unlock_irqrestore(&host->lock, flags); 268 269 tmio_mmc_reset(host, true); 270 271 /* Ready for new calls */ 272 host->mrq = NULL; 273 mmc_request_done(host->mmc, mrq); 274} 275 276/* These are the bitmasks the tmio chip requires to implement the MMC response 277 * types. Note that R1 and R6 are the same in this scheme. */ 278#define APP_CMD 0x0040 279#define RESP_NONE 0x0300 280#define RESP_R1 0x0400 281#define RESP_R1B 0x0500 282#define RESP_R2 0x0600 283#define RESP_R3 0x0700 284#define DATA_PRESENT 0x0800 285#define TRANSFER_READ 0x1000 286#define TRANSFER_MULTI 0x2000 287#define SECURITY_CMD 0x4000 288#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 289 290static int tmio_mmc_start_command(struct tmio_mmc_host *host, 291 struct mmc_command *cmd) 292{ 293 struct mmc_data *data = host->data; 294 int c = cmd->opcode; 295 296 switch (mmc_resp_type(cmd)) { 297 case MMC_RSP_NONE: c |= RESP_NONE; break; 298 case MMC_RSP_R1: 299 case MMC_RSP_R1_NO_CRC: 300 c |= RESP_R1; break; 301 case MMC_RSP_R1B: c |= RESP_R1B; break; 302 case MMC_RSP_R2: c |= RESP_R2; break; 303 case MMC_RSP_R3: c |= RESP_R3; break; 304 default: 305 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 306 return -EINVAL; 307 } 308 309 host->cmd = cmd; 310 311/* FIXME - this seems to be ok commented out but the spec suggest this bit 312 * should be set when issuing app commands. 313 * if(cmd->flags & MMC_FLAG_ACMD) 314 * c |= APP_CMD; 315 */ 316 if (data) { 317 c |= DATA_PRESENT; 318 if (data->blocks > 1) { 319 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC); 320 c |= TRANSFER_MULTI; 321 322 /* 323 * Disable auto CMD12 at IO_RW_EXTENDED and 324 * SET_BLOCK_COUNT when doing multiple block transfer 325 */ 326 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 327 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc)) 328 c |= NO_CMD12_ISSUE; 329 } 330 if (data->flags & MMC_DATA_READ) 331 c |= TRANSFER_READ; 332 } 333 334 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD); 335 336 /* Fire off the command */ 337 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); 338 sd_ctrl_write16(host, CTL_SD_CMD, c); 339 340 return 0; 341} 342 343static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 344 unsigned short *buf, 345 unsigned int count) 346{ 347 int is_read = host->data->flags & MMC_DATA_READ; 348 u8 *buf8; 349 350 /* 351 * Transfer the data 352 */ 353 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { 354 u32 data = 0; 355 u32 *buf32 = (u32 *)buf; 356 357 if (is_read) 358 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32, 359 count >> 2); 360 else 361 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32, 362 count >> 2); 363 364 /* if count was multiple of 4 */ 365 if (!(count & 0x3)) 366 return; 367 368 buf32 += count >> 2; 369 count %= 4; 370 371 if (is_read) { 372 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); 373 memcpy(buf32, &data, count); 374 } else { 375 memcpy(&data, buf32, count); 376 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); 377 } 378 379 return; 380 } 381 382 if (is_read) 383 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 384 else 385 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 386 387 /* if count was even number */ 388 if (!(count & 0x1)) 389 return; 390 391 /* if count was odd number */ 392 buf8 = (u8 *)(buf + (count >> 1)); 393 394 /* 395 * FIXME 396 * 397 * driver and this function are assuming that 398 * it is used as little endian 399 */ 400 if (is_read) 401 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 402 else 403 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 404} 405 406/* 407 * This chip always returns (at least?) as much data as you ask for. 408 * I'm unsure what happens if you ask for less than a block. This should be 409 * looked into to ensure that a funny length read doesn't hose the controller. 410 */ 411static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 412{ 413 struct mmc_data *data = host->data; 414 void *sg_virt; 415 unsigned short *buf; 416 unsigned int count; 417 418 if (host->dma_on) { 419 pr_err("PIO IRQ in DMA mode!\n"); 420 return; 421 } else if (!data) { 422 pr_debug("Spurious PIO IRQ\n"); 423 return; 424 } 425 426 sg_virt = kmap_local_page(sg_page(host->sg_ptr)); 427 buf = (unsigned short *)(sg_virt + host->sg_ptr->offset + host->sg_off); 428 429 count = host->sg_ptr->length - host->sg_off; 430 if (count > data->blksz) 431 count = data->blksz; 432 433 pr_debug("count: %08x offset: %08x flags %08x\n", 434 count, host->sg_off, data->flags); 435 436 /* Transfer the data */ 437 tmio_mmc_transfer_data(host, buf, count); 438 439 host->sg_off += count; 440 441 kunmap_local(sg_virt); 442 443 if (host->sg_off == host->sg_ptr->length) 444 tmio_mmc_next_sg(host); 445} 446 447static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 448{ 449 if (host->sg_ptr == &host->bounce_sg) { 450 void *sg_virt = kmap_local_page(sg_page(host->sg_orig)); 451 452 memcpy(sg_virt + host->sg_orig->offset, host->bounce_buf, 453 host->bounce_sg.length); 454 kunmap_local(sg_virt); 455 } 456} 457 458/* needs to be called with host->lock held */ 459void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 460{ 461 struct mmc_data *data = host->data; 462 struct mmc_command *stop; 463 464 host->data = NULL; 465 466 if (!data) { 467 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 468 return; 469 } 470 stop = data->stop; 471 472 /* FIXME - return correct transfer count on errors */ 473 if (!data->error) 474 data->bytes_xfered = data->blocks * data->blksz; 475 else 476 data->bytes_xfered = 0; 477 478 pr_debug("Completed data request\n"); 479 480 /* 481 * FIXME: other drivers allow an optional stop command of any given type 482 * which we dont do, as the chip can auto generate them. 483 * Perhaps we can be smarter about when to use auto CMD12 and 484 * only issue the auto request when we know this is the desired 485 * stop command, allowing fallback to the stop command the 486 * upper layers expect. For now, we do what works. 487 */ 488 489 if (data->flags & MMC_DATA_READ) { 490 if (host->dma_on) 491 tmio_mmc_check_bounce_buffer(host); 492 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 493 host->mrq); 494 } else { 495 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 496 host->mrq); 497 } 498 499 if (stop && !host->mrq->sbc) { 500 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 501 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 502 stop->opcode, stop->arg); 503 504 /* fill in response from auto CMD12 */ 505 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE); 506 507 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0); 508 } 509 510 schedule_work(&host->done); 511} 512EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq); 513 514static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 515{ 516 struct mmc_data *data; 517 518 spin_lock(&host->lock); 519 data = host->data; 520 521 if (!data) 522 goto out; 523 524 if (stat & TMIO_STAT_DATATIMEOUT) 525 data->error = -ETIMEDOUT; 526 else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR || 527 stat & TMIO_STAT_TXUNDERRUN) 528 data->error = -EILSEQ; 529 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) { 530 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 531 bool done = false; 532 533 /* 534 * Has all data been written out yet? Testing on SuperH showed, 535 * that in most cases the first interrupt comes already with the 536 * BUSY status bit clear, but on some operations, like mount or 537 * in the beginning of a write / sync / umount, there is one 538 * DATAEND interrupt with the BUSY bit set, in this cases 539 * waiting for one more interrupt fixes the problem. 540 */ 541 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 542 if (status & TMIO_STAT_SCLKDIVEN) 543 done = true; 544 } else { 545 if (!(status & TMIO_STAT_CMD_BUSY)) 546 done = true; 547 } 548 549 if (done) { 550 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 551 tmio_mmc_dataend_dma(host); 552 } 553 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) { 554 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 555 tmio_mmc_dataend_dma(host); 556 } else { 557 tmio_mmc_do_data_irq(host); 558 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 559 } 560out: 561 spin_unlock(&host->lock); 562} 563 564static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat) 565{ 566 struct mmc_command *cmd = host->cmd; 567 int i, addr; 568 569 spin_lock(&host->lock); 570 571 if (!host->cmd) { 572 pr_debug("Spurious CMD irq\n"); 573 goto out; 574 } 575 576 /* This controller is sicker than the PXA one. Not only do we need to 577 * drop the top 8 bits of the first response word, we also need to 578 * modify the order of the response for short response command types. 579 */ 580 581 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 582 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); 583 584 if (cmd->flags & MMC_RSP_136) { 585 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 586 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 587 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 588 cmd->resp[3] <<= 8; 589 } else if (cmd->flags & MMC_RSP_R3) { 590 cmd->resp[0] = cmd->resp[3]; 591 } 592 593 if (stat & TMIO_STAT_CMDTIMEOUT) 594 cmd->error = -ETIMEDOUT; 595 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) || 596 stat & TMIO_STAT_STOPBIT_ERR || 597 stat & TMIO_STAT_CMD_IDX_ERR) 598 cmd->error = -EILSEQ; 599 600 /* If there is data to handle we enable data IRQs here, and 601 * we will ultimatley finish the request in the data_end handler. 602 * If theres no data or we encountered an error, finish now. 603 */ 604 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) { 605 if (host->data->flags & MMC_DATA_READ) { 606 if (!host->dma_on) { 607 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 608 } else { 609 tmio_mmc_disable_mmc_irqs(host, 610 TMIO_MASK_READOP); 611 tasklet_schedule(&host->dma_issue); 612 } 613 } else { 614 if (!host->dma_on) { 615 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 616 } else { 617 tmio_mmc_disable_mmc_irqs(host, 618 TMIO_MASK_WRITEOP); 619 tasklet_schedule(&host->dma_issue); 620 } 621 } 622 } else { 623 schedule_work(&host->done); 624 } 625 626out: 627 spin_unlock(&host->lock); 628} 629 630static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 631 int ireg, int status) 632{ 633 struct mmc_host *mmc = host->mmc; 634 635 /* Card insert / remove attempts */ 636 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 637 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 638 TMIO_STAT_CARD_REMOVE); 639 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 640 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 641 !work_pending(&mmc->detect.work)) 642 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 643 return true; 644 } 645 646 return false; 647} 648 649static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg, 650 int status) 651{ 652 /* Command completion */ 653 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 654 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND | 655 TMIO_STAT_CMDTIMEOUT); 656 tmio_mmc_cmd_irq(host, status); 657 return true; 658 } 659 660 /* Data transfer */ 661 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 662 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 663 tmio_mmc_pio_irq(host); 664 return true; 665 } 666 667 /* Data transfer completion */ 668 if (ireg & TMIO_STAT_DATAEND) { 669 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 670 tmio_mmc_data_irq(host, status); 671 return true; 672 } 673 674 if (host->dma_ops && host->dma_ops->dma_irq && host->dma_ops->dma_irq(host)) 675 return true; 676 677 return false; 678} 679 680static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) 681{ 682 struct mmc_host *mmc = host->mmc; 683 struct tmio_mmc_data *pdata = host->pdata; 684 unsigned int ireg, status; 685 unsigned int sdio_status; 686 687 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 688 return false; 689 690 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 691 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; 692 693 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 694 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 695 sdio_status |= TMIO_SDIO_SETBITS_MASK; 696 697 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 698 699 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 700 mmc_signal_sdio_irq(mmc); 701 702 return ireg; 703} 704 705irqreturn_t tmio_mmc_irq(int irq, void *devid) 706{ 707 struct tmio_mmc_host *host = devid; 708 unsigned int ireg, status; 709 710 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 711 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 712 713 /* Clear the status except the interrupt status */ 714 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); 715 716 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 717 return IRQ_HANDLED; 718 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 719 return IRQ_HANDLED; 720 721 if (__tmio_mmc_sdio_irq(host)) 722 return IRQ_HANDLED; 723 724 return IRQ_NONE; 725} 726EXPORT_SYMBOL_GPL(tmio_mmc_irq); 727 728static int tmio_mmc_start_data(struct tmio_mmc_host *host, 729 struct mmc_data *data) 730{ 731 struct tmio_mmc_data *pdata = host->pdata; 732 733 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 734 data->blksz, data->blocks); 735 736 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ 737 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || 738 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { 739 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 740 741 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 742 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", 743 mmc_hostname(host->mmc), data->blksz); 744 return -EINVAL; 745 } 746 } 747 748 tmio_mmc_init_sg(host, data); 749 host->data = data; 750 host->dma_on = false; 751 752 /* Set transfer length / blocksize */ 753 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 754 if (host->mmc->max_blk_count >= SZ_64K) 755 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks); 756 else 757 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 758 759 tmio_mmc_start_dma(host, data); 760 761 return 0; 762} 763 764static void tmio_process_mrq(struct tmio_mmc_host *host, 765 struct mmc_request *mrq) 766{ 767 struct mmc_command *cmd; 768 int ret; 769 770 if (mrq->sbc && host->cmd != mrq->sbc) { 771 cmd = mrq->sbc; 772 } else { 773 cmd = mrq->cmd; 774 if (mrq->data) { 775 ret = tmio_mmc_start_data(host, mrq->data); 776 if (ret) 777 goto fail; 778 } 779 } 780 781 ret = tmio_mmc_start_command(host, cmd); 782 if (ret) 783 goto fail; 784 785 schedule_delayed_work(&host->delayed_reset_work, 786 msecs_to_jiffies(CMDREQ_TIMEOUT)); 787 return; 788 789fail: 790 host->mrq = NULL; 791 mrq->cmd->error = ret; 792 mmc_request_done(host->mmc, mrq); 793} 794 795/* Process requests from the MMC layer */ 796static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 797{ 798 struct tmio_mmc_host *host = mmc_priv(mmc); 799 unsigned long flags; 800 801 spin_lock_irqsave(&host->lock, flags); 802 803 if (host->mrq) { 804 pr_debug("request not null\n"); 805 if (IS_ERR(host->mrq)) { 806 spin_unlock_irqrestore(&host->lock, flags); 807 mrq->cmd->error = -EAGAIN; 808 mmc_request_done(mmc, mrq); 809 return; 810 } 811 } 812 813 host->last_req_ts = jiffies; 814 wmb(); 815 host->mrq = mrq; 816 817 spin_unlock_irqrestore(&host->lock, flags); 818 819 tmio_process_mrq(host, mrq); 820} 821 822static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 823{ 824 struct mmc_request *mrq; 825 unsigned long flags; 826 827 spin_lock_irqsave(&host->lock, flags); 828 829 tmio_mmc_end_dma(host); 830 831 mrq = host->mrq; 832 if (IS_ERR_OR_NULL(mrq)) { 833 spin_unlock_irqrestore(&host->lock, flags); 834 return; 835 } 836 837 /* If not SET_BLOCK_COUNT, clear old data */ 838 if (host->cmd != mrq->sbc) { 839 host->cmd = NULL; 840 host->data = NULL; 841 host->mrq = NULL; 842 } 843 844 cancel_delayed_work(&host->delayed_reset_work); 845 846 spin_unlock_irqrestore(&host->lock, flags); 847 848 if (mrq->cmd->error || (mrq->data && mrq->data->error)) { 849 tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */ 850 tmio_mmc_abort_dma(host); 851 } 852 853 /* Error means retune, but executed command was still successful */ 854 if (host->check_retune && host->check_retune(host, mrq)) 855 mmc_retune_needed(host->mmc); 856 857 /* If SET_BLOCK_COUNT, continue with main command */ 858 if (host->mrq && !mrq->cmd->error) { 859 tmio_process_mrq(host, mrq); 860 return; 861 } 862 863 if (host->fixup_request) 864 host->fixup_request(host, mrq); 865 866 mmc_request_done(host->mmc, mrq); 867} 868 869static void tmio_mmc_done_work(struct work_struct *work) 870{ 871 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 872 done); 873 tmio_mmc_finish_request(host); 874} 875 876static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 877{ 878 struct mmc_host *mmc = host->mmc; 879 int ret = 0; 880 881 /* .set_ios() is returning void, so, no chance to report an error */ 882 883 if (host->set_pwr) 884 host->set_pwr(host->pdev, 1); 885 886 if (!IS_ERR(mmc->supply.vmmc)) { 887 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 888 /* 889 * Attention: empiric value. With a b43 WiFi SDIO card this 890 * delay proved necessary for reliable card-insertion probing. 891 * 100us were not enough. Is this the same 140us delay, as in 892 * tmio_mmc_set_ios()? 893 */ 894 usleep_range(200, 300); 895 } 896 /* 897 * It seems, VccQ should be switched on after Vcc, this is also what the 898 * omap_hsmmc.c driver does. 899 */ 900 if (!IS_ERR(mmc->supply.vqmmc) && !ret) { 901 ret = regulator_enable(mmc->supply.vqmmc); 902 usleep_range(200, 300); 903 } 904 905 if (ret < 0) 906 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 907 ret); 908} 909 910static void tmio_mmc_power_off(struct tmio_mmc_host *host) 911{ 912 struct mmc_host *mmc = host->mmc; 913 914 if (!IS_ERR(mmc->supply.vqmmc)) 915 regulator_disable(mmc->supply.vqmmc); 916 917 if (!IS_ERR(mmc->supply.vmmc)) 918 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 919 920 if (host->set_pwr) 921 host->set_pwr(host->pdev, 0); 922} 923 924static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host) 925{ 926 u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT); 927 928 val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT; 929 return 1 << (13 + val); 930} 931 932static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host) 933{ 934 unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max; 935 936 host->mmc->max_busy_timeout = host->get_timeout_cycles(host) / 937 (clk_rate / MSEC_PER_SEC); 938} 939 940/* Set MMC clock / power. 941 * Note: This controller uses a simple divider scheme therefore it cannot 942 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 943 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 944 * slowest setting. 945 */ 946static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 947{ 948 struct tmio_mmc_host *host = mmc_priv(mmc); 949 struct device *dev = &host->pdev->dev; 950 unsigned long flags; 951 952 mutex_lock(&host->ios_lock); 953 954 spin_lock_irqsave(&host->lock, flags); 955 if (host->mrq) { 956 if (IS_ERR(host->mrq)) { 957 dev_dbg(dev, 958 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 959 current->comm, task_pid_nr(current), 960 ios->clock, ios->power_mode); 961 host->mrq = ERR_PTR(-EINTR); 962 } else { 963 dev_dbg(dev, 964 "%s.%d: CMD%u active since %lu, now %lu!\n", 965 current->comm, task_pid_nr(current), 966 host->mrq->cmd->opcode, host->last_req_ts, 967 jiffies); 968 } 969 spin_unlock_irqrestore(&host->lock, flags); 970 971 mutex_unlock(&host->ios_lock); 972 return; 973 } 974 975 /* Disallow new mrqs and work handlers to run */ 976 host->mrq = ERR_PTR(-EBUSY); 977 978 spin_unlock_irqrestore(&host->lock, flags); 979 980 switch (ios->power_mode) { 981 case MMC_POWER_OFF: 982 tmio_mmc_power_off(host); 983 /* For R-Car Gen2+, we need to reset SDHI specific SCC */ 984 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) 985 tmio_mmc_reset(host, false); 986 987 host->set_clock(host, 0); 988 break; 989 case MMC_POWER_UP: 990 tmio_mmc_power_on(host, ios->vdd); 991 host->set_clock(host, ios->clock); 992 tmio_mmc_set_bus_width(host, ios->bus_width); 993 break; 994 case MMC_POWER_ON: 995 host->set_clock(host, ios->clock); 996 tmio_mmc_set_bus_width(host, ios->bus_width); 997 break; 998 } 999 1000 if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT) 1001 tmio_mmc_max_busy_timeout(host); 1002 1003 /* Let things settle. delay taken from winCE driver */ 1004 usleep_range(140, 200); 1005 if (PTR_ERR(host->mrq) == -EINTR) 1006 dev_dbg(&host->pdev->dev, 1007 "%s.%d: IOS interrupted: clk %u, mode %u", 1008 current->comm, task_pid_nr(current), 1009 ios->clock, ios->power_mode); 1010 1011 /* Ready for new mrqs */ 1012 host->mrq = NULL; 1013 host->clk_cache = ios->clock; 1014 1015 mutex_unlock(&host->ios_lock); 1016} 1017 1018static int tmio_mmc_get_ro(struct mmc_host *mmc) 1019{ 1020 struct tmio_mmc_host *host = mmc_priv(mmc); 1021 1022 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 1023 TMIO_STAT_WRPROTECT); 1024} 1025 1026static int tmio_mmc_get_cd(struct mmc_host *mmc) 1027{ 1028 struct tmio_mmc_host *host = mmc_priv(mmc); 1029 1030 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 1031 TMIO_STAT_SIGSTATE); 1032} 1033 1034static int tmio_multi_io_quirk(struct mmc_card *card, 1035 unsigned int direction, int blk_size) 1036{ 1037 struct tmio_mmc_host *host = mmc_priv(card->host); 1038 1039 if (host->multi_io_quirk) 1040 return host->multi_io_quirk(card, direction, blk_size); 1041 1042 return blk_size; 1043} 1044 1045static struct mmc_host_ops tmio_mmc_ops = { 1046 .request = tmio_mmc_request, 1047 .set_ios = tmio_mmc_set_ios, 1048 .get_ro = tmio_mmc_get_ro, 1049 .get_cd = tmio_mmc_get_cd, 1050 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 1051 .multi_io_quirk = tmio_multi_io_quirk, 1052}; 1053 1054static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 1055{ 1056 struct tmio_mmc_data *pdata = host->pdata; 1057 struct mmc_host *mmc = host->mmc; 1058 int err; 1059 1060 err = mmc_regulator_get_supply(mmc); 1061 if (err) 1062 return err; 1063 1064 /* use ocr_mask if no regulator */ 1065 if (!mmc->ocr_avail) 1066 mmc->ocr_avail = pdata->ocr_mask; 1067 1068 /* 1069 * try again. 1070 * There is possibility that regulator has not been probed 1071 */ 1072 if (!mmc->ocr_avail) 1073 return -EPROBE_DEFER; 1074 1075 return 0; 1076} 1077 1078static void tmio_mmc_of_parse(struct platform_device *pdev, 1079 struct mmc_host *mmc) 1080{ 1081 const struct device_node *np = pdev->dev.of_node; 1082 1083 if (!np) 1084 return; 1085 1086 /* 1087 * DEPRECATED: 1088 * For new platforms, please use "disable-wp" instead of 1089 * "toshiba,mmc-wrprotect-disable" 1090 */ 1091 if (of_property_read_bool(np, "toshiba,mmc-wrprotect-disable")) 1092 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1093} 1094 1095struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 1096 struct tmio_mmc_data *pdata) 1097{ 1098 struct tmio_mmc_host *host; 1099 struct mmc_host *mmc; 1100 void __iomem *ctl; 1101 int ret; 1102 1103 ctl = devm_platform_ioremap_resource(pdev, 0); 1104 if (IS_ERR(ctl)) 1105 return ERR_CAST(ctl); 1106 1107 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 1108 if (!mmc) 1109 return ERR_PTR(-ENOMEM); 1110 1111 host = mmc_priv(mmc); 1112 host->ctl = ctl; 1113 host->mmc = mmc; 1114 host->pdev = pdev; 1115 host->pdata = pdata; 1116 host->ops = tmio_mmc_ops; 1117 mmc->ops = &host->ops; 1118 1119 ret = mmc_of_parse(host->mmc); 1120 if (ret) { 1121 host = ERR_PTR(ret); 1122 goto free; 1123 } 1124 1125 tmio_mmc_of_parse(pdev, mmc); 1126 1127 platform_set_drvdata(pdev, host); 1128 1129 return host; 1130free: 1131 mmc_free_host(mmc); 1132 1133 return host; 1134} 1135EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc); 1136 1137void tmio_mmc_host_free(struct tmio_mmc_host *host) 1138{ 1139 mmc_free_host(host->mmc); 1140} 1141EXPORT_SYMBOL_GPL(tmio_mmc_host_free); 1142 1143int tmio_mmc_host_probe(struct tmio_mmc_host *_host) 1144{ 1145 struct platform_device *pdev = _host->pdev; 1146 struct tmio_mmc_data *pdata = _host->pdata; 1147 struct mmc_host *mmc = _host->mmc; 1148 int ret; 1149 1150 /* 1151 * Check the sanity of mmc->f_min to prevent host->set_clock() from 1152 * looping forever... 1153 */ 1154 if (mmc->f_min == 0) 1155 return -EINVAL; 1156 1157 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1158 _host->write16_hook = NULL; 1159 1160 if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles) 1161 _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles; 1162 1163 _host->set_pwr = pdata->set_pwr; 1164 1165 ret = tmio_mmc_init_ocr(_host); 1166 if (ret < 0) 1167 return ret; 1168 1169 /* 1170 * Look for a card detect GPIO, if it fails with anything 1171 * else than a probe deferral, just live without it. 1172 */ 1173 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); 1174 if (ret == -EPROBE_DEFER) 1175 return ret; 1176 1177 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1178 mmc->caps2 |= pdata->capabilities2; 1179 mmc->max_segs = pdata->max_segs ? : 32; 1180 mmc->max_blk_size = TMIO_MAX_BLK_SIZE; 1181 mmc->max_blk_count = pdata->max_blk_count ? : 1182 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs; 1183 mmc->max_req_size = min_t(size_t, 1184 mmc->max_blk_size * mmc->max_blk_count, 1185 dma_max_mapping_size(&pdev->dev)); 1186 mmc->max_seg_size = mmc->max_req_size; 1187 1188 if (mmc_can_gpio_ro(mmc)) 1189 _host->ops.get_ro = mmc_gpio_get_ro; 1190 1191 if (mmc_can_gpio_cd(mmc)) 1192 _host->ops.get_cd = mmc_gpio_get_cd; 1193 1194 /* must be set before tmio_mmc_reset() */ 1195 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) || 1196 mmc->caps & MMC_CAP_NEEDS_POLL || 1197 !mmc_card_is_removable(mmc)); 1198 1199 /* 1200 * While using internal tmio hardware logic for card detection, we need 1201 * to ensure it stays powered for it to work. 1202 */ 1203 if (_host->native_hotplug) 1204 pm_runtime_get_noresume(&pdev->dev); 1205 1206 _host->sdio_irq_enabled = false; 1207 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1208 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1209 1210 if (!_host->sdcard_irq_mask_all) 1211 _host->sdcard_irq_mask_all = TMIO_MASK_ALL; 1212 1213 _host->set_clock(_host, 0); 1214 tmio_mmc_reset(_host, false); 1215 1216 spin_lock_init(&_host->lock); 1217 mutex_init(&_host->ios_lock); 1218 1219 /* Init delayed work for request timeouts */ 1220 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1221 INIT_WORK(&_host->done, tmio_mmc_done_work); 1222 1223 /* See if we also get DMA */ 1224 tmio_mmc_request_dma(_host, pdata); 1225 1226 pm_runtime_get_noresume(&pdev->dev); 1227 pm_runtime_set_active(&pdev->dev); 1228 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1229 pm_runtime_use_autosuspend(&pdev->dev); 1230 pm_runtime_enable(&pdev->dev); 1231 1232 ret = mmc_add_host(mmc); 1233 if (ret) 1234 goto remove_host; 1235 1236 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1237 pm_runtime_put(&pdev->dev); 1238 1239 return 0; 1240 1241remove_host: 1242 pm_runtime_put_noidle(&pdev->dev); 1243 tmio_mmc_host_remove(_host); 1244 return ret; 1245} 1246EXPORT_SYMBOL_GPL(tmio_mmc_host_probe); 1247 1248void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1249{ 1250 struct platform_device *pdev = host->pdev; 1251 struct mmc_host *mmc = host->mmc; 1252 1253 pm_runtime_get_sync(&pdev->dev); 1254 1255 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) 1256 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 1257 1258 dev_pm_qos_hide_latency_limit(&pdev->dev); 1259 1260 mmc_remove_host(mmc); 1261 cancel_work_sync(&host->done); 1262 cancel_delayed_work_sync(&host->delayed_reset_work); 1263 tmio_mmc_release_dma(host); 1264 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all); 1265 1266 if (host->native_hotplug) 1267 pm_runtime_put_noidle(&pdev->dev); 1268 1269 pm_runtime_disable(&pdev->dev); 1270 pm_runtime_dont_use_autosuspend(&pdev->dev); 1271 pm_runtime_put_noidle(&pdev->dev); 1272} 1273EXPORT_SYMBOL_GPL(tmio_mmc_host_remove); 1274 1275#ifdef CONFIG_PM 1276static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 1277{ 1278 if (!host->clk_enable) 1279 return -ENOTSUPP; 1280 1281 return host->clk_enable(host); 1282} 1283 1284static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) 1285{ 1286 if (host->clk_disable) 1287 host->clk_disable(host); 1288} 1289 1290int tmio_mmc_host_runtime_suspend(struct device *dev) 1291{ 1292 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1293 1294 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all); 1295 1296 if (host->clk_cache) 1297 host->set_clock(host, 0); 1298 1299 tmio_mmc_clk_disable(host); 1300 1301 return 0; 1302} 1303EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend); 1304 1305int tmio_mmc_host_runtime_resume(struct device *dev) 1306{ 1307 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1308 1309 tmio_mmc_clk_enable(host); 1310 tmio_mmc_reset(host, false); 1311 1312 if (host->clk_cache) 1313 host->set_clock(host, host->clk_cache); 1314 1315 tmio_mmc_enable_dma(host, true); 1316 1317 return 0; 1318} 1319EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume); 1320#endif 1321 1322MODULE_LICENSE("GPL v2"); 1323