/linux-master/drivers/gpu/drm/solomon/ |
H A D | ssd130x.c | 1093 static int ssd130x_primary_plane_atomic_check(struct drm_plane *plane, argument 1096 struct drm_device *drm = plane->dev; 1098 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 1142 static int ssd132x_primary_plane_atomic_check(struct drm_plane *plane, argument 1145 struct drm_device *drm = plane->dev; 1147 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 1191 static int ssd133x_primary_plane_atomic_check(struct drm_plane *plane, argument 1194 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 1214 static void ssd130x_primary_plane_atomic_update(struct drm_plane *plane, argument 1217 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 1249 ssd132x_primary_plane_atomic_update(struct drm_plane *plane, struct drm_atomic_state *state) argument 1284 ssd133x_primary_plane_atomic_update(struct drm_plane *plane, struct drm_atomic_state *state) argument 1317 ssd130x_primary_plane_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) argument 1341 ssd132x_primary_plane_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) argument 1365 ssd133x_primary_plane_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) argument 1390 ssd130x_primary_plane_reset(struct drm_plane *plane) argument 1403 ssd130x_primary_plane_duplicate_state(struct drm_plane *plane) argument 1427 ssd130x_primary_plane_destroy_state(struct drm_plane *plane, struct drm_plane_state *state) argument [all...] |
/linux-master/drivers/gpu/drm/hisilicon/hibmc/ |
H A D | hibmc_drm_de.c | 55 static int hibmc_plane_atomic_check(struct drm_plane *plane, argument 59 plane); 74 drm_dbg_atomic(plane->dev, "scale not support\n"); 79 drm_dbg_atomic(plane->dev, "crtc_x/y of drm_plane state is invalid\n"); 90 drm_dbg_atomic(plane->dev, "visible portion of plane is invalid\n"); 95 drm_dbg_atomic(plane->dev, "wrong stride with 128-byte aligned\n"); 101 static void hibmc_plane_atomic_update(struct drm_plane *plane, argument 105 plane); 109 struct hibmc_drm_private *priv = to_hibmc_drm_private(plane 506 struct drm_plane *plane = &priv->primary_plane; local [all...] |
/linux-master/drivers/gpu/drm/mxsfb/ |
H A D | mxsfb_kms.c | 319 /* The primary plane has to be enabled when the CRTC is active. */ 521 static int mxsfb_plane_atomic_check(struct drm_plane *plane, argument 525 plane); 526 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev); 538 static void mxsfb_plane_primary_atomic_update(struct drm_plane *plane, argument 541 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane->dev); 543 plane); 551 static void mxsfb_plane_overlay_atomic_update(struct drm_plane *plane, argument 555 plane); 556 struct mxsfb_drm_private *mxsfb = to_mxsfb_drm_private(plane 614 mxsfb_plane_overlay_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) argument 622 mxsfb_format_mod_supported(struct drm_plane *plane, uint32_t format, uint64_t modifier) argument [all...] |
/linux-master/drivers/gpu/drm/hisilicon/kirin/ |
H A D | kirin_drm_drv.c | 41 struct drm_plane *plane, 58 ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, 70 static int kirin_drm_plane_init(struct drm_device *dev, struct drm_plane *plane, argument 76 ret = drm_universal_plane_init(dev, plane, 1, data->plane_funcs, 81 DRM_ERROR("fail to init plane, ch=%d\n", 0); 85 drm_plane_helper_add(plane, data->plane_helper_funcs); 128 * plane init 129 * TODO: Now only support primary plane, overlay planes 189 /* reset all the states of crtc/plane/encoder/connector */ 40 kirin_drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *plane, const struct kirin_drm_data *driver_data) argument
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/linux-master/drivers/gpu/drm/tidss/ |
H A D | tidss_kms.c | 52 struct drm_plane *plane; local 63 * x/y/z position or activity of any plane on that CRTC 64 * changes. This is needed for updating the plane positions in 71 for_each_oldnew_plane_in_state(state, plane, opstate, npstate, i) { 187 /* then create a plane, a crtc and an encoder for each panel/bridge */ 199 dev_err(tidss->dev, "plane create failed\n"); 203 tidss->planes[tidss->num_planes++] = &tplane->plane; 206 &tplane->plane); 234 dev_err(tidss->dev, "plane create failed\n"); 238 tidss->planes[tidss->num_planes++] = &tplane->plane; [all...] |
/linux-master/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_crtc.c | 394 struct drm_plane *plane, 411 state = plane->state; 413 trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane), 418 DRM_DEBUG_ATOMIC("crtc %d stage:%d - plane %d sspp %d fb %d multirect_idx %d\n", 421 plane->base.id, 438 struct drm_plane *plane; local 451 drm_atomic_crtc_for_each_plane(plane, crtc) { 452 state = plane->state; 468 _dpu_crtc_blend_setup_pipe(crtc, plane, 476 _dpu_crtc_blend_setup_pipe(crtc, plane, 393 _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, struct drm_plane *plane, struct dpu_crtc_mixer *mixer, u32 num_mixers, enum dpu_stage stage, struct dpu_format *format, uint64_t modifier, struct dpu_sw_pipe *pipe, unsigned int stage_idx, struct dpu_hw_stage_cfg *stage_cfg ) argument 838 struct drm_plane *plane; local 1180 struct drm_plane *plane; local 1272 struct drm_plane *plane; local 1451 dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane, struct drm_plane *cursor) argument [all...] |
H A D | dpu_kms.c | 122 struct drm_plane *plane; local 124 drm_for_each_plane(plane, kms->dev) { 125 if (plane->fb && plane->state) { 126 dpu_plane_danger_signal_ctrl(plane, enable); 127 DPU_DEBUG("plane:%d img:%dx%d ", 128 plane->base.id, plane->fb->width, 129 plane->fb->height); 131 plane 716 struct drm_plane *primary_planes[MAX_PLANES], *plane; local [all...] |
/linux-master/drivers/gpu/drm/sprd/ |
H A D | sprd_dpu.c | 503 static int sprd_plane_atomic_check(struct drm_plane *plane, argument 507 plane); 549 static void sprd_plane_create_properties(struct sprd_plane *plane, int index) argument 556 drm_plane_create_rotation_property(&plane->base, 562 drm_plane_create_alpha_property(&plane->base); 565 drm_plane_create_blend_mode_property(&plane->base, supported_modes); 568 drm_plane_create_zpos_immutable_property(&plane->base, index); 588 struct sprd_plane *plane, *primary; local 596 plane = drmm_universal_plane_alloc(drm, struct sprd_plane, base, 600 if (IS_ERR(plane)) { 826 struct sprd_plane *plane; local [all...] |
/linux-master/drivers/staging/media/atomisp/pci/runtime/frame/src/ |
H A D | frame.c | 32 static void frame_init_plane(struct ia_css_frame_plane *plane, 39 struct ia_css_frame_plane *plane, 46 struct ia_css_frame_plane *plane, 276 * Frames with a U and V plane of 8 bits per pixel need to have 278 * Y plane if the horizontal decimation is 2. 450 static void frame_init_plane(struct ia_css_frame_plane *plane, argument 456 plane->height = height; 457 plane->width = width; 458 plane->stride = stride; 459 plane 462 frame_init_single_plane(struct ia_css_frame *frame, struct ia_css_frame_plane *plane, unsigned int height, unsigned int subpixels_per_line, unsigned int bytes_per_pixel) argument 482 frame_init_raw_single_plane( struct ia_css_frame *frame, struct ia_css_frame_plane *plane, unsigned int height, unsigned int subpixels_per_line, unsigned int bits_per_pixel) argument [all...] |
/linux-master/drivers/gpu/drm/msm/disp/mdp4/ |
H A D | mdp4_crtc.c | 81 struct drm_plane *plane; local 84 drm_atomic_crtc_for_each_plane(plane, crtc) { 85 enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane); 155 struct drm_plane *plane; local 157 drm_atomic_crtc_for_each_plane(plane, crtc) { 158 enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane); 172 struct drm_plane *plane; local 181 drm_atomic_crtc_for_each_plane(plane, crtc) { 182 enum mdp4_pipe pipe_id = mdp4_plane_pipe(plane); 186 to_mdp_format(msm_framebuffer_format(plane 626 mdp4_crtc_init(struct drm_device *dev, struct drm_plane *plane, int id, int ovlp_id, enum mdp4_dma dma_id) argument [all...] |
/linux-master/drivers/gpu/drm/ |
H A D | drm_mode_config.c | 185 struct drm_plane *plane; local 190 drm_for_each_plane(plane, dev) 191 if (plane->funcs->reset) 192 plane->funcs->reset(plane); 493 struct drm_plane *plane, *plt; local 523 list_for_each_entry_safe(plane, plt, &dev->mode_config.plane_list, 525 plane->funcs->destroy(plane); 636 struct drm_plane *plane; local [all...] |
/linux-master/drivers/gpu/drm/renesas/rcar-du/ |
H A D | rcar_du_crtc.c | 329 static unsigned int plane_zpos(struct rcar_du_plane *plane) argument 331 return plane->plane.state->normalized_zpos; 335 plane_format(struct rcar_du_plane *plane) argument 337 return to_rcar_plane_state(plane->plane.state)->format; 352 struct rcar_du_plane *plane = &rcrtc->group->planes[i]; local 355 if (plane->plane.state->crtc != &rcrtc->crtc || 356 !plane 371 struct rcar_du_plane *plane = planes[i]; local 928 struct drm_plane *plane = &rcrtc->vsp->planes[i].plane; local [all...] |
/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_plane_initial.c | 27 struct intel_plane *plane = local 30 to_intel_plane_state(plane->base.state); 67 "Initial plane programming missing PTE_LM bit\n"); 79 "Initial plane memory region not initialized\n"); 89 "Initial plane programming using invalid range, dma_addr=%pa (%s [%pa-%pa])\n", 95 "Using dma_addr=%pa, based on initial plane programming\n", 116 "Initial plane memory region not initialized\n"); 258 "Initial plane fb bound to 0x%x in the ggtt (original 0x%x)\n", 325 struct intel_plane *plane = local 328 to_intel_plane_state(plane [all...] |
H A D | skl_scaler.c | 121 * the 90/270 degree plane rotation cases (to match the 141 * if plane is being disabled or scaler is no more required or force detach 142 * - free scaler binded to this plane/crtc 147 * update to free the scaler is done in plane/panel-fit programming. 214 * on the earlier platforms. So even when we're scaling a plane 227 /* mark this plane as a scaler user in crtc_state */ 259 * skl_update_scaler_plane - Stages update to scaler state for a given plane. 261 * @plane_state: atomic plane state to update 271 to_intel_plane(plane_state->uapi.plane); 381 struct intel_plane *plane local 505 struct drm_plane *plane = NULL; local 763 skl_program_plane_scaler(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) argument [all...] |
/linux-master/drivers/gpu/drm/msm/disp/mdp5/ |
H A D | mdp5_smp.c | 39 static inline u32 pipe2client(enum mdp5_pipe pipe, int plane) argument 43 if (WARN_ON(plane >= pipe2nclients(pipe))) 53 * Y plane's client ID is N 54 * Cr plane's client ID is N + 1 55 * Cb plane's client ID is N + 2 58 return mdp5_cfg->smp.clients[pipe] + plane; 345 struct drm_plane *plane = hwpstate->hwpipe_to_plane[hwpipe->idx]; local 354 plane ? plane->name : NULL);
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H A D | mdp5_crtc.c | 114 struct drm_plane *plane; local 121 drm_atomic_crtc_for_each_plane(plane, crtc) { 122 if (!plane->state->visible) 124 flush_mask |= mdp5_plane_get_flush(plane); 217 struct drm_plane *plane; local 242 /* Collect all plane information */ 243 drm_atomic_crtc_for_each_plane(plane, crtc) { 246 if (!plane->state->visible) 249 pstate = to_mdp5_plane_state(plane->state); 251 stage[pstate->stage][PIPE_LEFT] = mdp5_plane_pipe(plane); 650 struct drm_plane *plane; member in struct:plane_state 701 struct drm_plane *plane; local 1320 mdp5_crtc_init(struct drm_device *dev, struct drm_plane *plane, struct drm_plane *cursor_plane, int id) argument [all...] |
/linux-master/drivers/gpu/drm/i915/selftests/ |
H A D | i915_vma.c | 365 return (r->plane[n].src_stride * (r->plane[n].height - y - 1) + 366 r->plane[n].offset + x); 376 for (x = 0; x < r->plane[n].width; x++) { 379 for (y = 0; y < r->plane[n].height; y++) { 384 pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n", 408 left = (r->plane[n].dst_stride - y) * PAGE_SIZE; 414 pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n", 442 return (r->plane[n].src_stride * y + 443 r->plane[ [all...] |
/linux-master/include/drm/ |
H A D | drm_gem_vram_helper.h | 122 drm_gem_vram_plane_helper_prepare_fb(struct drm_plane *plane, 125 drm_gem_vram_plane_helper_cleanup_fb(struct drm_plane *plane,
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/linux-master/drivers/gpu/drm/imx/dcss/ |
H A D | dcss-dpr.c | 222 int plane, max_planes = 1; local 229 for (plane = 0; plane < max_planes; plane++) { 230 yres = plane == 1 ? yres >> 1 : yres; 236 DCSS_DPR_FRAME_1P_PIX_X_CTRL + plane * gap); 238 DCSS_DPR_FRAME_1P_PIX_Y_CTRL + plane * gap); 240 dcss_dpr_write(ch, 2, DCSS_DPR_FRAME_1P_CTRL0 + plane * gap);
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H A D | dcss-crtc.c | 190 crtc->plane[0] = dcss_plane_init(drm, drm_crtc_mask(&crtc->base), 192 if (IS_ERR(crtc->plane[0])) 193 return PTR_ERR(crtc->plane[0]); 198 ret = drm_crtc_init_with_planes(drm, &crtc->base, &crtc->plane[0]->base,
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/linux-master/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | display_mode_core.c | 4889 dml_print("DML::%s: k=%u minDET_pipe = %u (assume each plane take half DET)\n", __func__, k, minDET_pipe); 5503 /// @brief Determine the ODM mode and number of DPP used per plane based on dispclk, dsc usage, odm usage policy 5632 /// @brief Determine DPPCLK if there only one DPP per plane, main factor is the pixel rate and DPP scaling parameter 5684 /// @param DPPCLKUsingSingleDPP DppClk freq required if there is only 1 DPP per plane 5685 /// @param DPPPerSurface Number of DPP for each plane 6225 CalculatePrefetchSchedule_params->DPP_RECOUT_WIDTH = (dml_uint_t)(mode_lib->ms.SwathWidthYThisState[k] / mode_lib->ms.cache_display_cfg.plane.HRatio[k]); 6228 CalculatePrefetchSchedule_params->GPUVMPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels; 6229 CalculatePrefetchSchedule_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable; 6230 CalculatePrefetchSchedule_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable; 6231 CalculatePrefetchSchedule_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane [all...] |
H A D | dml2_dc_resource_mgmt.c | 58 static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane, argument 70 if (state->stream_status[i].plane_states[j] == plane && 512 static bool is_plane_in_odm_slice(const struct dc_plane_state *plane, unsigned int slice_index, unsigned int *odm_slice_end_x, unsigned int num_slices) argument 523 if (plane->clip_rect.x + plane->clip_rect.width < slice_start_x) 526 if (plane->clip_rect.x > slice_end_x) 540 // MPCC Combine + ODM Combine is not supported, so there should never be a case where the current plane 558 const struct dc_plane_state *plane, 638 const struct dc_plane_state *plane, 653 if (!get_plane_id(ctx, state, plane, strea 556 add_plane_to_blend_tree(struct dml2_context *ctx, struct dc_state *state, const struct dc_plane_state *plane, struct dc_plane_pipe_pool *pipe_pool, unsigned int odm_slice, struct pipe_ctx *top_pipe) argument 636 assign_pipes_to_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream, const struct dc_plane_state *plane, int odm_factor, int mpc_factor, int plane_index, struct dc_plane_pipe_pool *pipe_pool, const struct dc_state *existing_state) argument 699 free_unused_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_plane_state *plane, const struct dc_plane_pipe_pool *pool, unsigned int stream_id, int plane_index) argument 753 map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream, const struct dc_plane_state *plane, int plane_index, struct dc_pipe_mapping_scratch *scratch, const struct dc_state *existing_state) argument [all...] |
/linux-master/drivers/gpu/drm/mediatek/ |
H A D | mtk_drm_crtc.c | 32 * @planes: array of 4 drm_plane structures, one for each overlay plane 33 * @pending_planes: whether any plane has pending changes to be applied 283 struct drm_plane *plane, 289 unsigned int local_index = plane - mtk_crtc->planes; 300 WARN(1, "Failed to find component for plane %d\n", plane->index); 322 struct drm_plane *plane = &mtk_crtc->planes[i]; local 325 plane_state = to_mtk_plane_state(plane->state); 334 struct drm_plane *plane = &mtk_crtc->planes[i]; local 337 plane_state = to_mtk_plane_state(plane 282 mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc, struct drm_plane *plane, unsigned int *local_layer) argument 425 struct drm_plane *plane = &mtk_crtc->planes[i]; local 517 struct drm_plane *plane = &mtk_crtc->planes[i]; local 542 struct drm_plane *plane = &mtk_crtc->planes[i]; local 583 struct drm_plane *plane = &mtk_crtc->planes[i]; local 710 mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane, struct mtk_plane_state *state) argument 722 mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane, struct drm_atomic_state *state) argument 773 struct drm_plane *plane = &mtk_crtc->planes[i]; local [all...] |
/linux-master/drivers/gpu/drm/meson/ |
H A D | meson_overlay.c | 168 static int meson_overlay_atomic_check(struct drm_plane *plane, argument 172 plane); 229 struct drm_plane *plane, 234 struct drm_plane_state *state = plane->state; 471 static void meson_overlay_atomic_update(struct drm_plane *plane, argument 474 struct meson_overlay *meson_overlay = to_meson_overlay(plane); 476 plane); 550 meson_overlay_setup_scaler_params(priv, plane, interlace_mode); 659 DRM_DEBUG("plane 2 addr 0x%x stride %d height %d\n", 671 DRM_DEBUG("plane 228 meson_overlay_setup_scaler_params(struct meson_drm *priv, struct drm_plane *plane, bool interlace_mode) argument 725 meson_overlay_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) argument 753 meson_overlay_format_mod_supported(struct drm_plane *plane, u32 format, u64 modifier) argument 837 struct drm_plane *plane; local [all...] |
/linux-master/drivers/gpu/drm/sun4i/ |
H A D | sun4i_backend.h | 199 int layer, struct drm_plane *plane); 201 int layer, struct drm_plane *plane); 203 int layer, struct drm_plane *plane); 207 int layer, struct drm_plane *plane);
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