Searched refs:x3 (Results 151 - 175 of 223) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/network/ether/ipro100/dev/fxp/
H A Dif_fxpreg.h330 #define FXP_CB_COMMAND_MCAS 0x3
/haiku/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/
H A De1000_phy.h276 #define E1000_KMRNCTRLSTA_DIAG_OFFSET 0x3 /* Kumeran Diagnostic */
/haiku/src/add-ons/kernel/drivers/network/wlan/ralinkwifi/dev/ral/
H A Drt2661reg.h169 #define RT2661_TSF_MODE(x) (((x) & 0x3) << 17)
/haiku/src/add-ons/kernel/drivers/network/wlan/iaxwifi200/dev/pci/
H A Dif_iwxvar.h598 #define IWX_CFG_RF_ID_JF 0x3
/haiku/src/system/kernel/arch/m68k/
H A Darch_int.cpp142 case 0x3:
/haiku/src/libs/compat/freebsd_network/compat/dev/pci/
H A Dpcireg.h628 #define PCIR_VENDOR_DATA 0x3
909 #define PCIR_PCIAF_CAP 0x3
/haiku/src/add-ons/kernel/drivers/network/ether/dec21xxx/dev/dc/
H A Dif_dcreg.h71 #define DC_TYPE_987x5 0x3
112 #define DC_PMODE_SIA 0x3
/haiku/src/add-ons/accelerants/radeon_hd/
H A Ddisplayport.cpp584 return ((l >> s) & 0x3) << DP_TRAIN_VCC_SWING_SHIFT;
596 return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
/haiku/src/add-ons/kernel/bus_managers/acpi/acpica/include/
H A Dactypes.h954 #define ACPI_MAX_NOTIFY_HANDLER_TYPE 0x3
1303 #define ACPI_TABLE_EVENT_UNINSTALL 0x3
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_reset.c112 (1 << 21) | (0x3 << 22));
918 ah, AR_PHY_FRAME_CTL, AR_PHY_FRAME_CTL_CF_OVERLAP_WINDOW, 0x3);
1584 (0x3 << 30) | (0x1 << 13) | (0x4 << 26) | (0x60 << 19);
2804 OS_REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
3499 (((tx_gain >> 1) & 0x3) << 0);
3611 ahp->ah_rx_cal_chainmask = 0x3;
3612 ahp->ah_tx_cal_chainmask = 0x3;
3620 ahp->ah_rx_cal_chainmask = 0x3;
3621 ahp->ah_tx_cal_chainmask = 0x3;
5219 if ((rx_chainmask == 0x5) || (rx_chainmask == 0x3)) {
[all...]
H A Dar9300phy.h1659 #define AR_PHY_PAPRD_TRAINER_STAT2_PAPRD_FINE_IDX 0x3
1706 #define AR_PHY_TX_FORCED_GAIN_FORCED_TXBB6DBGAIN 0x3
1716 #define AR_PHY_TX_FORCED_GAIN_FORCED_PADRVGND 0x3
H A Dar9300eep.h169 #define AR928X_ANT_CHAIN_MASK 0x3
259 // bit 3 - reduce chain mask from 0x7 to 0x3 on 2 stream rates
/haiku/src/add-ons/kernel/drivers/network/wlan/iprowifi4965/dev/iwn/
H A Dif_iwnreg.h1501 * 0x3) 54 Mbps
1904 #define IWN_RFCFG_TYPE(x) (((x) >> 0) & 0x3)
1905 #define IWN_RFCFG_STEP(x) (((x) >> 2) & 0x3)
1906 #define IWN_RFCFG_DASH(x) (((x) >> 4) & 0x3)
/haiku/src/add-ons/kernel/drivers/audio/echo/generic/
H A DCDspCommObject.h466 #define GML_44KHZ 0x3
/haiku/src/add-ons/kernel/drivers/audio/emuxki/
H A Demuxkireg.h605 #define EMU_DSP_OP_MACW1 0x3
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_misc.c638 if ((regs->dma_dbg_6 & 0x3) == check->dcu_complete_state)
H A Dar2133.c467 case 0x3:
/haiku/src/add-ons/kernel/drivers/network/ether/marvell_yukon/dev/msk/
H A Dif_mskreg.h1643 #define PHY_M_POLC_LOS_MSK (0x3<<6) /* Bit 7.. 6: LOS Pol. Ctrl. Mask */
1644 #define PHY_M_POLC_INIT_MSK (0x3<<4) /* Bit 5.. 4: INIT Pol. Ctrl. Mask */
1645 #define PHY_M_POLC_STA1_MSK (0x3<<2) /* Bit 3.. 2: STAT1 Pol. Ctrl. Mask */
1646 #define PHY_M_POLC_STA0_MSK 0x3 /* Bit 1.. 0: STAT0 Pol. Ctrl. Mask */
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8812a/
H A Dr12a_chan.c336 switch ((swing >> i * 2) & 0x3) {
/haiku/src/add-ons/accelerants/intel_extreme/
H A DFlexibleDisplayInterface.cpp718 write32(txControl, read32(txControl) | (0x3 << 8));
/haiku/src/libs/compat/openbsd_network/compat/dev/pci/
H A Dpcireg.h711 #define PCI_VPDRES_TYPE_COMPATIBLE_DEVICE_ID 0x3 /* small */
/haiku/src/libs/compat/openbsd_wlan/net80211/
H A Dieee80211_pae_output.c530 info |= (k->k_id & 0x3) << EAPOL_KEY_WPA_KID_SHIFT;
/haiku/src/add-ons/kernel/bus_managers/ps2/
H A Dps2_elantech.cpp205 if (val[0] != 0x3c || val[1] != 0x3 || (val[2] != 0xc8 && val[2] != 0x0)) {
/haiku/src/add-ons/kernel/drivers/power/x86_cpuidle/
H A Dacpi_cpuidle.cpp48 #define ACPI_CSTATE_FFH 0x3
/haiku/src/add-ons/kernel/drivers/ports/pc_serial/
H A DDriver.cpp112 { B_PCI_BUS, VN" 16550 Serial Port", sDefaultRates, NULL, { 8, 8, 8, (uint8)~0x3, 2, 0x000f },

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