/linux-master/drivers/gpu/drm/ |
H A D | drm_mode_config.c | 659 WARN(!crtc->primary, "Missing primary plane on [CRTC:%d:%s]\n", 672 if (crtc->primary) { 673 WARN(!(crtc->primary->possible_crtcs & drm_crtc_mask(crtc)), 674 "Bogus primary plane possible_crtcs: [PLANE:%d:%s] must be compatible with [CRTC:%d:%s]\n", 675 crtc->primary->base.id, crtc->primary->name, 677 WARN(primary_with_crtc & drm_plane_mask(crtc->primary), 679 crtc->primary->base.id, crtc->primary [all...] |
H A D | drm_debugfs.c | 163 struct drm_minor *minor = entry->dev->primary ?: entry->dev->accel; 622 struct drm_minor *minor = encoder->dev->primary;
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H A D | drm_crtc.c | 236 struct drm_plane *primary, 244 WARN_ON(primary && primary->type != DRM_PLANE_TYPE_PRIMARY); 286 crtc->primary = primary; 288 if (primary && !primary->possible_crtcs) 289 primary->possible_crtcs = drm_crtc_mask(crtc); 313 * specified primary and cursor planes. 316 * @primary 235 __drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary, struct drm_plane *cursor, const struct drm_crtc_funcs *funcs, const char *name, va_list ap) argument 341 drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary, struct drm_plane *cursor, const struct drm_crtc_funcs *funcs, const char *name, ...) argument 370 __drmm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary, struct drm_plane *cursor, const struct drm_crtc_funcs *funcs, const char *name, va_list args) argument 423 drmm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary, struct drm_plane *cursor, const struct drm_crtc_funcs *funcs, const char *name, ...) argument 443 __drmm_crtc_alloc_with_planes(struct drm_device *dev, size_t size, size_t offset, struct drm_plane *primary, struct drm_plane *cursor, const struct drm_crtc_funcs *funcs, const char *name, ...) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm_crtc.c | 507 * We require the primary plane to be enabled whenever the CRTC is, otherwise 513 !(crtc_state->plane_mask & drm_plane_mask(crtc->primary))) { 514 DRM_DEBUG_ATOMIC("Can't enable a CRTC without enabling the primary plane\n");
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | dce_v8_0.c | 182 * Triggers the actual pageflip by updating the primary 189 struct drm_framebuffer *fb = amdgpu_crtc->base.primary->fb; 197 /* update the primary scanout addresses */ 1811 if (!atomic && !crtc->primary->fb) { 1819 target_fb = crtc->primary->fb; 2003 if (!atomic && fb && fb != crtc->primary->fb) { 2477 if (crtc->primary->fb) { 2481 abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); 3335 /* these are handled by the primary encoders */ 3495 /* these are handled by the primary encoder [all...] |
H A D | dce_v6_0.c | 198 struct drm_framebuffer *fb = amdgpu_crtc->base.primary->fb; 1844 if (!atomic && !crtc->primary->fb) { 1852 target_fb = crtc->primary->fb; 2034 if (!atomic && fb && fb != crtc->primary->fb) { 2473 if (crtc->primary->fb) { 2477 abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); 3253 /* these are handled by the primary encoders */ 3420 /* these are handled by the primary encoders */
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H A D | dce_v11_0.c | 255 * Triggers the actual pageflip by updating the primary 262 struct drm_framebuffer *fb = amdgpu_crtc->base.primary->fb; 1914 if (!atomic && !crtc->primary->fb) { 1922 target_fb = crtc->primary->fb; 2126 if (!atomic && fb && fb != crtc->primary->fb) { 2642 if (crtc->primary->fb) { 2646 abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); 3557 /* these are handled by the primary encoders */ 3723 /* these are handled by the primary encoders */
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H A D | dce_v10_0.c | 231 * Triggers the actual pageflip by updating the primary 238 struct drm_framebuffer *fb = amdgpu_crtc->base.primary->fb; 249 /* update the primary scanout address */ 1864 if (!atomic && !crtc->primary->fb) { 1872 target_fb = crtc->primary->fb; 2076 if (!atomic && fb && fb != crtc->primary->fb) { 2558 if (crtc->primary->fb) { 2562 abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); 3426 /* these are handled by the primary encoders */ 3586 /* these are handled by the primary encoder [all...] |
H A D | atombios_encoders.c | 204 "amdgpu_bl%d", dev->primary->index);
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H A D | amdgpu_vkms.c | 171 struct drm_plane *primary, struct drm_plane *cursor) 177 ret = drm_crtc_init_with_planes(dev, crtc, primary, cursor, 295 /* for now primary plane must be visible and full screen */ 427 struct drm_plane *primary, *cursor = NULL; local 430 primary = amdgpu_vkms_plane_init(dev, DRM_PLANE_TYPE_PRIMARY, index); 431 if (IS_ERR(primary)) 432 return PTR_ERR(primary); 434 ret = amdgpu_vkms_crtc_init(dev, crtc, primary, cursor); 474 drm_plane_cleanup(primary); 170 amdgpu_vkms_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary, struct drm_plane *cursor) argument
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H A D | amdgpu_ras.c | 1850 struct drm_minor *minor = adev_to_drm(adev)->primary;
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H A D | amdgpu_kms.c | 1840 struct drm_minor *minor = adev_to_drm(adev)->primary;
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H A D | amdgpu_ib.c | 116 * On SI, there are two parallel engines fed from the primary ring, 374 * Returns 0 on success, error if the primary GFX ring 480 struct drm_minor *minor = adev_to_drm(adev)->primary;
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H A D | amdgpu_gem.c | 1034 struct drm_minor *minor = adev_to_drm(adev)->primary;
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H A D | amdgpu_fence.c | 993 struct drm_minor *minor = adev_to_drm(adev)->primary;
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H A D | amdgpu_display.c | 219 obj = crtc->primary->fb->obj[0]; 282 crtc->primary->fb = fb; 1660 struct drm_framebuffer *fb = crtc->primary->fb;
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H A D | amdgpu_debugfs.c | 1645 struct drm_minor *minor = adev_to_drm(adev)->primary; 2125 struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
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/linux-master/security/selinux/ss/ |
H A D | policydb.h | 114 unsigned char primary; /* primary name? */ member in struct:type_datum
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/linux-master/include/net/ |
H A D | bonding.h | 136 char primary[IFNAMSIZ]; member in struct:bond_params
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/linux-master/drivers/s390/block/ |
H A D | dasd_int.h | 252 __u8 primary; /* 5 Primary device address */ member in struct:dasd_pprc_dev_info 274 bool primary; member in struct:dasd_copy_entry 690 * 0x03: wrong primary specified
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H A D | dasd_ioctl.c | 420 rc = device->discipline->copy_pair_swap(device, data.primary,
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H A D | dasd_devmap.c | 622 * depending on the primary/secondary state of the device it has to be 627 bool primary) 632 if (primary) { 634 data->dev_info[i].primary == uid.real_unit_addr) 669 i = dasd_devmap_entry_from_pprc_data(data, uid, entry->primary); 676 if (entry->primary) { 678 dev_warn(&device->cdev->dev, "Copy pair secondary is setup as primary\n"); 682 data->dev_info[i].primary != uid.real_unit_addr) { 684 "Primary device %s does not match copy pair status primary device %04x\n", 687 data->dev_info[i].primary); 625 dasd_devmap_entry_from_pprc_data(struct dasd_pprc_data_sc4 *data, struct dasd_uid uid, bool primary) argument 2081 dasd_devmap_set_copy_relation(struct dasd_devmap *devmap, struct dasd_copy_relation *copy, char *busid, bool primary) argument 2190 char *primary, *secondary, *tmp, *pt; local [all...] |
/linux-master/drivers/net/wireless/realtek/rtlwifi/ |
H A D | core.c | 678 u32 primary = local 685 if (center > primary) { 688 if (center - primary == 10) { 693 } else if (center - primary == 30) { 702 if (primary - center == 10) { 707 } else if (primary - center == 30) {
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/linux-master/drivers/net/ |
H A D | netkit.c | 27 bool primary; member in struct:netkit 388 nk->primary = false; 413 nk->primary = true; 487 if (!nk->primary) 706 nkl->location == BPF_NETKIT_PRIMARY ? "primary" : "peer"); 842 if (!nk->primary) { 844 "netkit link settings can be changed only through the primary device"); 898 if (nla_put_u8(skb, IFLA_NETKIT_PRIMARY, nk->primary))
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/linux-master/drivers/net/ethernet/mellanox/mlx5/core/lib/ |
H A D | sd.h | 11 struct mlx5_core_dev *mlx5_sd_primary_get_peer(struct mlx5_core_dev *primary, int idx); 14 struct mlx5_core_dev *mlx5_sd_ch_ix_get_dev(struct mlx5_core_dev *primary, int ch_ix); 22 #define mlx5_sd_for_each_dev_from_to(i, primary, ix_from, to, pos) \ 24 (pos = mlx5_sd_primary_get_peer(primary, i)) && pos != (to); i++) 26 #define mlx5_sd_for_each_dev(i, primary, pos) \ 27 mlx5_sd_for_each_dev_from_to(i, primary, 0, NULL, pos) 29 #define mlx5_sd_for_each_dev_to(i, primary, to, pos) \ 30 mlx5_sd_for_each_dev_from_to(i, primary, 0, to, pos) 32 #define mlx5_sd_for_each_secondary(i, primary, pos) \ 33 mlx5_sd_for_each_dev_from_to(i, primary, [all...] |