Searched refs:code (Results 126 - 150 of 1522) sorted by path

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/linux-master/arch/arm/kernel/
H A Dentry-common.S101 * "notrace" version to avoid calling into the tracing code unnecessarily.
247 bic scno, scno, #0xff000000 @ mask off SWI op-code
H A Djump_label.c11 void *addr = (void *)entry->code;
15 insn = arm_gen_branch(entry->code, entry->target);
H A Dperf_event_v7.c3 * ARMv7 Cortex-A8 and Cortex-A9 Performance Events handling code.
8 * Copied from ARMv6 code, with the low level code inspired
9 * by the ARMv7 Oprofile code.
1292 * Example: 0x12021 is a Krait CPU event in PMRESR2's group 1 with code 2
1295 * unit, etc.) while the event code (CC) corresponds to a particular class of
1296 * events (interrupts for example). An event code is broken down into
1404 unsigned int code = EVENT_CODE(config_base); local
1425 val |= code << group_shift;
1432 val |= code << group_shif
1583 unsigned int code = EVENT_CODE(hwc->config_base); local
1739 unsigned int code = EVENT_CODE(config_base); local
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H A Dsleep.S21 * Pseudo C-code:
71 @ Run the suspend code from the overflow stack so we don't have to rely
72 @ on vmalloc-to-phys conversions anywhere in the arch suspend code.
H A Dtraps.c175 * Note that we now dump the code first, just in case the backtrace
515 * platform code and can be overrideen using set_fiq_handler.
735 baddataabort(int code, unsigned long instr, struct pt_regs *regs) argument
742 pr_err("[%d] %s: bad data abort: code %d instr 0x%08lx\n",
743 task_pid_nr(current), current->comm, code, instr);
749 arm_notify_die("unknown data abort code", regs,
959 * code modifies a PMD entry in the vmalloc region. Use release semantics on
/linux-master/arch/arm/mach-mv78xx0/
H A Dbuffalo-wxl-setup.c110 .code = KEY_OPTION,
/linux-master/arch/arm/mach-omap2/
H A Dsleep34xx.S82 * Function to call rom code to save secure ram context.
93 mov r1, #0 @ set task id for ROM code in r1
115 * omap34xx_cpu_suspend() - This bit of code saves the CPU context if needed
143 * For non-OFF modes: jump to the WFI code in SRAM (omap3_do_wfi_sram)
148 bxeq r5 @ jump to the WFI code in SRAM
151 /* Otherwise fall through to the save context code */
155 * - reuse that code is better
199 * This code gets copied to internal SRAM and is accessible
243 * mode the ROM code configures the SDRC and
244 * the DPLL before calling the restore code directl
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/linux-master/arch/arm/mach-orion5x/
H A Ddns323-setup.c343 .code = KEY_RESTART,
348 .code = KEY_POWER,
362 .code = KEY_POWER,
H A Dmv2120-setup.c81 .code = KEY_RESTART,
86 .code = KEY_POWER,
H A Dnet2big-setup.c315 .code = NET2BIG_SWITCH_POWER_OFF,
322 .code = NET2BIG_SWITCH_POWER_ON,
329 .code = KEY_POWER,
H A Dts409-setup.c219 .code = KEY_RESTART,
224 .code = KEY_COPY,
/linux-master/arch/arm/mach-pxa/
H A Dspitz.c410 .code = KEY_SUSPEND,
418 .code = 0,
424 .code = 1,
/linux-master/arch/arm/mach-s3c/
H A Dmach-crag6410.c208 .code = KEY_SUSPEND,
215 .code = SW_FRONT_PROXIMITY,
/linux-master/arch/arm/mach-sa1100/
H A Dcollie.c234 .code = KEY_RESERVED,
242 .code = KEY_WAKEUP,
/linux-master/arch/arm/mm/
H A Dfault.c183 int code, struct pt_regs *regs)
194 pr_err("%s: unhandled page fault (%d) at 0x%08lx, code 0x%03x\n",
210 force_sig_fault(sig, code, (void __user *)addr);
268 int sig, code; local
325 code = SEGV_ACCERR;
352 code = SEGV_MAPERR;
363 code = SEGV_ACCERR;
397 code = SEGV_MAPERR;
422 code = BUS_ADRERR;
431 __do_user_fault(addr, fsr, sig, code, reg
182 __do_user_fault(unsigned long addr, unsigned int fsr, unsigned int sig, int code, struct pt_regs *regs) argument
564 int code; member in struct:fsr_info
576 hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, int code, const char *name) argument
609 hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, int code, const char *name) argument
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/linux-master/arch/arm/net/
H A Dbpf_jit_32.c74 * Such calls are "invisible" in the eBPF code, so it is up to the calling
76 * JIT emits code to push and pop those registers onto the stack, immediately
194 * JITed code.
195 * target : final JITed code.
403 /* total stack size used in JITed code */
1591 const u8 code = insn->code; local
1599 const bool is64 = BPF_CLASS(code) == BPF_ALU64;
1614 switch (code) {
1622 switch (BPF_SRC(code)) {
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/linux-master/arch/arm/nwfpe/
H A Dentry.S15 It is called from the kernel with code similar to this:
33 the user code. If the emulator is unable to emulate the instruction,
78 @ if condition code failed to match, next insn
/linux-master/arch/arm/probes/kprobes/
H A Dopt-arm.c184 kprobe_opcode_t *code; local
192 code = get_optinsn_slot();
193 if (!code)
221 rel_chk = (unsigned long)((long)code -
226 * Different from x86, we free code buf directly instead of
230 free_optinsn_slot(code, 0);
235 memcpy(code, (unsigned long *)optprobe_template_entry,
247 code[TMPL_SUB_SP] = __opcode_to_mem_arm(0xe24dd000 | stack_protect);
249 code[TMPL_ADD_SP] = __opcode_to_mem_arm(0xe28d3000 | stack_protect);
253 code[TMPL_VAL_ID
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H A Dtest-arm.c148 TEST("mov ip, sp") /* This has special case emulation code */
1174 #define TEST_COPROCESSOR(code) TEST_UNSUPPORTED(code)
H A Dtest-core.h152 ".code "TEST_ISA" \n\t" \
191 ".code "NORMAL_ISA" \n\t" \
210 * TEST_SUPPORTED and TEST_UNSUPPORTED don't cause the code to be executed,
214 #define TEST(code) \
215 TESTCASE_START(code) \
217 TEST_INSTRUCTION(code) \
220 #define TEST_UNSUPPORTED(code) \
221 TESTCASE_START(code) \
223 TEST_INSTRUCTION(code) \
226 #define TEST_SUPPORTED(code) \
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H A Dtest-thumb.c28 #define TEST_ITBLOCK(code) \
30 TESTCASE_START(code) \
33 "1: "code" \n\t" \
244 #define TEST_POPPC(code, offset) \
245 TESTCASE_START(code) \
248 TEST_BRANCH_F(code) \
277 #define TEST_IT(code, code2) \
278 TESTCASE_START(code) \
281 "1: "code" \n\t" \
/linux-master/arch/arm64/crypto/
H A Dpoly1305-armv8.pl49 $code.=<<___;
272 $code.=<<___;
899 foreach (split("\n",$code)) {
H A Dsha512-armv8.pl4 # This code is taken from the OpenSSL project but the author (Andy Polyakov)
29 # over code generated with "default" compiler:
44 # (***) Super-impressive coefficients over gcc-generated code are
45 # indication of some compiler "pathology", most notably code
112 $code.=<<___ if ($i<16);
117 $code.=<<___ if ($i<13 && ($i&1));
120 $code.=<<___ if ($i==13);
123 $code.=<<___ if ($i>=14);
126 $code.=<<___ if ($i>0 && $i<16);
129 $code
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/linux-master/arch/arm64/hyperv/
H A Dhv_core.c45 u64 hv_do_fast_hypercall8(u16 code, u64 input) argument
50 control = (u64)code | HV_HYPERCALL_FAST_BIT;
156 * Calling code in the 'die' and 'panic' paths ensures that only
157 * one CPU is running this code, so no atomicity is needed.
/linux-master/arch/arm64/include/asm/
H A Dassembler.h9 #error "Only include this from assembly code"
132 * Select code when configured for BE.
135 #define CPU_BE(code...) code
137 #define CPU_BE(code...)
141 * Select code when configured for LE.
144 #define CPU_LE(code...)
146 #define CPU_LE(code...) code
739 * Check whether asm code shoul
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