1// SPDX-License-Identifier: GPL-2.0 2// 3// Copyright 2011 Wolfson Microelectronics plc 4// Mark Brown <broonie@opensource.wolfsonmicro.com> 5// 6// Copyright 2011 Simtec Electronics 7// Ben Dooks <ben@simtec.co.uk> 8 9#include <linux/kernel.h> 10#include <linux/list.h> 11#include <linux/serial_core.h> 12#include <linux/serial_s3c.h> 13#include <linux/platform_device.h> 14#include <linux/fb.h> 15#include <linux/io.h> 16#include <linux/init.h> 17#include <linux/input-event-codes.h> 18#include <linux/gpio.h> 19#include <linux/gpio/machine.h> 20#include <linux/leds.h> 21#include <linux/delay.h> 22#include <linux/mmc/host.h> 23#include <linux/regulator/machine.h> 24#include <linux/regulator/fixed.h> 25#include <linux/pwm.h> 26#include <linux/pwm_backlight.h> 27#include <linux/dm9000.h> 28#include <linux/gpio_keys.h> 29#include <linux/gpio/driver.h> 30#include <linux/spi/spi.h> 31 32#include <linux/platform_data/pca953x.h> 33#include <linux/platform_data/s3c-hsotg.h> 34 35#include <video/platform_lcd.h> 36 37#include <linux/mfd/wm831x/core.h> 38#include <linux/mfd/wm831x/pdata.h> 39#include <linux/mfd/wm831x/irq.h> 40#include <linux/mfd/wm831x/gpio.h> 41 42#include <asm/mach/arch.h> 43#include <asm/mach-types.h> 44 45#include <video/samsung_fimd.h> 46#include "map.h" 47#include "regs-gpio.h" 48#include "gpio-samsung.h" 49#include "irqs.h" 50 51#include "fb.h" 52#include "sdhci.h" 53#include "gpio-cfg.h" 54#include <linux/platform_data/spi-s3c64xx.h> 55 56#include "keypad.h" 57#include "devs.h" 58#include "cpu.h" 59#include <linux/platform_data/i2c-s3c2410.h> 60#include "pm.h" 61 62#include "s3c64xx.h" 63#include "crag6410.h" 64#include "regs-gpio-memport-s3c64xx.h" 65#include "regs-modem-s3c64xx.h" 66#include "regs-sys-s3c64xx.h" 67 68/* serial port setup */ 69 70#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) 71#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 72#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 73 74static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = { 75 [0] = { 76 .hwport = 0, 77 .flags = 0, 78 .ucon = UCON, 79 .ulcon = ULCON, 80 .ufcon = UFCON, 81 }, 82 [1] = { 83 .hwport = 1, 84 .flags = 0, 85 .ucon = UCON, 86 .ulcon = ULCON, 87 .ufcon = UFCON, 88 }, 89 [2] = { 90 .hwport = 2, 91 .flags = 0, 92 .ucon = UCON, 93 .ulcon = ULCON, 94 .ufcon = UFCON, 95 }, 96 [3] = { 97 .hwport = 3, 98 .flags = 0, 99 .ucon = UCON, 100 .ulcon = ULCON, 101 .ufcon = UFCON, 102 }, 103}; 104 105static struct pwm_lookup crag6410_pwm_lookup[] = { 106 PWM_LOOKUP("samsung-pwm", 0, "pwm-backlight", NULL, 100000, 107 PWM_POLARITY_NORMAL), 108}; 109 110static struct platform_pwm_backlight_data crag6410_backlight_data = { 111 .max_brightness = 1000, 112 .dft_brightness = 600, 113}; 114 115static struct platform_device crag6410_backlight_device = { 116 .name = "pwm-backlight", 117 .id = -1, 118 .dev = { 119 .parent = &samsung_device_pwm.dev, 120 .platform_data = &crag6410_backlight_data, 121 }, 122}; 123 124static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) 125{ 126 pr_debug("%s: setting power %d\n", __func__, power); 127 128 if (power) { 129 gpio_set_value(S3C64XX_GPB(0), 1); 130 msleep(1); 131 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2)); 132 } else { 133 gpio_direction_output(S3C64XX_GPF(14), 0); 134 gpio_set_value(S3C64XX_GPB(0), 0); 135 } 136} 137 138static struct platform_device crag6410_lcd_powerdev = { 139 .name = "platform-lcd", 140 .id = -1, 141 .dev.parent = &s3c_device_fb.dev, 142 .dev.platform_data = &(struct plat_lcd_data) { 143 .set_power = crag6410_lcd_power_set, 144 }, 145}; 146 147/* 640x480 URT */ 148static struct s3c_fb_pd_win crag6410_fb_win0 = { 149 .max_bpp = 32, 150 .default_bpp = 16, 151 .xres = 640, 152 .yres = 480, 153 .virtual_y = 480 * 2, 154 .virtual_x = 640, 155}; 156 157static struct fb_videomode crag6410_lcd_timing = { 158 .left_margin = 150, 159 .right_margin = 80, 160 .upper_margin = 40, 161 .lower_margin = 5, 162 .hsync_len = 40, 163 .vsync_len = 5, 164 .xres = 640, 165 .yres = 480, 166}; 167 168/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ 169static struct s3c_fb_platdata crag6410_lcd_pdata = { 170 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 171 .vtiming = &crag6410_lcd_timing, 172 .win[0] = &crag6410_fb_win0, 173 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 174 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 175}; 176 177/* 2x6 keypad */ 178 179static uint32_t crag6410_keymap[] = { 180 /* KEY(row, col, keycode) */ 181 KEY(0, 0, KEY_VOLUMEUP), 182 KEY(0, 1, KEY_HOME), 183 KEY(0, 2, KEY_VOLUMEDOWN), 184 KEY(0, 3, KEY_HELP), 185 KEY(0, 4, KEY_MENU), 186 KEY(0, 5, KEY_MEDIA), 187 KEY(1, 0, 232), 188 KEY(1, 1, KEY_DOWN), 189 KEY(1, 2, KEY_LEFT), 190 KEY(1, 3, KEY_UP), 191 KEY(1, 4, KEY_RIGHT), 192 KEY(1, 5, KEY_CAMERA), 193}; 194 195static struct matrix_keymap_data crag6410_keymap_data = { 196 .keymap = crag6410_keymap, 197 .keymap_size = ARRAY_SIZE(crag6410_keymap), 198}; 199 200static struct samsung_keypad_platdata crag6410_keypad_data = { 201 .keymap_data = &crag6410_keymap_data, 202 .rows = 2, 203 .cols = 6, 204}; 205 206static struct gpio_keys_button crag6410_gpio_keys[] = { 207 [0] = { 208 .code = KEY_SUSPEND, 209 .gpio = S3C64XX_GPL(10), /* EINT 18 */ 210 .type = EV_KEY, 211 .wakeup = 1, 212 .active_low = 1, 213 }, 214 [1] = { 215 .code = SW_FRONT_PROXIMITY, 216 .gpio = S3C64XX_GPN(11), /* EINT 11 */ 217 .type = EV_SW, 218 }, 219}; 220 221static struct gpio_keys_platform_data crag6410_gpio_keydata = { 222 .buttons = crag6410_gpio_keys, 223 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys), 224}; 225 226static struct platform_device crag6410_gpio_keydev = { 227 .name = "gpio-keys", 228 .id = 0, 229 .dev.platform_data = &crag6410_gpio_keydata, 230}; 231 232static struct resource crag6410_dm9k_resource[] = { 233 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2), 234 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2), 235 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \ 236 | IORESOURCE_IRQ_HIGHLEVEL), 237}; 238 239static struct dm9000_plat_data mini6410_dm9k_pdata = { 240 .flags = DM9000_PLATF_16BITONLY, 241}; 242 243static struct platform_device crag6410_dm9k_device = { 244 .name = "dm9000", 245 .id = -1, 246 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource), 247 .resource = crag6410_dm9k_resource, 248 .dev.platform_data = &mini6410_dm9k_pdata, 249}; 250 251static struct resource crag6410_mmgpio_resource[] = { 252 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"), 253}; 254 255static struct platform_device crag6410_mmgpio = { 256 .name = "basic-mmio-gpio", 257 .id = -1, 258 .resource = crag6410_mmgpio_resource, 259 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource), 260 .dev.platform_data = &(struct bgpio_pdata) { 261 .base = MMGPIO_GPIO_BASE, 262 }, 263}; 264 265static struct platform_device speyside_device = { 266 .name = "speyside", 267 .id = -1, 268}; 269 270static struct platform_device lowland_device = { 271 .name = "lowland", 272 .id = -1, 273}; 274 275static struct platform_device tobermory_device = { 276 .name = "tobermory", 277 .id = -1, 278}; 279 280static struct platform_device littlemill_device = { 281 .name = "littlemill", 282 .id = -1, 283}; 284 285static struct platform_device bells_wm2200_device = { 286 .name = "bells", 287 .id = 0, 288}; 289 290static struct platform_device bells_wm5102_device = { 291 .name = "bells", 292 .id = 1, 293}; 294 295static struct platform_device bells_wm5110_device = { 296 .name = "bells", 297 .id = 2, 298}; 299 300static struct regulator_consumer_supply wallvdd_consumers[] = { 301 REGULATOR_SUPPLY("SPKVDD", "1-001a"), 302 REGULATOR_SUPPLY("SPKVDD1", "1-001a"), 303 REGULATOR_SUPPLY("SPKVDD2", "1-001a"), 304 REGULATOR_SUPPLY("SPKVDDL", "1-001a"), 305 REGULATOR_SUPPLY("SPKVDDR", "1-001a"), 306 307 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"), 308 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"), 309 310 REGULATOR_SUPPLY("DC1VDD", "0-0034"), 311 REGULATOR_SUPPLY("DC2VDD", "0-0034"), 312 REGULATOR_SUPPLY("DC3VDD", "0-0034"), 313 REGULATOR_SUPPLY("LDO1VDD", "0-0034"), 314 REGULATOR_SUPPLY("LDO2VDD", "0-0034"), 315 REGULATOR_SUPPLY("LDO4VDD", "0-0034"), 316 REGULATOR_SUPPLY("LDO5VDD", "0-0034"), 317 REGULATOR_SUPPLY("LDO6VDD", "0-0034"), 318 REGULATOR_SUPPLY("LDO7VDD", "0-0034"), 319 REGULATOR_SUPPLY("LDO8VDD", "0-0034"), 320 REGULATOR_SUPPLY("LDO9VDD", "0-0034"), 321 REGULATOR_SUPPLY("LDO10VDD", "0-0034"), 322 REGULATOR_SUPPLY("LDO11VDD", "0-0034"), 323 324 REGULATOR_SUPPLY("DC1VDD", "1-0034"), 325 REGULATOR_SUPPLY("DC2VDD", "1-0034"), 326 REGULATOR_SUPPLY("DC3VDD", "1-0034"), 327 REGULATOR_SUPPLY("LDO1VDD", "1-0034"), 328 REGULATOR_SUPPLY("LDO2VDD", "1-0034"), 329 REGULATOR_SUPPLY("LDO4VDD", "1-0034"), 330 REGULATOR_SUPPLY("LDO5VDD", "1-0034"), 331 REGULATOR_SUPPLY("LDO6VDD", "1-0034"), 332 REGULATOR_SUPPLY("LDO7VDD", "1-0034"), 333 REGULATOR_SUPPLY("LDO8VDD", "1-0034"), 334 REGULATOR_SUPPLY("LDO9VDD", "1-0034"), 335 REGULATOR_SUPPLY("LDO10VDD", "1-0034"), 336 REGULATOR_SUPPLY("LDO11VDD", "1-0034"), 337}; 338 339static struct regulator_init_data wallvdd_data = { 340 .constraints = { 341 .always_on = 1, 342 }, 343 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers), 344 .consumer_supplies = wallvdd_consumers, 345}; 346 347static struct fixed_voltage_config wallvdd_pdata = { 348 .supply_name = "WALLVDD", 349 .microvolts = 5000000, 350 .init_data = &wallvdd_data, 351}; 352 353static struct platform_device wallvdd_device = { 354 .name = "reg-fixed-voltage", 355 .id = -1, 356 .dev = { 357 .platform_data = &wallvdd_pdata, 358 }, 359}; 360 361static struct platform_device *crag6410_devices[] __initdata = { 362 &s3c_device_hsmmc0, 363 &s3c_device_hsmmc2, 364 &s3c_device_i2c0, 365 &s3c_device_i2c1, 366 &s3c_device_fb, 367 &s3c_device_ohci, 368 &s3c_device_usb_hsotg, 369 &samsung_device_pwm, 370 &s3c64xx_device_iis0, 371 &s3c64xx_device_iis1, 372 &samsung_device_keypad, 373 &crag6410_gpio_keydev, 374 &crag6410_dm9k_device, 375 &s3c64xx_device_spi0, 376 &crag6410_mmgpio, 377 &crag6410_lcd_powerdev, 378 &crag6410_backlight_device, 379 &speyside_device, 380 &tobermory_device, 381 &littlemill_device, 382 &lowland_device, 383 &bells_wm2200_device, 384 &bells_wm5102_device, 385 &bells_wm5110_device, 386 &wallvdd_device, 387}; 388 389static struct pca953x_platform_data crag6410_pca_data = { 390 .gpio_base = PCA935X_GPIO_BASE, 391 .irq_base = -1, 392}; 393 394/* VDDARM is controlled by DVS1 connected to GPK(0) */ 395static struct wm831x_buckv_pdata vddarm_pdata = { 396 .dvs_control_src = 1, 397}; 398 399static struct regulator_consumer_supply vddarm_consumers[] = { 400 REGULATOR_SUPPLY("vddarm", NULL), 401}; 402 403static struct regulator_init_data vddarm = { 404 .constraints = { 405 .name = "VDDARM", 406 .min_uV = 1000000, 407 .max_uV = 1300000, 408 .always_on = 1, 409 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 410 }, 411 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers), 412 .consumer_supplies = vddarm_consumers, 413 .supply_regulator = "WALLVDD", 414 .driver_data = &vddarm_pdata, 415}; 416 417static struct regulator_consumer_supply vddint_consumers[] = { 418 REGULATOR_SUPPLY("vddint", NULL), 419}; 420 421static struct regulator_init_data vddint = { 422 .constraints = { 423 .name = "VDDINT", 424 .min_uV = 1000000, 425 .max_uV = 1200000, 426 .always_on = 1, 427 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 428 }, 429 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers), 430 .consumer_supplies = vddint_consumers, 431 .supply_regulator = "WALLVDD", 432}; 433 434static struct regulator_init_data vddmem = { 435 .constraints = { 436 .name = "VDDMEM", 437 .always_on = 1, 438 }, 439}; 440 441static struct regulator_init_data vddsys = { 442 .constraints = { 443 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS", 444 .always_on = 1, 445 }, 446}; 447 448static struct regulator_consumer_supply vddmmc_consumers[] = { 449 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), 450 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"), 451 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"), 452}; 453 454static struct regulator_init_data vddmmc = { 455 .constraints = { 456 .name = "VDDMMC,UH", 457 .always_on = 1, 458 }, 459 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers), 460 .consumer_supplies = vddmmc_consumers, 461 .supply_regulator = "WALLVDD", 462}; 463 464static struct regulator_init_data vddotgi = { 465 .constraints = { 466 .name = "VDDOTGi", 467 .always_on = 1, 468 }, 469 .supply_regulator = "WALLVDD", 470}; 471 472static struct regulator_init_data vddotg = { 473 .constraints = { 474 .name = "VDDOTG", 475 .always_on = 1, 476 }, 477 .supply_regulator = "WALLVDD", 478}; 479 480static struct regulator_init_data vddhi = { 481 .constraints = { 482 .name = "VDDHI", 483 .always_on = 1, 484 }, 485 .supply_regulator = "WALLVDD", 486}; 487 488static struct regulator_init_data vddadc = { 489 .constraints = { 490 .name = "VDDADC,VDDDAC", 491 .always_on = 1, 492 }, 493 .supply_regulator = "WALLVDD", 494}; 495 496static struct regulator_init_data vddmem0 = { 497 .constraints = { 498 .name = "VDDMEM0", 499 .always_on = 1, 500 }, 501 .supply_regulator = "WALLVDD", 502}; 503 504static struct regulator_init_data vddpll = { 505 .constraints = { 506 .name = "VDDPLL", 507 .always_on = 1, 508 }, 509 .supply_regulator = "WALLVDD", 510}; 511 512static struct regulator_init_data vddlcd = { 513 .constraints = { 514 .name = "VDDLCD", 515 .always_on = 1, 516 }, 517 .supply_regulator = "WALLVDD", 518}; 519 520static struct regulator_init_data vddalive = { 521 .constraints = { 522 .name = "VDDALIVE", 523 .always_on = 1, 524 }, 525 .supply_regulator = "WALLVDD", 526}; 527 528static struct wm831x_backup_pdata banff_backup_pdata = { 529 .charger_enable = 1, 530 .vlim = 2500, /* mV */ 531 .ilim = 200, /* uA */ 532}; 533 534static struct wm831x_status_pdata banff_red_led = { 535 .name = "banff:red:", 536 .default_src = WM831X_STATUS_MANUAL, 537}; 538 539static struct wm831x_status_pdata banff_green_led = { 540 .name = "banff:green:", 541 .default_src = WM831X_STATUS_MANUAL, 542}; 543 544static struct wm831x_touch_pdata touch_pdata = { 545 .data_irq = S3C_EINT(26), 546 .pd_irq = S3C_EINT(27), 547}; 548 549static struct wm831x_pdata crag_pmic_pdata = { 550 .wm831x_num = 1, 551 .irq_base = BANFF_PMIC_IRQ_BASE, 552 .gpio_base = BANFF_PMIC_GPIO_BASE, 553 .soft_shutdown = true, 554 555 .backup = &banff_backup_pdata, 556 557 .gpio_defaults = { 558 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */ 559 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8, 560 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/ 561 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6, 562 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/ 563 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7, 564 }, 565 566 .dcdc = { 567 &vddarm, /* DCDC1 */ 568 &vddint, /* DCDC2 */ 569 &vddmem, /* DCDC3 */ 570 }, 571 572 .ldo = { 573 &vddsys, /* LDO1 */ 574 &vddmmc, /* LDO2 */ 575 NULL, /* LDO3 */ 576 &vddotgi, /* LDO4 */ 577 &vddotg, /* LDO5 */ 578 &vddhi, /* LDO6 */ 579 &vddadc, /* LDO7 */ 580 &vddmem0, /* LDO8 */ 581 &vddpll, /* LDO9 */ 582 &vddlcd, /* LDO10 */ 583 &vddalive, /* LDO11 */ 584 }, 585 586 .status = { 587 &banff_green_led, 588 &banff_red_led, 589 }, 590 591 .touch = &touch_pdata, 592}; 593 594/* 595 * VDDARM is eventually ending up as a regulator hanging on the MFD cell device 596 * "wm831x-buckv.1" spawn from drivers/mfd/wm831x-core.c. 597 * 598 * From the note on the platform data we can see that this is clearly DVS1 599 * and assigned as dcdc1 resource to the MFD core which sets .id of the cell 600 * spawning the DVS1 platform device to 1, then the cell platform device 601 * name is calculated from 10*instance + id resulting in the device name 602 * "wm831x-buckv.11" 603 */ 604static struct gpiod_lookup_table crag_pmic_gpiod_table = { 605 .dev_id = "wm831x-buckv.11", 606 .table = { 607 GPIO_LOOKUP("GPIOK", 0, "dvs", GPIO_ACTIVE_HIGH), 608 { }, 609 }, 610}; 611 612static struct i2c_board_info i2c_devs0[] = { 613 { I2C_BOARD_INFO("24c08", 0x50), }, 614 { I2C_BOARD_INFO("tca6408", 0x20), 615 .platform_data = &crag6410_pca_data, 616 }, 617 { I2C_BOARD_INFO("wm8312", 0x34), 618 .platform_data = &crag_pmic_pdata, 619 .irq = S3C_EINT(23), 620 }, 621}; 622 623static struct s3c2410_platform_i2c i2c0_pdata = { 624 .frequency = 400000, 625}; 626 627static struct regulator_consumer_supply pvdd_1v2_consumers[] = { 628 REGULATOR_SUPPLY("DCVDD", "spi0.0"), 629 REGULATOR_SUPPLY("AVDD", "spi0.0"), 630 REGULATOR_SUPPLY("AVDD", "spi0.1"), 631}; 632 633static struct regulator_init_data pvdd_1v2 = { 634 .constraints = { 635 .name = "PVDD_1V2", 636 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 637 }, 638 639 .consumer_supplies = pvdd_1v2_consumers, 640 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers), 641}; 642 643static struct regulator_consumer_supply pvdd_1v8_consumers[] = { 644 REGULATOR_SUPPLY("LDOVDD", "1-001a"), 645 REGULATOR_SUPPLY("PLLVDD", "1-001a"), 646 REGULATOR_SUPPLY("DBVDD", "1-001a"), 647 REGULATOR_SUPPLY("DBVDD1", "1-001a"), 648 REGULATOR_SUPPLY("DBVDD2", "1-001a"), 649 REGULATOR_SUPPLY("DBVDD3", "1-001a"), 650 REGULATOR_SUPPLY("CPVDD", "1-001a"), 651 REGULATOR_SUPPLY("AVDD2", "1-001a"), 652 REGULATOR_SUPPLY("DCVDD", "1-001a"), 653 REGULATOR_SUPPLY("AVDD", "1-001a"), 654 REGULATOR_SUPPLY("DBVDD", "spi0.0"), 655 656 REGULATOR_SUPPLY("DBVDD", "1-003a"), 657 REGULATOR_SUPPLY("LDOVDD", "1-003a"), 658 REGULATOR_SUPPLY("CPVDD", "1-003a"), 659 REGULATOR_SUPPLY("AVDD", "1-003a"), 660 REGULATOR_SUPPLY("DBVDD1", "spi0.1"), 661 REGULATOR_SUPPLY("DBVDD2", "spi0.1"), 662 REGULATOR_SUPPLY("DBVDD3", "spi0.1"), 663 REGULATOR_SUPPLY("LDOVDD", "spi0.1"), 664 REGULATOR_SUPPLY("CPVDD", "spi0.1"), 665}; 666 667static struct regulator_init_data pvdd_1v8 = { 668 .constraints = { 669 .name = "PVDD_1V8", 670 .always_on = 1, 671 }, 672 673 .consumer_supplies = pvdd_1v8_consumers, 674 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers), 675}; 676 677static struct regulator_consumer_supply pvdd_3v3_consumers[] = { 678 REGULATOR_SUPPLY("MICVDD", "1-001a"), 679 REGULATOR_SUPPLY("AVDD1", "1-001a"), 680}; 681 682static struct regulator_init_data pvdd_3v3 = { 683 .constraints = { 684 .name = "PVDD_3V3", 685 .always_on = 1, 686 }, 687 688 .consumer_supplies = pvdd_3v3_consumers, 689 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers), 690}; 691 692static struct wm831x_pdata glenfarclas_pmic_pdata = { 693 .wm831x_num = 2, 694 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, 695 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, 696 .soft_shutdown = true, 697 698 .gpio_defaults = { 699 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */ 700 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, 701 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, 702 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, 703 }, 704 705 .dcdc = { 706 &pvdd_1v2, /* DCDC1 */ 707 &pvdd_1v8, /* DCDC2 */ 708 &pvdd_3v3, /* DCDC3 */ 709 }, 710 711 .disable_touch = true, 712}; 713 714static struct gpiod_lookup_table crag_wm1250_ev1_gpiod_table = { 715 /* The WM1250-EV1 is device 0027 on I2C bus 1 */ 716 .dev_id = "1-0027", 717 .table = { 718 GPIO_LOOKUP("GPION", 12, "clk-ena", GPIO_ACTIVE_HIGH), 719 GPIO_LOOKUP("GPIOL", 12, "clk-sel0", GPIO_ACTIVE_HIGH), 720 GPIO_LOOKUP("GPIOL", 13, "clk-sel1", GPIO_ACTIVE_HIGH), 721 GPIO_LOOKUP("GPIOL", 14, "osr", GPIO_ACTIVE_HIGH), 722 GPIO_LOOKUP("GPIOL", 8, "master", GPIO_ACTIVE_HIGH), 723 { }, 724 }, 725}; 726 727static struct i2c_board_info i2c_devs1[] = { 728 { I2C_BOARD_INFO("wm8311", 0x34), 729 .irq = S3C_EINT(0), 730 .platform_data = &glenfarclas_pmic_pdata }, 731 732 { I2C_BOARD_INFO("wlf-gf-module", 0x20) }, 733 { I2C_BOARD_INFO("wlf-gf-module", 0x22) }, 734 { I2C_BOARD_INFO("wlf-gf-module", 0x24) }, 735 { I2C_BOARD_INFO("wlf-gf-module", 0x25) }, 736 { I2C_BOARD_INFO("wlf-gf-module", 0x26) }, 737 { I2C_BOARD_INFO("wm1250-ev1", 0x27), }, 738}; 739 740static struct s3c2410_platform_i2c i2c1_pdata = { 741 .frequency = 400000, 742 .bus_num = 1, 743}; 744 745static void __init crag6410_map_io(void) 746{ 747 s3c64xx_init_io(NULL, 0); 748 s3c64xx_set_xtal_freq(12000000); 749 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs)); 750 s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); 751 752 /* LCD type and Bypass set by bootloader */ 753} 754 755static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = { 756 .max_width = 4, 757 .cd_type = S3C_SDHCI_CD_PERMANENT, 758 .host_caps = MMC_CAP_POWER_OFF_CARD, 759}; 760 761static void crag6410_cfg_sdhci0(struct platform_device *dev, int width) 762{ 763 /* Set all the necessary GPG pins to special-function 2 */ 764 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); 765 766 /* force card-detected for prototype 0 */ 767 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN); 768} 769 770static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = { 771 .max_width = 4, 772 .cd_type = S3C_SDHCI_CD_INTERNAL, 773 .cfg_gpio = crag6410_cfg_sdhci0, 774 .host_caps = MMC_CAP_POWER_OFF_CARD, 775}; 776 777static const struct gpio_led gpio_leds[] = { 778 { 779 .name = "d13:green:", 780 .gpio = MMGPIO_GPIO_BASE + 0, 781 .default_state = LEDS_GPIO_DEFSTATE_ON, 782 }, 783 { 784 .name = "d14:green:", 785 .gpio = MMGPIO_GPIO_BASE + 1, 786 .default_state = LEDS_GPIO_DEFSTATE_ON, 787 }, 788 { 789 .name = "d15:green:", 790 .gpio = MMGPIO_GPIO_BASE + 2, 791 .default_state = LEDS_GPIO_DEFSTATE_ON, 792 }, 793 { 794 .name = "d16:green:", 795 .gpio = MMGPIO_GPIO_BASE + 3, 796 .default_state = LEDS_GPIO_DEFSTATE_ON, 797 }, 798 { 799 .name = "d17:green:", 800 .gpio = MMGPIO_GPIO_BASE + 4, 801 .default_state = LEDS_GPIO_DEFSTATE_ON, 802 }, 803 { 804 .name = "d18:green:", 805 .gpio = MMGPIO_GPIO_BASE + 5, 806 .default_state = LEDS_GPIO_DEFSTATE_ON, 807 }, 808 { 809 .name = "d19:green:", 810 .gpio = MMGPIO_GPIO_BASE + 6, 811 .default_state = LEDS_GPIO_DEFSTATE_ON, 812 }, 813 { 814 .name = "d20:green:", 815 .gpio = MMGPIO_GPIO_BASE + 7, 816 .default_state = LEDS_GPIO_DEFSTATE_ON, 817 }, 818}; 819 820static const struct gpio_led_platform_data gpio_leds_pdata = { 821 .leds = gpio_leds, 822 .num_leds = ARRAY_SIZE(gpio_leds), 823}; 824 825static struct dwc2_hsotg_plat crag6410_hsotg_pdata; 826 827static struct gpiod_lookup_table crag_spi0_gpiod_table = { 828 .dev_id = "s3c6410-spi.0", 829 .table = { 830 GPIO_LOOKUP_IDX("GPIOC", 3, "cs", 0, GPIO_ACTIVE_LOW), 831 GPIO_LOOKUP_IDX("GPION", 5, "cs", 1, GPIO_ACTIVE_LOW), 832 { }, 833 }, 834}; 835 836static void __init crag6410_machine_init(void) 837{ 838 /* Open drain IRQs need pullups */ 839 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP); 840 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP); 841 842 gpio_request(S3C64XX_GPB(0), "LCD power"); 843 gpio_direction_output(S3C64XX_GPB(0), 0); 844 845 gpio_request(S3C64XX_GPF(14), "LCD PWM"); 846 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */ 847 848 gpio_request(S3C64XX_GPB(1), "SD power"); 849 gpio_direction_output(S3C64XX_GPB(1), 0); 850 851 gpio_request(S3C64XX_GPF(10), "nRESETSEL"); 852 gpio_direction_output(S3C64XX_GPF(10), 1); 853 854 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata); 855 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata); 856 857 s3c_i2c0_set_platdata(&i2c0_pdata); 858 s3c_i2c1_set_platdata(&i2c1_pdata); 859 s3c_fb_set_platdata(&crag6410_lcd_pdata); 860 dwc2_hsotg_set_platdata(&crag6410_hsotg_pdata); 861 862 gpiod_add_lookup_table(&crag_pmic_gpiod_table); 863 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); 864 gpiod_add_lookup_table(&crag_wm1250_ev1_gpiod_table); 865 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); 866 867 samsung_keypad_set_platdata(&crag6410_keypad_data); 868 869 gpiod_add_lookup_table(&crag_spi0_gpiod_table); 870 s3c64xx_spi0_set_platdata(0, 2); 871 872 pwm_add_table(crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup)); 873 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices)); 874 875 gpio_led_register_device(-1, &gpio_leds_pdata); 876 877 regulator_has_full_constraints(); 878 879 s3c64xx_pm_init(); 880} 881 882MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410") 883 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ 884 .atag_offset = 0x100, 885 .nr_irqs = S3C64XX_NR_IRQS, 886 .init_irq = s3c6410_init_irq, 887 .map_io = crag6410_map_io, 888 .init_machine = crag6410_machine_init, 889 .init_time = s3c64xx_timer_init, 890MACHINE_END 891