Lines Matching refs:code
3 * ARMv7 Cortex-A8 and Cortex-A9 Performance Events handling code.
8 * Copied from ARMv6 code, with the low level code inspired
9 * by the ARMv7 Oprofile code.
1292 * Example: 0x12021 is a Krait CPU event in PMRESR2's group 1 with code 2
1295 * unit, etc.) while the event code (CC) corresponds to a particular class of
1296 * events (interrupts for example). An event code is broken down into
1404 unsigned int code = EVENT_CODE(config_base);
1425 val |= code << group_shift;
1432 val |= code << group_shift;
1486 * Clear pmresr code (if destined for PMNx counters)
1583 unsigned int code = EVENT_CODE(hwc->config_base);
1592 if (venum_event && (code & 0xe0))
1670 * Example: 0x12021 is a Scorpion CPU event in LPM2's group 1 with code 2
1673 * unit, etc.) while the event code (CC) corresponds to a particular class of
1674 * events (interrupts for example). An event code is broken down into
1739 unsigned int code = EVENT_CODE(config_base);
1762 val |= code << group_shift;
1769 val |= code << group_shift;
1807 * Clear pmresr code (if destined for PMNx counters)