Searched refs:reg_name (Results 101 - 125 of 290) sorted by relevance

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/linux-master/drivers/iio/adc/
H A Dfsl-imx25-gcq.c178 char reg_name[12]; local
184 ret = snprintf(reg_name, sizeof(reg_name), "vref-%s",
189 priv->vref[refp] = devm_regulator_get_optional(dev, reg_name);
193 reg_name);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_smu.c53 #define REG(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
55 #define FN(reg_name, field) \
56 FD(reg_name##__##field)
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c129 #define SR(reg_name)\
130 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
131 mm ## reg_name
133 #define SRI(reg_name, block, id)\
134 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
135 mm ## block ## id ## _ ## reg_name
137 #define SRI2_DWB(reg_name, block, id)\
138 .reg_name
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.c45 #define FN(reg_name, field_name) \
1363 #define HPD_REG_READ(reg_name) \
1364 dm_read_reg(CTX, HPD_REG(reg_name))
1366 #define HPD_REG_UPDATE_N(reg_name, n, ...) \
1368 HPD_REG(reg_name), \
1371 #define HPD_REG_UPDATE(reg_name, field, val) \
1372 HPD_REG_UPDATE_N(reg_name, 1, \
1373 FN(reg_name, field), val)
1394 #define AUX_REG_READ(reg_name) \
1395 dm_read_reg(CTX, AUX_REG(reg_name))
[all...]
H A Ddcn10_dwb.c39 #define FN(reg_name, field_name) \
/linux-master/drivers/video/fbdev/omap2/omapfb/dss/
H A Dvideo-pll.c128 const char * const reg_name[] = { "pll1", "pll2" }; local
140 pll_base = devm_platform_ioremap_resource_byname(pdev, reg_name[id]);
142 dev_err(&pdev->dev, "failed to ioremap pll%d reg_name\n", id);
/linux-master/drivers/crypto/ccree/
H A Dcc_driver.h94 #define CC_REG(reg_name) CC_ ## reg_name ## _REG_OFFSET
/linux-master/drivers/gpu/drm/omapdrm/dss/
H A Dvideo-pll.c136 const char * const reg_name[] = { "pll1", "pll2" }; local
148 pll_base = devm_platform_ioremap_resource_byname(pdev, reg_name[id]);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c48 #define FN(reg_name, field_name) \
58 #define SR(reg_name)\
59 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
60 mm ## reg_name
63 #define CLK_SRI(reg_name, block, inst)\
64 .reg_name = mm ## block ## _ ## reg_name
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr_smu_msg.c37 #define REG(reg_name) \
38 mm ## reg_name
/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_audio.h44 #define SF(reg_name, field_name, post_fix)\
45 .field_name = reg_name ## __ ## field_name ## post_fix
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_opp.h33 #define OPP_SF(reg_name, field_name, post_fix)\
34 .field_name = reg_name ## __ ## field_name ## post_fix
H A Ddcn20_link_encoder.c45 #define FN(reg_name, field_name) \
303 #define AUX_REG_READ(reg_name) \
304 dm_read_reg(CTX, AUX_REG(reg_name))
306 #define AUX_REG_WRITE(reg_name, val) \
307 dm_write_reg(CTX, AUX_REG(reg_name), val)
H A Ddcn20_dccg.h51 #define DCCG_SF(reg_name, field_name, post_fix)\
52 .field_name = reg_name ## __ ## field_name ## post_fix
54 #define DCCG_SFI(reg_name, field_name, field_prefix, inst, post_fix)\
55 .field_prefix ## _ ## field_name[inst] = reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
57 #define DCCG_SFII(block, reg_name, field_prefix, field_name, inst, post_fix)\
58 .field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
/linux-master/tools/objtool/arch/loongarch/
H A Dorc.c120 static const char *reg_name(unsigned int reg) function
153 printf("%s + %3d", reg_name(reg), offset);
/linux-master/tools/objtool/arch/x86/
H A Dorc.c121 static const char *reg_name(unsigned int reg) function
174 printf("%s%+d", reg_name(reg), offset);
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_generic.c39 #define FN(reg_name, field_name) \
H A Dhw_hpd.c37 #define FN(reg_name, field_name) \
/linux-master/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hubp.c39 #define FN(reg_name, field_name) \
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn201/
H A Dirq_service_dcn201.c148 #define SRI(reg_name, block, id)\
149 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
150 mm ## block ## id ## _ ## reg_name
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn303/
H A Dirq_service_dcn303.c133 #define SRI(reg_name, block, id)\
134 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
135 mm ## block ## id ## _ ## reg_name
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn10/
H A Dirq_service_dcn10.c195 #define SRI(reg_name, block, id)\
196 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
197 mm ## block ## id ## _ ## reg_name
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dce120/
H A Dirq_service_dce120.c98 #define SRI(reg_name, block, id)\
99 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
100 mm ## block ## id ## _ ## reg_name
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn20/
H A Dirq_service_dcn20.c198 #define SRI(reg_name, block, id)\
199 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
200 mm ## block ## id ## _ ## reg_name
/linux-master/scripts/
H A Dmarkup_oops.pl86 sub reg_name subroutine
127 my $clobberprime = reg_name($clobber);
128 my $lastwordprime = reg_name($lastword);

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