1/*
2 * Copyright 2012-17 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "reg_helper.h"
27#include "resource.h"
28#include "dwb.h"
29#include "dcn10_dwb.h"
30
31
32#define REG(reg)\
33	dwbc10->dwbc_regs->reg
34
35#define CTX \
36	dwbc10->base.ctx
37
38#undef FN
39#define FN(reg_name, field_name) \
40	dwbc10->dwbc_shift->field_name, dwbc10->dwbc_mask->field_name
41
42#define TO_DCN10_DWBC(dwbc_base) \
43	container_of(dwbc_base, struct dcn10_dwbc, base)
44
45static bool dwb1_get_caps(struct dwbc *dwbc, struct dwb_caps *caps)
46{
47	if (caps) {
48		caps->adapter_id = 0;	/* we only support 1 adapter currently */
49		caps->hw_version = DCN_VERSION_1_0;
50		caps->num_pipes = 2;
51		memset(&caps->reserved, 0, sizeof(caps->reserved));
52		memset(&caps->reserved2, 0, sizeof(caps->reserved2));
53		caps->sw_version = dwb_ver_1_0;
54		caps->caps.support_dwb = true;
55		caps->caps.support_ogam = false;
56		caps->caps.support_wbscl = true;
57		caps->caps.support_ocsc = false;
58		return true;
59	} else {
60		return false;
61	}
62}
63
64static bool dwb1_enable(struct dwbc *dwbc, struct dc_dwb_params *params)
65{
66	struct dcn10_dwbc *dwbc10 = TO_DCN10_DWBC(dwbc);
67
68	/* disable first. */
69	dwbc->funcs->disable(dwbc);
70
71	/* disable power gating */
72	REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 1,
73		 DISPCLK_G_WB_GATE_DIS, 1, DISPCLK_G_WBSCL_GATE_DIS, 1,
74		 WB_LB_LS_DIS, 1, WB_LUT_LS_DIS, 1);
75
76	REG_UPDATE(WB_ENABLE, WB_ENABLE, 1);
77
78	return true;
79}
80
81static bool dwb1_disable(struct dwbc *dwbc)
82{
83	struct dcn10_dwbc *dwbc10 = TO_DCN10_DWBC(dwbc);
84
85	/* disable CNV */
86	REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_EN, 0);
87
88	/* disable WB */
89	REG_UPDATE(WB_ENABLE, WB_ENABLE, 0);
90
91	/* soft reset */
92	REG_UPDATE(WB_SOFT_RESET, WB_SOFT_RESET, 1);
93	REG_UPDATE(WB_SOFT_RESET, WB_SOFT_RESET, 0);
94
95	/* enable power gating */
96	REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 0,
97		 DISPCLK_G_WB_GATE_DIS, 0, DISPCLK_G_WBSCL_GATE_DIS, 0,
98		 WB_LB_LS_DIS, 0, WB_LUT_LS_DIS, 0);
99
100	return true;
101}
102
103const struct dwbc_funcs dcn10_dwbc_funcs = {
104	.get_caps			= dwb1_get_caps,
105	.enable				= dwb1_enable,
106	.disable			= dwb1_disable,
107	.update				= NULL,
108	.set_stereo			= NULL,
109	.set_new_content		= NULL,
110	.set_warmup			= NULL,
111	.dwb_set_scaler			= NULL,
112};
113
114void dcn10_dwbc_construct(struct dcn10_dwbc *dwbc10,
115		struct dc_context *ctx,
116		const struct dcn10_dwbc_registers *dwbc_regs,
117		const struct dcn10_dwbc_shift *dwbc_shift,
118		const struct dcn10_dwbc_mask *dwbc_mask,
119		int inst)
120{
121	dwbc10->base.ctx = ctx;
122
123	dwbc10->base.inst = inst;
124	dwbc10->base.funcs = &dcn10_dwbc_funcs;
125
126	dwbc10->dwbc_regs = dwbc_regs;
127	dwbc10->dwbc_shift = dwbc_shift;
128	dwbc10->dwbc_mask = dwbc_mask;
129}
130