/linux-master/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
H A D | dcn_calcs.c | 69 /* below default clocks derived from STA target base on 1407 struct dc_clocks *clocks) 1414 dc, DM_PP_CLOCK_TYPE_DISPLAY_CLK, clocks->dispclk_khz); 1416 dc, DM_PP_CLOCK_TYPE_DISPLAYPHYCLK, clocks->phyclk_khz); 1420 dc, DM_PP_CLOCK_TYPE_DPPCLK, clocks->dppclk_khz); 1424 dc, DM_PP_CLOCK_TYPE_MEMORY_CLK, clocks->fclk_khz); 1427 dc, DM_PP_CLOCK_TYPE_DCFCLK, clocks->dcfclk_khz); 1405 dcn_find_dcfclk_suits_all( const struct dc *dc, struct dc_clocks *clocks) argument
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/linux-master/drivers/gpu/drm/gma500/ |
H A D | psb_intel_sdvo.c | 669 struct psb_intel_sdvo_pixel_clock_range clocks; local 671 BUILD_BUG_ON(sizeof(clocks) != 4); 674 &clocks, sizeof(clocks))) 678 *clock_min = clocks.min * 10; 679 *clock_max = clocks.max * 10;
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/linux-master/drivers/gpu/drm/amd/display/dc/inc/ |
H A D | dcn_calcs.h | 629 struct dc_clocks *clocks);
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/linux-master/sound/pci/echoaudio/ |
H A D | echoaudio.c | 1763 int detected, clocks, bit, src; local 1772 /* Compute the bitmask of the currently valid input clocks */ 1774 clocks = 0; 1780 clocks |= 1 << src; 1783 ucontrol->value.integer.value[5] = clocks;
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/linux-master/drivers/media/platform/samsung/s5p-mfc/ |
H A D | s5p_mfc_common.h | 198 struct clk *clocks[MFC_MAX_CLOCKS]; member in struct:s5p_mfc_pm
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/linux-master/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_clk_mgr.c | 35 #define TO_DCE_CLK_MGR(clocks)\ 36 container_of(clocks, struct dce_clk_mgr, base) 224 * all required clocks
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/ |
H A D | amdgpu_smu.h | 685 *clocks); 694 *clocks); 1172 * sustainable clocks from the SMU.
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/linux-master/drivers/media/platform/samsung/s5p-jpeg/ |
H A D | jpeg-core.c | 2883 /* clocks */ 2885 jpeg->clocks[i] = devm_clk_get(&pdev->dev, 2887 if (IS_ERR(jpeg->clocks[i])) { 2890 return PTR_ERR(jpeg->clocks[i]); 3007 clk_disable_unprepare(jpeg->clocks[i]); 3018 clk_disable_unprepare(jpeg->clocks[i]); 3030 ret = clk_prepare_enable(jpeg->clocks[i]); 3033 clk_disable_unprepare(jpeg->clocks[i]);
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/linux-master/sound/pci/ |
H A D | es1938.c | 421 static const struct snd_ratnum clocks[2] = { variable in typeref:struct:snd_ratnum 438 .rats = clocks, 448 if (runtime->rate_num == clocks[0].num)
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/linux-master/drivers/staging/vc04_services/vchiq-mmal/ |
H A D | mmal-vchiq.c | 964 component->clocks = rmsg->u.component_create_reply.clock_num; 968 component->inputs, component->outputs, component->clocks); 1706 for (idx = 0; idx < component->clocks; idx++) {
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/linux-master/sound/isa/cs423x/ |
H A D | cs4236_lib.c | 127 static const struct snd_ratnum clocks[CLOCKS] = { variable in typeref:struct:snd_ratnum 140 .rats = clocks,
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/linux-master/arch/x86/kernel/apic/ |
H A D | apic.c | 266 * 'clocks' APIC bus clock. During calibration we actually call 274 static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) argument 317 apic_write(APIC_TMICT, clocks / APIC_DIVISOR); 609 * In this functions we calibrate APIC bus clocks to the external timer.
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_sdvo.c | 728 struct intel_sdvo_pixel_clock_range clocks; local 730 BUILD_BUG_ON(sizeof(clocks) != 4); 733 &clocks, sizeof(clocks))) 737 *clock_min = clocks.min * 10; 738 *clock_max = clocks.max * 10;
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/linux-master/drivers/cpufreq/ |
H A D | Kconfig.x86 | 267 clocks.
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/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/ |
H A D | si_dpm.c | 3214 static u32 btc_find_valid_clock(struct amdgpu_clock_array *clocks, argument 3219 if ((clocks == NULL) || (clocks->count == 0)) 3222 for (i = 0; i < clocks->count; i++) { 3223 if (clocks->values[i] >= requested_clock) 3224 return (clocks->values[i] < max_clock) ? clocks->values[i] : max_clock; 3227 return (clocks->values[clocks->count - 1] < max_clock) ? 3228 clocks [all...] |
/linux-master/drivers/clk/rockchip/ |
H A D | clk.h | 334 * @clk_data: holds clock related data like clk* and number of clocks. 968 /* SGRF clocks are only accessible from secure mode, so not controllable */ 990 void rockchip_clk_protect_critical(const char *const clocks[], int nclocks);
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/linux-master/drivers/of/ |
H A D | property.c | 1225 DEFINE_SIMPLE_PROP(clocks, "clocks", "#clock-cells")
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | navi10_ppt.c | 1789 struct pp_clock_levels_with_latency *clocks) 1805 clocks->num_levels = level_count; 1812 clocks->data[i].clocks_in_khz = freq * 1000; 1813 clocks->data[i].latency_in_us = 0; 1787 navi10_get_clock_by_type_with_latency(struct smu_context *smu, enum smu_clk_type clk_type, struct pp_clock_levels_with_latency *clocks) argument
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/linux-master/drivers/gpu/drm/amd/pm/ |
H A D | amdgpu_pm.c | 231 * When low is selected, the clocks are forced to the lowest power state. 235 * When high is selected, the clocks are forced to the highest power state. 250 * disabled and the clocks are set for different profiling cases. This 253 * with your results. profile_standard sets the clocks to a fixed clock 256 * profile_peak sets all clocks (mclk, sclk, pcie) to the highest levels. 601 * The amdgpu driver provides a sysfs API for adjusting the clocks and voltages 706 * - minimum and maximum core clocks labeled OD_CCLK 719 * clocks on VanGogh, the string contains "p core index clock". 3290 * hwmon interfaces for GPU clocks: 4448 /* VCN clocks */ 4491 static const struct cg_flag_name clocks[] = { variable in typeref:struct:cg_flag_name [all...] |
/linux-master/drivers/gpu/drm/amd/display/dmub/inc/ |
H A D | dmub_cmd.h | 1627 struct dmub_clocks clocks; /**< clock data */ member in struct:dmub_rb_cmd_clk_mgr_notify_clocks
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/linux-master/drivers/net/ethernet/qlogic/qed/ |
H A D | qed_mfw_hsi.h | 1992 u32 clocks; member in struct:nvm_cfg1_glob
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/ |
H A D | amdgpu_smu.c | 849 dev_err(adev->dev, "Failed to populate UMD state clocks!\n"); 1808 * And DAL needs to know the maximum sustainable clocks. Thus 1813 dev_err(adev->dev, "Failed to init max sustainable clocks!\n"); 2217 dev_err(smu->adev->dev, "Failed to apply clocks adjust rules!"); 3143 struct pp_clock_levels_with_latency *clocks) 3171 ret = smu->ppt_funcs->get_clock_by_type_with_latency(smu, clk_type, clocks); 3141 smu_get_clock_by_type_with_latency(void *handle, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) argument
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/linux-master/scripts/dtc/ |
H A D | checks.c | 1482 WARNING_PROPERTY_PHANDLE_CELLS(clocks, "clocks", "#clock-cells");
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