1/* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright �� 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 29#include <linux/delay.h> 30#include <linux/i2c.h> 31#include <linux/kernel.h> 32#include <linux/module.h> 33#include <linux/slab.h> 34 35#include <drm/drm_crtc.h> 36#include <drm/drm_crtc_helper.h> 37#include <drm/drm_edid.h> 38#include <drm/drm_modeset_helper_vtables.h> 39 40#include "psb_drv.h" 41#include "psb_intel_drv.h" 42#include "psb_intel_reg.h" 43#include "psb_intel_sdvo_regs.h" 44 45#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 46#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 47#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 48#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0) 49 50#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 51 SDVO_TV_MASK) 52 53#define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 54#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 55#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 56#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 57 58 59static const char *tv_format_names[] = { 60 "NTSC_M" , "NTSC_J" , "NTSC_443", 61 "PAL_B" , "PAL_D" , "PAL_G" , 62 "PAL_H" , "PAL_I" , "PAL_M" , 63 "PAL_N" , "PAL_NC" , "PAL_60" , 64 "SECAM_B" , "SECAM_D" , "SECAM_G" , 65 "SECAM_K" , "SECAM_K1", "SECAM_L" , 66 "SECAM_60" 67}; 68 69struct psb_intel_sdvo { 70 struct gma_encoder base; 71 72 struct i2c_adapter *i2c; 73 u8 slave_addr; 74 75 struct i2c_adapter ddc; 76 77 /* Register for the SDVO device: SDVOB or SDVOC */ 78 int sdvo_reg; 79 80 /* Active outputs controlled by this SDVO output */ 81 uint16_t controlled_output; 82 83 /* 84 * Capabilities of the SDVO device returned by 85 * i830_sdvo_get_capabilities() 86 */ 87 struct psb_intel_sdvo_caps caps; 88 89 /* Pixel clock limitations reported by the SDVO device, in kHz */ 90 int pixel_clock_min, pixel_clock_max; 91 92 /* 93 * For multiple function SDVO device, 94 * this is for current attached outputs. 95 */ 96 uint16_t attached_output; 97 98 /** 99 * This is used to select the color range of RBG outputs in HDMI mode. 100 * It is only valid when using TMDS encoding and 8 bit per color mode. 101 */ 102 uint32_t color_range; 103 104 /** 105 * This is set if we're going to treat the device as TV-out. 106 * 107 * While we have these nice friendly flags for output types that ought 108 * to decide this for us, the S-Video output on our HDMI+S-Video card 109 * shows up as RGB1 (VGA). 110 */ 111 bool is_tv; 112 113 /* This is for current tv format name */ 114 int tv_format_index; 115 116 /** 117 * This is set if we treat the device as HDMI, instead of DVI. 118 */ 119 bool is_hdmi; 120 bool has_hdmi_monitor; 121 bool has_hdmi_audio; 122 123 /** 124 * This is set if we detect output of sdvo device as LVDS and 125 * have a valid fixed mode to use with the panel. 126 */ 127 bool is_lvds; 128 129 /** 130 * This is sdvo fixed panel mode pointer 131 */ 132 struct drm_display_mode *sdvo_lvds_fixed_mode; 133 134 /* DDC bus used by this SDVO encoder */ 135 uint8_t ddc_bus; 136 137 u8 pixel_multiplier; 138 139 /* Input timings for adjusted_mode */ 140 struct psb_intel_sdvo_dtd input_dtd; 141 142 /* Saved SDVO output states */ 143 uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */ 144}; 145 146struct psb_intel_sdvo_connector { 147 struct gma_connector base; 148 149 /* Mark the type of connector */ 150 uint16_t output_flag; 151 152 int force_audio; 153 154 /* This contains all current supported TV format */ 155 u8 tv_format_supported[ARRAY_SIZE(tv_format_names)]; 156 int format_supported_num; 157 struct drm_property *tv_format; 158 159 /* add the property for the SDVO-TV */ 160 struct drm_property *left; 161 struct drm_property *right; 162 struct drm_property *top; 163 struct drm_property *bottom; 164 struct drm_property *hpos; 165 struct drm_property *vpos; 166 struct drm_property *contrast; 167 struct drm_property *saturation; 168 struct drm_property *hue; 169 struct drm_property *sharpness; 170 struct drm_property *flicker_filter; 171 struct drm_property *flicker_filter_adaptive; 172 struct drm_property *flicker_filter_2d; 173 struct drm_property *tv_chroma_filter; 174 struct drm_property *tv_luma_filter; 175 struct drm_property *dot_crawl; 176 177 /* add the property for the SDVO-TV/LVDS */ 178 struct drm_property *brightness; 179 180 /* Add variable to record current setting for the above property */ 181 u32 left_margin, right_margin, top_margin, bottom_margin; 182 183 /* this is to get the range of margin.*/ 184 u32 max_hscan, max_vscan; 185 u32 max_hpos, cur_hpos; 186 u32 max_vpos, cur_vpos; 187 u32 cur_brightness, max_brightness; 188 u32 cur_contrast, max_contrast; 189 u32 cur_saturation, max_saturation; 190 u32 cur_hue, max_hue; 191 u32 cur_sharpness, max_sharpness; 192 u32 cur_flicker_filter, max_flicker_filter; 193 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 194 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 195 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 196 u32 cur_tv_luma_filter, max_tv_luma_filter; 197 u32 cur_dot_crawl, max_dot_crawl; 198}; 199 200static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder) 201{ 202 return container_of(encoder, struct psb_intel_sdvo, base.base); 203} 204 205static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 206{ 207 return container_of(gma_attached_encoder(connector), 208 struct psb_intel_sdvo, base); 209} 210 211static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector) 212{ 213 return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base); 214} 215 216static bool 217psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags); 218static bool 219psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo, 220 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 221 int type); 222static bool 223psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo, 224 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector); 225 226/* 227 * Writes the SDVOB or SDVOC with the given value, but always writes both 228 * SDVOB and SDVOC to work around apparent hardware issues (according to 229 * comments in the BIOS). 230 */ 231static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val) 232{ 233 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 234 u32 bval = val, cval = val; 235 int i, j; 236 int need_aux = IS_MRST(dev) ? 1 : 0; 237 238 for (j = 0; j <= need_aux; j++) { 239 if (psb_intel_sdvo->sdvo_reg == SDVOB) 240 cval = REG_READ_WITH_AUX(SDVOC, j); 241 else 242 bval = REG_READ_WITH_AUX(SDVOB, j); 243 244 /* 245 * Write the registers twice for luck. Sometimes, 246 * writing them only once doesn't appear to 'stick'. 247 * The BIOS does this too. Yay, magic 248 */ 249 for (i = 0; i < 2; i++) { 250 REG_WRITE_WITH_AUX(SDVOB, bval, j); 251 REG_READ_WITH_AUX(SDVOB, j); 252 REG_WRITE_WITH_AUX(SDVOC, cval, j); 253 REG_READ_WITH_AUX(SDVOC, j); 254 } 255 } 256} 257 258static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch) 259{ 260 struct i2c_msg msgs[] = { 261 { 262 .addr = psb_intel_sdvo->slave_addr, 263 .flags = 0, 264 .len = 1, 265 .buf = &addr, 266 }, 267 { 268 .addr = psb_intel_sdvo->slave_addr, 269 .flags = I2C_M_RD, 270 .len = 1, 271 .buf = ch, 272 } 273 }; 274 int ret; 275 276 if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2) 277 return true; 278 279 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 280 return false; 281} 282 283#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 284/** Mapping of command numbers to names, for debug output */ 285static const struct _sdvo_cmd_name { 286 u8 cmd; 287 const char *name; 288} sdvo_cmd_names[] = { 289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 332 333 /* Add the op code for SDVO enhancements */ 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 378 379 /* HDMI op code */ 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 400}; 401 402#define IS_SDVOB(reg) (reg == SDVOB) 403#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC") 404 405static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, 406 u8 cmd, const void *args, int args_len) 407{ 408 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 409 int i, pos = 0; 410 char buffer[73]; 411 412#define BUF_PRINT(args...) \ 413 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args) 414 415 for (i = 0; i < args_len; i++) { 416 BUF_PRINT("%02X ", ((u8 *)args)[i]); 417 } 418 419 for (; i < 8; i++) { 420 BUF_PRINT(" "); 421 } 422 423 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 424 if (cmd == sdvo_cmd_names[i].cmd) { 425 BUF_PRINT("(%s)", sdvo_cmd_names[i].name); 426 break; 427 } 428 } 429 430 if (i == ARRAY_SIZE(sdvo_cmd_names)) 431 BUF_PRINT("(%02X)", cmd); 432 433 drm_WARN_ON(dev, pos >= sizeof(buffer) - 1); 434#undef BUF_PRINT 435 436 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(psb_intel_sdvo), cmd, buffer); 437} 438 439static const char *cmd_status_names[] = { 440 "Power on", 441 "Success", 442 "Not supported", 443 "Invalid arg", 444 "Pending", 445 "Target not specified", 446 "Scaling not supported" 447}; 448 449#define MAX_ARG_LEN 32 450 451static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 452 const void *args, int args_len) 453{ 454 u8 buf[MAX_ARG_LEN*2 + 2], status; 455 struct i2c_msg msgs[MAX_ARG_LEN + 3]; 456 int i, ret; 457 458 if (args_len > MAX_ARG_LEN) { 459 DRM_ERROR("Need to increase arg length\n"); 460 return false; 461 } 462 463 psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len); 464 465 for (i = 0; i < args_len; i++) { 466 msgs[i].addr = psb_intel_sdvo->slave_addr; 467 msgs[i].flags = 0; 468 msgs[i].len = 2; 469 msgs[i].buf = buf + 2 *i; 470 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 471 buf[2*i + 1] = ((u8*)args)[i]; 472 } 473 msgs[i].addr = psb_intel_sdvo->slave_addr; 474 msgs[i].flags = 0; 475 msgs[i].len = 2; 476 msgs[i].buf = buf + 2*i; 477 buf[2*i + 0] = SDVO_I2C_OPCODE; 478 buf[2*i + 1] = cmd; 479 480 /* the following two are to read the response */ 481 status = SDVO_I2C_CMD_STATUS; 482 msgs[i+1].addr = psb_intel_sdvo->slave_addr; 483 msgs[i+1].flags = 0; 484 msgs[i+1].len = 1; 485 msgs[i+1].buf = &status; 486 487 msgs[i+2].addr = psb_intel_sdvo->slave_addr; 488 msgs[i+2].flags = I2C_M_RD; 489 msgs[i+2].len = 1; 490 msgs[i+2].buf = &status; 491 492 ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3); 493 if (ret < 0) { 494 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 495 return false; 496 } 497 if (ret != i+3) { 498 /* failure in I2C transfer */ 499 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 500 return false; 501 } 502 503 return true; 504} 505 506static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo, 507 void *response, int response_len) 508{ 509 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 510 char buffer[73]; 511 int i, pos = 0; 512 u8 retry = 5; 513 u8 status; 514 515 /* 516 * The documentation states that all commands will be 517 * processed within 15��s, and that we need only poll 518 * the status byte a maximum of 3 times in order for the 519 * command to be complete. 520 * 521 * Check 5 times in case the hardware failed to read the docs. 522 */ 523 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 524 SDVO_I2C_CMD_STATUS, 525 &status)) 526 goto log_fail; 527 528 while ((status == SDVO_CMD_STATUS_PENDING || 529 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) { 530 udelay(15); 531 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 532 SDVO_I2C_CMD_STATUS, 533 &status)) 534 goto log_fail; 535 } 536 537#define BUF_PRINT(args...) \ 538 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args) 539 540 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 541 BUF_PRINT("(%s)", cmd_status_names[status]); 542 else 543 BUF_PRINT("(??? %d)", status); 544 545 if (status != SDVO_CMD_STATUS_SUCCESS) 546 goto log_fail; 547 548 /* Read the command response */ 549 for (i = 0; i < response_len; i++) { 550 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 551 SDVO_I2C_RETURN_0 + i, 552 &((u8 *)response)[i])) 553 goto log_fail; 554 BUF_PRINT(" %02X", ((u8 *)response)[i]); 555 } 556 557 drm_WARN_ON(dev, pos >= sizeof(buffer) - 1); 558#undef BUF_PRINT 559 560 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(psb_intel_sdvo), buffer); 561 return true; 562 563log_fail: 564 DRM_DEBUG_KMS("%s: R: ... failed %s\n", 565 SDVO_NAME(psb_intel_sdvo), buffer); 566 return false; 567} 568 569static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 570{ 571 if (mode->clock >= 100000) 572 return 1; 573 else if (mode->clock >= 50000) 574 return 2; 575 else 576 return 4; 577} 578 579static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo, 580 u8 ddc_bus) 581{ 582 /* This must be the immediately preceding write before the i2c xfer */ 583 return psb_intel_sdvo_write_cmd(psb_intel_sdvo, 584 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 585 &ddc_bus, 1); 586} 587 588static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len) 589{ 590 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len)) 591 return false; 592 593 return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0); 594} 595 596static bool 597psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len) 598{ 599 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0)) 600 return false; 601 602 return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len); 603} 604 605static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo) 606{ 607 struct psb_intel_sdvo_set_target_input_args targets = {0}; 608 return psb_intel_sdvo_set_value(psb_intel_sdvo, 609 SDVO_CMD_SET_TARGET_INPUT, 610 &targets, sizeof(targets)); 611} 612 613/* 614 * Return whether each input is trained. 615 * 616 * This function is making an assumption about the layout of the response, 617 * which should be checked against the docs. 618 */ 619static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2) 620{ 621 struct psb_intel_sdvo_get_trained_inputs_response response; 622 623 BUILD_BUG_ON(sizeof(response) != 1); 624 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 625 &response, sizeof(response))) 626 return false; 627 628 *input_1 = response.input0_trained; 629 *input_2 = response.input1_trained; 630 return true; 631} 632 633static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo, 634 u16 outputs) 635{ 636 return psb_intel_sdvo_set_value(psb_intel_sdvo, 637 SDVO_CMD_SET_ACTIVE_OUTPUTS, 638 &outputs, sizeof(outputs)); 639} 640 641static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo, 642 int mode) 643{ 644 u8 state = SDVO_ENCODER_STATE_ON; 645 646 switch (mode) { 647 case DRM_MODE_DPMS_ON: 648 state = SDVO_ENCODER_STATE_ON; 649 break; 650 case DRM_MODE_DPMS_STANDBY: 651 state = SDVO_ENCODER_STATE_STANDBY; 652 break; 653 case DRM_MODE_DPMS_SUSPEND: 654 state = SDVO_ENCODER_STATE_SUSPEND; 655 break; 656 case DRM_MODE_DPMS_OFF: 657 state = SDVO_ENCODER_STATE_OFF; 658 break; 659 } 660 661 return psb_intel_sdvo_set_value(psb_intel_sdvo, 662 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 663} 664 665static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo, 666 int *clock_min, 667 int *clock_max) 668{ 669 struct psb_intel_sdvo_pixel_clock_range clocks; 670 671 BUILD_BUG_ON(sizeof(clocks) != 4); 672 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 673 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 674 &clocks, sizeof(clocks))) 675 return false; 676 677 /* Convert the values from units of 10 kHz to kHz. */ 678 *clock_min = clocks.min * 10; 679 *clock_max = clocks.max * 10; 680 return true; 681} 682 683static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo, 684 u16 outputs) 685{ 686 return psb_intel_sdvo_set_value(psb_intel_sdvo, 687 SDVO_CMD_SET_TARGET_OUTPUT, 688 &outputs, sizeof(outputs)); 689} 690 691static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 692 struct psb_intel_sdvo_dtd *dtd) 693{ 694 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 695 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 696} 697 698static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 699 struct psb_intel_sdvo_dtd *dtd) 700{ 701 return psb_intel_sdvo_set_timing(psb_intel_sdvo, 702 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 703} 704 705static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo, 706 struct psb_intel_sdvo_dtd *dtd) 707{ 708 return psb_intel_sdvo_set_timing(psb_intel_sdvo, 709 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 710} 711 712static bool 713psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 714 uint16_t clock, 715 uint16_t width, 716 uint16_t height) 717{ 718 struct psb_intel_sdvo_preferred_input_timing_args args; 719 720 memset(&args, 0, sizeof(args)); 721 args.clock = clock; 722 args.width = width; 723 args.height = height; 724 args.interlace = 0; 725 726 if (psb_intel_sdvo->is_lvds && 727 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 728 psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 729 args.scaled = 1; 730 731 return psb_intel_sdvo_set_value(psb_intel_sdvo, 732 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 733 &args, sizeof(args)); 734} 735 736static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 737 struct psb_intel_sdvo_dtd *dtd) 738{ 739 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 740 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 741 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 742 &dtd->part1, sizeof(dtd->part1)) && 743 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 744 &dtd->part2, sizeof(dtd->part2)); 745} 746 747static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val) 748{ 749 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 750} 751 752static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd, 753 const struct drm_display_mode *mode) 754{ 755 uint16_t width, height; 756 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 757 uint16_t h_sync_offset, v_sync_offset; 758 759 width = mode->crtc_hdisplay; 760 height = mode->crtc_vdisplay; 761 762 /* do some mode translations */ 763 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; 764 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; 765 766 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; 767 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; 768 769 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; 770 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; 771 772 dtd->part1.clock = mode->clock / 10; 773 dtd->part1.h_active = width & 0xff; 774 dtd->part1.h_blank = h_blank_len & 0xff; 775 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 776 ((h_blank_len >> 8) & 0xf); 777 dtd->part1.v_active = height & 0xff; 778 dtd->part1.v_blank = v_blank_len & 0xff; 779 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 780 ((v_blank_len >> 8) & 0xf); 781 782 dtd->part2.h_sync_off = h_sync_offset & 0xff; 783 dtd->part2.h_sync_width = h_sync_len & 0xff; 784 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 785 (v_sync_len & 0xf); 786 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 787 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 788 ((v_sync_len & 0x30) >> 4); 789 790 dtd->part2.dtd_flags = 0x18; 791 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 792 dtd->part2.dtd_flags |= 0x2; 793 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 794 dtd->part2.dtd_flags |= 0x4; 795 796 dtd->part2.sdvo_flags = 0; 797 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 798 dtd->part2.reserved = 0; 799} 800 801static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 802 const struct psb_intel_sdvo_dtd *dtd) 803{ 804 mode->hdisplay = dtd->part1.h_active; 805 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 806 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 807 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 808 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 809 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 810 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 811 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 812 813 mode->vdisplay = dtd->part1.v_active; 814 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 815 mode->vsync_start = mode->vdisplay; 816 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 817 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 818 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 819 mode->vsync_end = mode->vsync_start + 820 (dtd->part2.v_sync_off_width & 0xf); 821 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 822 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 823 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 824 825 mode->clock = dtd->part1.clock * 10; 826 827 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 828 if (dtd->part2.dtd_flags & 0x2) 829 mode->flags |= DRM_MODE_FLAG_PHSYNC; 830 if (dtd->part2.dtd_flags & 0x4) 831 mode->flags |= DRM_MODE_FLAG_PVSYNC; 832} 833 834static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo) 835{ 836 struct psb_intel_sdvo_encode encode; 837 838 BUILD_BUG_ON(sizeof(encode) != 2); 839 return psb_intel_sdvo_get_value(psb_intel_sdvo, 840 SDVO_CMD_GET_SUPP_ENCODE, 841 &encode, sizeof(encode)); 842} 843 844static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo, 845 uint8_t mode) 846{ 847 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 848} 849 850static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo, 851 uint8_t mode) 852{ 853 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 854} 855 856#if 0 857static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo) 858{ 859 int i, j; 860 uint8_t set_buf_index[2]; 861 uint8_t av_split; 862 uint8_t buf_size; 863 uint8_t buf[48]; 864 uint8_t *pos; 865 866 psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 867 868 for (i = 0; i <= av_split; i++) { 869 set_buf_index[0] = i; set_buf_index[1] = 0; 870 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 871 set_buf_index, 2); 872 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 873 psb_intel_sdvo_read_response(encoder, &buf_size, 1); 874 875 pos = buf; 876 for (j = 0; j <= buf_size; j += 8) { 877 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 878 NULL, 0); 879 psb_intel_sdvo_read_response(encoder, pos, 8); 880 pos += 8; 881 } 882 } 883} 884#endif 885 886static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo) 887{ 888 DRM_INFO("HDMI is not supported yet"); 889 890 return false; 891} 892 893static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo) 894{ 895 struct psb_intel_sdvo_tv_format format; 896 uint32_t format_map; 897 898 format_map = 1 << psb_intel_sdvo->tv_format_index; 899 memset(&format, 0, sizeof(format)); 900 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 901 902 BUILD_BUG_ON(sizeof(format) != 6); 903 return psb_intel_sdvo_set_value(psb_intel_sdvo, 904 SDVO_CMD_SET_TV_FORMAT, 905 &format, sizeof(format)); 906} 907 908static bool 909psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo, 910 const struct drm_display_mode *mode) 911{ 912 struct psb_intel_sdvo_dtd output_dtd; 913 914 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 915 psb_intel_sdvo->attached_output)) 916 return false; 917 918 psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 919 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd)) 920 return false; 921 922 return true; 923} 924 925static bool 926psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo, 927 const struct drm_display_mode *mode, 928 struct drm_display_mode *adjusted_mode) 929{ 930 /* Reset the input timing to the screen. Assume always input 0. */ 931 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 932 return false; 933 934 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo, 935 mode->clock / 10, 936 mode->hdisplay, 937 mode->vdisplay)) 938 return false; 939 940 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo, 941 &psb_intel_sdvo->input_dtd)) 942 return false; 943 944 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd); 945 946 drm_mode_set_crtcinfo(adjusted_mode, 0); 947 return true; 948} 949 950static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder, 951 const struct drm_display_mode *mode, 952 struct drm_display_mode *adjusted_mode) 953{ 954 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 955 956 /* We need to construct preferred input timings based on our 957 * output timings. To do that, we have to set the output 958 * timings, even though this isn't really the right place in 959 * the sequence to do it. Oh well. 960 */ 961 if (psb_intel_sdvo->is_tv) { 962 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode)) 963 return false; 964 965 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo, 966 mode, 967 adjusted_mode); 968 } else if (psb_intel_sdvo->is_lvds) { 969 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, 970 psb_intel_sdvo->sdvo_lvds_fixed_mode)) 971 return false; 972 973 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo, 974 mode, 975 adjusted_mode); 976 } 977 978 /* Make the CRTC code factor in the SDVO pixel multiplier. The 979 * SDVO device will factor out the multiplier during mode_set. 980 */ 981 psb_intel_sdvo->pixel_multiplier = 982 psb_intel_sdvo_get_pixel_multiplier(adjusted_mode); 983 adjusted_mode->clock *= psb_intel_sdvo->pixel_multiplier; 984 985 return true; 986} 987 988static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder, 989 struct drm_display_mode *mode, 990 struct drm_display_mode *adjusted_mode) 991{ 992 struct drm_device *dev = encoder->dev; 993 struct drm_crtc *crtc = encoder->crtc; 994 struct gma_crtc *gma_crtc = to_gma_crtc(crtc); 995 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 996 u32 sdvox; 997 struct psb_intel_sdvo_in_out_map in_out; 998 struct psb_intel_sdvo_dtd input_dtd; 999 int rate; 1000 int need_aux = IS_MRST(dev) ? 1 : 0; 1001 1002 if (!mode) 1003 return; 1004 1005 /* First, set the input mapping for the first input to our controlled 1006 * output. This is only correct if we're a single-input device, in 1007 * which case the first input is the output from the appropriate SDVO 1008 * channel on the motherboard. In a two-input device, the first input 1009 * will be SDVOB and the second SDVOC. 1010 */ 1011 in_out.in0 = psb_intel_sdvo->attached_output; 1012 in_out.in1 = 0; 1013 1014 psb_intel_sdvo_set_value(psb_intel_sdvo, 1015 SDVO_CMD_SET_IN_OUT_MAP, 1016 &in_out, sizeof(in_out)); 1017 1018 /* Set the output timings to the screen */ 1019 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 1020 psb_intel_sdvo->attached_output)) 1021 return; 1022 1023 /* We have tried to get input timing in mode_fixup, and filled into 1024 * adjusted_mode. 1025 */ 1026 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) { 1027 input_dtd = psb_intel_sdvo->input_dtd; 1028 } else { 1029 /* Set the output timing to the screen */ 1030 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 1031 psb_intel_sdvo->attached_output)) 1032 return; 1033 1034 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1035 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd); 1036 } 1037 1038 /* Set the input timing to the screen. Assume always input 0. */ 1039 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 1040 return; 1041 1042 if (psb_intel_sdvo->has_hdmi_monitor) { 1043 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI); 1044 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo, 1045 SDVO_COLORIMETRY_RGB256); 1046 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo); 1047 } else 1048 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI); 1049 1050 if (psb_intel_sdvo->is_tv && 1051 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo)) 1052 return; 1053 1054 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd); 1055 1056 switch (psb_intel_sdvo->pixel_multiplier) { 1057 default: 1058 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1059 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1060 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1061 } 1062 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate)) 1063 return; 1064 1065 /* Set the SDVO control regs. */ 1066 if (need_aux) 1067 sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg); 1068 else 1069 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg); 1070 1071 switch (psb_intel_sdvo->sdvo_reg) { 1072 case SDVOB: 1073 sdvox &= SDVOB_PRESERVE_MASK; 1074 break; 1075 case SDVOC: 1076 sdvox &= SDVOC_PRESERVE_MASK; 1077 break; 1078 } 1079 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1080 1081 if (gma_crtc->pipe == 1) 1082 sdvox |= SDVO_PIPE_B_SELECT; 1083 if (psb_intel_sdvo->has_hdmi_audio) 1084 sdvox |= SDVO_AUDIO_ENABLE; 1085 1086 /* FIXME: Check if this is needed for PSB 1087 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1088 */ 1089 1090 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL) 1091 sdvox |= SDVO_STALL_SELECT; 1092 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox); 1093} 1094 1095static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1096{ 1097 struct drm_device *dev = encoder->dev; 1098 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 1099 u32 temp; 1100 int i; 1101 int need_aux = IS_MRST(dev) ? 1 : 0; 1102 1103 switch (mode) { 1104 case DRM_MODE_DPMS_ON: 1105 DRM_DEBUG("DPMS_ON"); 1106 break; 1107 case DRM_MODE_DPMS_OFF: 1108 DRM_DEBUG("DPMS_OFF"); 1109 break; 1110 default: 1111 DRM_DEBUG("DPMS: %d", mode); 1112 } 1113 1114 if (mode != DRM_MODE_DPMS_ON) { 1115 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0); 1116 if (0) 1117 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode); 1118 1119 if (mode == DRM_MODE_DPMS_OFF) { 1120 if (need_aux) 1121 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg); 1122 else 1123 temp = REG_READ(psb_intel_sdvo->sdvo_reg); 1124 1125 if ((temp & SDVO_ENABLE) != 0) { 1126 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE); 1127 } 1128 } 1129 } else { 1130 bool input1, input2; 1131 u8 status; 1132 1133 if (need_aux) 1134 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg); 1135 else 1136 temp = REG_READ(psb_intel_sdvo->sdvo_reg); 1137 1138 if ((temp & SDVO_ENABLE) == 0) 1139 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE); 1140 1141 for (i = 0; i < 2; i++) 1142 gma_wait_for_vblank(dev); 1143 1144 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2); 1145 /* Warn if the device reported failure to sync. 1146 * A lot of SDVO devices fail to notify of sync, but it's 1147 * a given it the status is a success, we succeeded. 1148 */ 1149 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1150 DRM_DEBUG_KMS("First %s output reported failure to " 1151 "sync\n", SDVO_NAME(psb_intel_sdvo)); 1152 } 1153 1154 if (0) 1155 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode); 1156 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output); 1157 } 1158 return; 1159} 1160 1161static enum drm_mode_status psb_intel_sdvo_mode_valid(struct drm_connector *connector, 1162 struct drm_display_mode *mode) 1163{ 1164 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1165 1166 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1167 return MODE_NO_DBLESCAN; 1168 1169 if (psb_intel_sdvo->pixel_clock_min > mode->clock) 1170 return MODE_CLOCK_LOW; 1171 1172 if (psb_intel_sdvo->pixel_clock_max < mode->clock) 1173 return MODE_CLOCK_HIGH; 1174 1175 if (psb_intel_sdvo->is_lvds) { 1176 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1177 return MODE_PANEL; 1178 1179 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1180 return MODE_PANEL; 1181 } 1182 1183 return MODE_OK; 1184} 1185 1186static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps) 1187{ 1188 BUILD_BUG_ON(sizeof(*caps) != 8); 1189 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 1190 SDVO_CMD_GET_DEVICE_CAPS, 1191 caps, sizeof(*caps))) 1192 return false; 1193 1194 DRM_DEBUG_KMS("SDVO capabilities:\n" 1195 " vendor_id: %d\n" 1196 " device_id: %d\n" 1197 " device_rev_id: %d\n" 1198 " sdvo_version_major: %d\n" 1199 " sdvo_version_minor: %d\n" 1200 " sdvo_inputs_mask: %d\n" 1201 " smooth_scaling: %d\n" 1202 " sharp_scaling: %d\n" 1203 " up_scaling: %d\n" 1204 " down_scaling: %d\n" 1205 " stall_support: %d\n" 1206 " output_flags: %d\n", 1207 caps->vendor_id, 1208 caps->device_id, 1209 caps->device_rev_id, 1210 caps->sdvo_version_major, 1211 caps->sdvo_version_minor, 1212 caps->sdvo_inputs_mask, 1213 caps->smooth_scaling, 1214 caps->sharp_scaling, 1215 caps->up_scaling, 1216 caps->down_scaling, 1217 caps->stall_support, 1218 caps->output_flags); 1219 1220 return true; 1221} 1222 1223static bool 1224psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo) 1225{ 1226 /* Is there more than one type of output? */ 1227 int caps = psb_intel_sdvo->caps.output_flags & 0xf; 1228 return caps & -caps; 1229} 1230 1231static struct edid * 1232psb_intel_sdvo_get_edid(struct drm_connector *connector) 1233{ 1234 struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector); 1235 return drm_get_edid(connector, &sdvo->ddc); 1236} 1237 1238/* Mac mini hack -- use the same DDC as the analog connector */ 1239static struct edid * 1240psb_intel_sdvo_get_analog_edid(struct drm_connector *connector) 1241{ 1242 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev); 1243 1244 return drm_get_edid(connector, 1245 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter); 1246} 1247 1248static enum drm_connector_status 1249psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector) 1250{ 1251 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1252 enum drm_connector_status status; 1253 struct edid *edid; 1254 1255 edid = psb_intel_sdvo_get_edid(connector); 1256 1257 if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) { 1258 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus; 1259 1260 /* 1261 * Don't use the 1 as the argument of DDC bus switch to get 1262 * the EDID. It is used for SDVO SPD ROM. 1263 */ 1264 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1265 psb_intel_sdvo->ddc_bus = ddc; 1266 edid = psb_intel_sdvo_get_edid(connector); 1267 if (edid) 1268 break; 1269 } 1270 /* 1271 * If we found the EDID on the other bus, 1272 * assume that is the correct DDC bus. 1273 */ 1274 if (edid == NULL) 1275 psb_intel_sdvo->ddc_bus = saved_ddc; 1276 } 1277 1278 /* 1279 * When there is no edid and no monitor is connected with VGA 1280 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1281 */ 1282 if (edid == NULL) 1283 edid = psb_intel_sdvo_get_analog_edid(connector); 1284 1285 status = connector_status_unknown; 1286 if (edid != NULL) { 1287 /* DDC bus is shared, match EDID to connector type */ 1288 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1289 status = connector_status_connected; 1290 if (psb_intel_sdvo->is_hdmi) { 1291 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1292 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1293 } 1294 } else 1295 status = connector_status_disconnected; 1296 kfree(edid); 1297 } 1298 1299 if (status == connector_status_connected) { 1300 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1301 if (psb_intel_sdvo_connector->force_audio) 1302 psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0; 1303 } 1304 1305 return status; 1306} 1307 1308static enum drm_connector_status 1309psb_intel_sdvo_detect(struct drm_connector *connector, bool force) 1310{ 1311 uint16_t response; 1312 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1313 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1314 enum drm_connector_status ret; 1315 1316 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, 1317 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) 1318 return connector_status_unknown; 1319 1320 /* add 30ms delay when the output type might be TV */ 1321 if (psb_intel_sdvo->caps.output_flags & 1322 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0)) 1323 mdelay(30); 1324 1325 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2)) 1326 return connector_status_unknown; 1327 1328 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1329 response & 0xff, response >> 8, 1330 psb_intel_sdvo_connector->output_flag); 1331 1332 if (response == 0) 1333 return connector_status_disconnected; 1334 1335 psb_intel_sdvo->attached_output = response; 1336 1337 psb_intel_sdvo->has_hdmi_monitor = false; 1338 psb_intel_sdvo->has_hdmi_audio = false; 1339 1340 if ((psb_intel_sdvo_connector->output_flag & response) == 0) 1341 ret = connector_status_disconnected; 1342 else if (IS_TMDS(psb_intel_sdvo_connector)) 1343 ret = psb_intel_sdvo_hdmi_sink_detect(connector); 1344 else { 1345 struct edid *edid; 1346 1347 /* if we have an edid check it matches the connection */ 1348 edid = psb_intel_sdvo_get_edid(connector); 1349 if (edid == NULL) 1350 edid = psb_intel_sdvo_get_analog_edid(connector); 1351 if (edid != NULL) { 1352 if (edid->input & DRM_EDID_INPUT_DIGITAL) 1353 ret = connector_status_disconnected; 1354 else 1355 ret = connector_status_connected; 1356 kfree(edid); 1357 } else 1358 ret = connector_status_connected; 1359 } 1360 1361 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1362 if (ret == connector_status_connected) { 1363 psb_intel_sdvo->is_tv = false; 1364 psb_intel_sdvo->is_lvds = false; 1365 psb_intel_sdvo->base.needs_tv_clock = false; 1366 1367 if (response & SDVO_TV_MASK) { 1368 psb_intel_sdvo->is_tv = true; 1369 psb_intel_sdvo->base.needs_tv_clock = true; 1370 } 1371 if (response & SDVO_LVDS_MASK) 1372 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1373 } 1374 1375 return ret; 1376} 1377 1378static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1379{ 1380 struct edid *edid; 1381 1382 /* set the bus switch and get the modes */ 1383 edid = psb_intel_sdvo_get_edid(connector); 1384 1385 /* 1386 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1387 * link between analog and digital outputs. So, if the regular SDVO 1388 * DDC fails, check to see if the analog output is disconnected, in 1389 * which case we'll look there for the digital DDC data. 1390 */ 1391 if (edid == NULL) 1392 edid = psb_intel_sdvo_get_analog_edid(connector); 1393 1394 if (edid != NULL) { 1395 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1396 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1397 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector); 1398 1399 if (connector_is_digital == monitor_is_digital) { 1400 drm_connector_update_edid_property(connector, edid); 1401 drm_add_edid_modes(connector, edid); 1402 } 1403 1404 kfree(edid); 1405 } 1406} 1407 1408/* 1409 * Set of SDVO TV modes. 1410 * Note! This is in reply order (see loop in get_tv_modes). 1411 * XXX: all 60Hz refresh? 1412 */ 1413static const struct drm_display_mode sdvo_tv_modes[] = { 1414 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1415 416, 0, 200, 201, 232, 233, 0, 1416 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1417 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1418 416, 0, 240, 241, 272, 273, 0, 1419 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1420 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1421 496, 0, 300, 301, 332, 333, 0, 1422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1423 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1424 736, 0, 350, 351, 382, 383, 0, 1425 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1426 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1427 736, 0, 400, 401, 432, 433, 0, 1428 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1429 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1430 736, 0, 480, 481, 512, 513, 0, 1431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1432 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1433 800, 0, 480, 481, 512, 513, 0, 1434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1435 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1436 800, 0, 576, 577, 608, 609, 0, 1437 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1438 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1439 816, 0, 350, 351, 382, 383, 0, 1440 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1441 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1442 816, 0, 400, 401, 432, 433, 0, 1443 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1444 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1445 816, 0, 480, 481, 512, 513, 0, 1446 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1447 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1448 816, 0, 540, 541, 572, 573, 0, 1449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1450 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1451 816, 0, 576, 577, 608, 609, 0, 1452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1453 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1454 864, 0, 576, 577, 608, 609, 0, 1455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1456 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1457 896, 0, 600, 601, 632, 633, 0, 1458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1459 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1460 928, 0, 624, 625, 656, 657, 0, 1461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1462 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1463 1016, 0, 766, 767, 798, 799, 0, 1464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1465 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1466 1120, 0, 768, 769, 800, 801, 0, 1467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1468 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1469 1376, 0, 1024, 1025, 1056, 1057, 0, 1470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1471}; 1472 1473static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector) 1474{ 1475 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1476 struct psb_intel_sdvo_sdtv_resolution_request tv_res; 1477 uint32_t reply = 0, format_map = 0; 1478 int i; 1479 1480 /* Read the list of supported input resolutions for the selected TV 1481 * format. 1482 */ 1483 format_map = 1 << psb_intel_sdvo->tv_format_index; 1484 memcpy(&tv_res, &format_map, 1485 min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request))); 1486 1487 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output)) 1488 return; 1489 1490 BUILD_BUG_ON(sizeof(tv_res) != 3); 1491 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, 1492 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1493 &tv_res, sizeof(tv_res))) 1494 return; 1495 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3)) 1496 return; 1497 1498 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1499 if (reply & (1 << i)) { 1500 struct drm_display_mode *nmode; 1501 nmode = drm_mode_duplicate(connector->dev, 1502 &sdvo_tv_modes[i]); 1503 if (nmode) 1504 drm_mode_probed_add(connector, nmode); 1505 } 1506} 1507 1508static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1509{ 1510 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1511 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev); 1512 struct drm_display_mode *newmode; 1513 1514 /* 1515 * Attempt to get the mode list from DDC. 1516 * Assume that the preferred modes are 1517 * arranged in priority order. 1518 */ 1519 psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c); 1520 if (list_empty(&connector->probed_modes) == false) 1521 goto end; 1522 1523 /* Fetch modes from VBT */ 1524 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1525 newmode = drm_mode_duplicate(connector->dev, 1526 dev_priv->sdvo_lvds_vbt_mode); 1527 if (newmode != NULL) { 1528 /* Guarantee the mode is preferred */ 1529 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1530 DRM_MODE_TYPE_DRIVER); 1531 drm_mode_probed_add(connector, newmode); 1532 } 1533 } 1534 1535end: 1536 list_for_each_entry(newmode, &connector->probed_modes, head) { 1537 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1538 psb_intel_sdvo->sdvo_lvds_fixed_mode = 1539 drm_mode_duplicate(connector->dev, newmode); 1540 1541 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode, 1542 0); 1543 1544 psb_intel_sdvo->is_lvds = true; 1545 break; 1546 } 1547 } 1548 1549} 1550 1551static int psb_intel_sdvo_get_modes(struct drm_connector *connector) 1552{ 1553 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1554 1555 if (IS_TV(psb_intel_sdvo_connector)) 1556 psb_intel_sdvo_get_tv_modes(connector); 1557 else if (IS_LVDS(psb_intel_sdvo_connector)) 1558 psb_intel_sdvo_get_lvds_modes(connector); 1559 else 1560 psb_intel_sdvo_get_ddc_modes(connector); 1561 1562 return !list_empty(&connector->probed_modes); 1563} 1564 1565static void psb_intel_sdvo_destroy(struct drm_connector *connector) 1566{ 1567 struct gma_connector *gma_connector = to_gma_connector(connector); 1568 1569 drm_connector_cleanup(connector); 1570 kfree(gma_connector); 1571} 1572 1573static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1574{ 1575 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1576 struct edid *edid; 1577 bool has_audio = false; 1578 1579 if (!psb_intel_sdvo->is_hdmi) 1580 return false; 1581 1582 edid = psb_intel_sdvo_get_edid(connector); 1583 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1584 has_audio = drm_detect_monitor_audio(edid); 1585 1586 return has_audio; 1587} 1588 1589static int 1590psb_intel_sdvo_set_property(struct drm_connector *connector, 1591 struct drm_property *property, 1592 uint64_t val) 1593{ 1594 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1595 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1596 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev); 1597 uint16_t temp_value; 1598 uint8_t cmd; 1599 int ret; 1600 1601 ret = drm_object_property_set_value(&connector->base, property, val); 1602 if (ret) 1603 return ret; 1604 1605 if (property == dev_priv->force_audio_property) { 1606 int i = val; 1607 bool has_audio; 1608 1609 if (i == psb_intel_sdvo_connector->force_audio) 1610 return 0; 1611 1612 psb_intel_sdvo_connector->force_audio = i; 1613 1614 if (i == 0) 1615 has_audio = psb_intel_sdvo_detect_hdmi_audio(connector); 1616 else 1617 has_audio = i > 0; 1618 1619 if (has_audio == psb_intel_sdvo->has_hdmi_audio) 1620 return 0; 1621 1622 psb_intel_sdvo->has_hdmi_audio = has_audio; 1623 goto done; 1624 } 1625 1626 if (property == dev_priv->broadcast_rgb_property) { 1627 if (val == !!psb_intel_sdvo->color_range) 1628 return 0; 1629 1630 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; 1631 goto done; 1632 } 1633 1634#define CHECK_PROPERTY(name, NAME) \ 1635 if (psb_intel_sdvo_connector->name == property) { \ 1636 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1637 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1638 cmd = SDVO_CMD_SET_##NAME; \ 1639 psb_intel_sdvo_connector->cur_##name = temp_value; \ 1640 goto set_value; \ 1641 } 1642 1643 if (property == psb_intel_sdvo_connector->tv_format) { 1644 if (val >= ARRAY_SIZE(tv_format_names)) 1645 return -EINVAL; 1646 1647 if (psb_intel_sdvo->tv_format_index == 1648 psb_intel_sdvo_connector->tv_format_supported[val]) 1649 return 0; 1650 1651 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val]; 1652 goto done; 1653 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) { 1654 temp_value = val; 1655 if (psb_intel_sdvo_connector->left == property) { 1656 drm_object_property_set_value(&connector->base, 1657 psb_intel_sdvo_connector->right, val); 1658 if (psb_intel_sdvo_connector->left_margin == temp_value) 1659 return 0; 1660 1661 psb_intel_sdvo_connector->left_margin = temp_value; 1662 psb_intel_sdvo_connector->right_margin = temp_value; 1663 temp_value = psb_intel_sdvo_connector->max_hscan - 1664 psb_intel_sdvo_connector->left_margin; 1665 cmd = SDVO_CMD_SET_OVERSCAN_H; 1666 goto set_value; 1667 } else if (psb_intel_sdvo_connector->right == property) { 1668 drm_object_property_set_value(&connector->base, 1669 psb_intel_sdvo_connector->left, val); 1670 if (psb_intel_sdvo_connector->right_margin == temp_value) 1671 return 0; 1672 1673 psb_intel_sdvo_connector->left_margin = temp_value; 1674 psb_intel_sdvo_connector->right_margin = temp_value; 1675 temp_value = psb_intel_sdvo_connector->max_hscan - 1676 psb_intel_sdvo_connector->left_margin; 1677 cmd = SDVO_CMD_SET_OVERSCAN_H; 1678 goto set_value; 1679 } else if (psb_intel_sdvo_connector->top == property) { 1680 drm_object_property_set_value(&connector->base, 1681 psb_intel_sdvo_connector->bottom, val); 1682 if (psb_intel_sdvo_connector->top_margin == temp_value) 1683 return 0; 1684 1685 psb_intel_sdvo_connector->top_margin = temp_value; 1686 psb_intel_sdvo_connector->bottom_margin = temp_value; 1687 temp_value = psb_intel_sdvo_connector->max_vscan - 1688 psb_intel_sdvo_connector->top_margin; 1689 cmd = SDVO_CMD_SET_OVERSCAN_V; 1690 goto set_value; 1691 } else if (psb_intel_sdvo_connector->bottom == property) { 1692 drm_object_property_set_value(&connector->base, 1693 psb_intel_sdvo_connector->top, val); 1694 if (psb_intel_sdvo_connector->bottom_margin == temp_value) 1695 return 0; 1696 1697 psb_intel_sdvo_connector->top_margin = temp_value; 1698 psb_intel_sdvo_connector->bottom_margin = temp_value; 1699 temp_value = psb_intel_sdvo_connector->max_vscan - 1700 psb_intel_sdvo_connector->top_margin; 1701 cmd = SDVO_CMD_SET_OVERSCAN_V; 1702 goto set_value; 1703 } 1704 CHECK_PROPERTY(hpos, HPOS) 1705 CHECK_PROPERTY(vpos, VPOS) 1706 CHECK_PROPERTY(saturation, SATURATION) 1707 CHECK_PROPERTY(contrast, CONTRAST) 1708 CHECK_PROPERTY(hue, HUE) 1709 CHECK_PROPERTY(brightness, BRIGHTNESS) 1710 CHECK_PROPERTY(sharpness, SHARPNESS) 1711 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 1712 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 1713 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 1714 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 1715 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 1716 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 1717 } 1718 1719 return -EINVAL; /* unknown property */ 1720 1721set_value: 1722 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2)) 1723 return -EIO; 1724 1725 1726done: 1727 if (psb_intel_sdvo->base.base.crtc) { 1728 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc; 1729 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, 1730 crtc->y, crtc->primary->fb); 1731 } 1732 1733 return 0; 1734#undef CHECK_PROPERTY 1735} 1736 1737static void psb_intel_sdvo_save(struct drm_connector *connector) 1738{ 1739 struct drm_device *dev = connector->dev; 1740 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 1741 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base); 1742 1743 sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg); 1744} 1745 1746static void psb_intel_sdvo_restore(struct drm_connector *connector) 1747{ 1748 struct drm_device *dev = connector->dev; 1749 struct drm_encoder *encoder = &gma_attached_encoder(connector)->base; 1750 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder); 1751 struct drm_crtc *crtc = encoder->crtc; 1752 1753 REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO); 1754 1755 /* Force a full mode set on the crtc. We're supposed to have the 1756 mode_config lock already. */ 1757 if (connector->status == connector_status_connected) 1758 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, 1759 NULL); 1760} 1761 1762static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = { 1763 .dpms = psb_intel_sdvo_dpms, 1764 .mode_fixup = psb_intel_sdvo_mode_fixup, 1765 .prepare = gma_encoder_prepare, 1766 .mode_set = psb_intel_sdvo_mode_set, 1767 .commit = gma_encoder_commit, 1768}; 1769 1770static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = { 1771 .dpms = drm_helper_connector_dpms, 1772 .detect = psb_intel_sdvo_detect, 1773 .fill_modes = drm_helper_probe_single_connector_modes, 1774 .set_property = psb_intel_sdvo_set_property, 1775 .destroy = psb_intel_sdvo_destroy, 1776}; 1777 1778static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = { 1779 .get_modes = psb_intel_sdvo_get_modes, 1780 .mode_valid = psb_intel_sdvo_mode_valid, 1781 .best_encoder = gma_best_encoder, 1782}; 1783 1784static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder) 1785{ 1786 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 1787 1788 if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL) 1789 drm_mode_destroy(encoder->dev, 1790 psb_intel_sdvo->sdvo_lvds_fixed_mode); 1791 1792 i2c_del_adapter(&psb_intel_sdvo->ddc); 1793 gma_encoder_destroy(encoder); 1794} 1795 1796static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = { 1797 .destroy = psb_intel_sdvo_enc_destroy, 1798}; 1799 1800static void 1801psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo) 1802{ 1803 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works. 1804 * We need to figure out if this is true for all available poulsbo 1805 * hardware, or if we need to fiddle with the guessing code above. 1806 * The problem might go away if we can parse sdvo mappings from bios */ 1807 sdvo->ddc_bus = 2; 1808 1809#if 0 1810 uint16_t mask = 0; 1811 unsigned int num_bits; 1812 1813 /* Make a mask of outputs less than or equal to our own priority in the 1814 * list. 1815 */ 1816 switch (sdvo->controlled_output) { 1817 case SDVO_OUTPUT_LVDS1: 1818 mask |= SDVO_OUTPUT_LVDS1; 1819 case SDVO_OUTPUT_LVDS0: 1820 mask |= SDVO_OUTPUT_LVDS0; 1821 case SDVO_OUTPUT_TMDS1: 1822 mask |= SDVO_OUTPUT_TMDS1; 1823 case SDVO_OUTPUT_TMDS0: 1824 mask |= SDVO_OUTPUT_TMDS0; 1825 case SDVO_OUTPUT_RGB1: 1826 mask |= SDVO_OUTPUT_RGB1; 1827 case SDVO_OUTPUT_RGB0: 1828 mask |= SDVO_OUTPUT_RGB0; 1829 break; 1830 } 1831 1832 /* Count bits to find what number we are in the priority list. */ 1833 mask &= sdvo->caps.output_flags; 1834 num_bits = hweight16(mask); 1835 /* If more than 3 outputs, default to DDC bus 3 for now. */ 1836 if (num_bits > 3) 1837 num_bits = 3; 1838 1839 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 1840 sdvo->ddc_bus = 1 << num_bits; 1841#endif 1842} 1843 1844/* 1845 * Choose the appropriate DDC bus for control bus switch command for this 1846 * SDVO output based on the controlled output. 1847 * 1848 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 1849 * outputs, then LVDS outputs. 1850 */ 1851static void 1852psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv, 1853 struct psb_intel_sdvo *sdvo, u32 reg) 1854{ 1855 struct sdvo_device_mapping *mapping; 1856 1857 if (IS_SDVOB(reg)) 1858 mapping = &(dev_priv->sdvo_mappings[0]); 1859 else 1860 mapping = &(dev_priv->sdvo_mappings[1]); 1861 1862 if (mapping->initialized) 1863 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 1864 else 1865 psb_intel_sdvo_guess_ddc_bus(sdvo); 1866} 1867 1868static void 1869psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv, 1870 struct psb_intel_sdvo *sdvo, u32 reg) 1871{ 1872 struct sdvo_device_mapping *mapping; 1873 u8 pin, speed; 1874 1875 if (IS_SDVOB(reg)) 1876 mapping = &dev_priv->sdvo_mappings[0]; 1877 else 1878 mapping = &dev_priv->sdvo_mappings[1]; 1879 1880 pin = GMBUS_PORT_DPB; 1881 speed = GMBUS_RATE_1MHZ >> 8; 1882 if (mapping->initialized) { 1883 pin = mapping->i2c_pin; 1884 speed = mapping->i2c_speed; 1885 } 1886 1887 if (pin < GMBUS_NUM_PORTS) { 1888 sdvo->i2c = &dev_priv->gmbus[pin].adapter; 1889 gma_intel_gmbus_set_speed(sdvo->i2c, speed); 1890 gma_intel_gmbus_force_bit(sdvo->i2c, true); 1891 } else 1892 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter; 1893} 1894 1895static bool 1896psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device) 1897{ 1898 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo); 1899} 1900 1901static u8 1902psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) 1903{ 1904 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); 1905 struct sdvo_device_mapping *my_mapping, *other_mapping; 1906 1907 if (IS_SDVOB(sdvo_reg)) { 1908 my_mapping = &dev_priv->sdvo_mappings[0]; 1909 other_mapping = &dev_priv->sdvo_mappings[1]; 1910 } else { 1911 my_mapping = &dev_priv->sdvo_mappings[1]; 1912 other_mapping = &dev_priv->sdvo_mappings[0]; 1913 } 1914 1915 /* If the BIOS described our SDVO device, take advantage of it. */ 1916 if (my_mapping->slave_addr) 1917 return my_mapping->slave_addr; 1918 1919 /* If the BIOS only described a different SDVO device, use the 1920 * address that it isn't using. 1921 */ 1922 if (other_mapping->slave_addr) { 1923 if (other_mapping->slave_addr == 0x70) 1924 return 0x72; 1925 else 1926 return 0x70; 1927 } 1928 1929 /* No SDVO device info is found for another DVO port, 1930 * so use mapping assumption we had before BIOS parsing. 1931 */ 1932 if (IS_SDVOB(sdvo_reg)) 1933 return 0x70; 1934 else 1935 return 0x72; 1936} 1937 1938static void 1939psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector, 1940 struct psb_intel_sdvo *encoder) 1941{ 1942 drm_connector_init(encoder->base.base.dev, 1943 &connector->base.base, 1944 &psb_intel_sdvo_connector_funcs, 1945 connector->base.base.connector_type); 1946 1947 drm_connector_helper_add(&connector->base.base, 1948 &psb_intel_sdvo_connector_helper_funcs); 1949 1950 connector->base.base.interlace_allowed = 0; 1951 connector->base.base.doublescan_allowed = 0; 1952 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 1953 1954 connector->base.save = psb_intel_sdvo_save; 1955 connector->base.restore = psb_intel_sdvo_restore; 1956 1957 gma_connector_attach_encoder(&connector->base, &encoder->base); 1958} 1959 1960static void 1961psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector) 1962{ 1963 /* FIXME: We don't support HDMI at the moment 1964 struct drm_device *dev = connector->base.base.dev; 1965 1966 intel_attach_force_audio_property(&connector->base.base); 1967 intel_attach_broadcast_rgb_property(&connector->base.base); 1968 */ 1969} 1970 1971static bool 1972psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 1973{ 1974 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 1975 struct drm_connector *connector; 1976 struct gma_connector *intel_connector; 1977 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 1978 1979 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 1980 if (!psb_intel_sdvo_connector) 1981 return false; 1982 1983 if (device == 0) { 1984 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 1985 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 1986 } else if (device == 1) { 1987 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 1988 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 1989 } 1990 1991 intel_connector = &psb_intel_sdvo_connector->base; 1992 connector = &intel_connector->base; 1993 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 1994 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 1995 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 1996 1997 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) { 1998 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 1999 psb_intel_sdvo->is_hdmi = true; 2000 } 2001 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2002 (1 << INTEL_ANALOG_CLONE_BIT)); 2003 2004 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2005 if (psb_intel_sdvo->is_hdmi) 2006 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector); 2007 2008 return true; 2009} 2010 2011static bool 2012psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type) 2013{ 2014 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2015 struct drm_connector *connector; 2016 struct gma_connector *intel_connector; 2017 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2018 2019 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2020 if (!psb_intel_sdvo_connector) 2021 return false; 2022 2023 intel_connector = &psb_intel_sdvo_connector->base; 2024 connector = &intel_connector->base; 2025 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2026 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2027 2028 psb_intel_sdvo->controlled_output |= type; 2029 psb_intel_sdvo_connector->output_flag = type; 2030 2031 psb_intel_sdvo->is_tv = true; 2032 psb_intel_sdvo->base.needs_tv_clock = true; 2033 psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; 2034 2035 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2036 2037 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type)) 2038 goto err; 2039 2040 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector)) 2041 goto err; 2042 2043 return true; 2044 2045err: 2046 psb_intel_sdvo_destroy(connector); 2047 return false; 2048} 2049 2050static bool 2051psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2052{ 2053 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2054 struct drm_connector *connector; 2055 struct gma_connector *intel_connector; 2056 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2057 2058 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2059 if (!psb_intel_sdvo_connector) 2060 return false; 2061 2062 intel_connector = &psb_intel_sdvo_connector->base; 2063 connector = &intel_connector->base; 2064 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2065 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2066 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2067 2068 if (device == 0) { 2069 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2070 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2071 } else if (device == 1) { 2072 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2073 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2074 } 2075 2076 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2077 (1 << INTEL_ANALOG_CLONE_BIT)); 2078 2079 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, 2080 psb_intel_sdvo); 2081 return true; 2082} 2083 2084static bool 2085psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2086{ 2087 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2088 struct drm_connector *connector; 2089 struct gma_connector *intel_connector; 2090 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2091 2092 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2093 if (!psb_intel_sdvo_connector) 2094 return false; 2095 2096 intel_connector = &psb_intel_sdvo_connector->base; 2097 connector = &intel_connector->base; 2098 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2099 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2100 2101 if (device == 0) { 2102 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2103 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2104 } else if (device == 1) { 2105 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2106 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2107 } 2108 2109 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) | 2110 (1 << INTEL_SDVO_LVDS_CLONE_BIT)); 2111 2112 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2113 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector)) 2114 goto err; 2115 2116 return true; 2117 2118err: 2119 psb_intel_sdvo_destroy(connector); 2120 return false; 2121} 2122 2123static bool 2124psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags) 2125{ 2126 psb_intel_sdvo->is_tv = false; 2127 psb_intel_sdvo->base.needs_tv_clock = false; 2128 psb_intel_sdvo->is_lvds = false; 2129 2130 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2131 2132 if (flags & SDVO_OUTPUT_TMDS0) 2133 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0)) 2134 return false; 2135 2136 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2137 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1)) 2138 return false; 2139 2140 /* TV has no XXX1 function block */ 2141 if (flags & SDVO_OUTPUT_SVID0) 2142 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0)) 2143 return false; 2144 2145 if (flags & SDVO_OUTPUT_CVBS0) 2146 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0)) 2147 return false; 2148 2149 if (flags & SDVO_OUTPUT_RGB0) 2150 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0)) 2151 return false; 2152 2153 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2154 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1)) 2155 return false; 2156 2157 if (flags & SDVO_OUTPUT_LVDS0) 2158 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0)) 2159 return false; 2160 2161 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2162 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1)) 2163 return false; 2164 2165 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2166 unsigned char bytes[2]; 2167 2168 psb_intel_sdvo->controlled_output = 0; 2169 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2); 2170 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2171 SDVO_NAME(psb_intel_sdvo), 2172 bytes[0], bytes[1]); 2173 return false; 2174 } 2175 psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1); 2176 2177 return true; 2178} 2179 2180static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo, 2181 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2182 int type) 2183{ 2184 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2185 struct psb_intel_sdvo_tv_format format; 2186 uint32_t format_map, i; 2187 2188 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type)) 2189 return false; 2190 2191 BUILD_BUG_ON(sizeof(format) != 6); 2192 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2193 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2194 &format, sizeof(format))) 2195 return false; 2196 2197 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2198 2199 if (format_map == 0) 2200 return false; 2201 2202 psb_intel_sdvo_connector->format_supported_num = 0; 2203 for (i = 0 ; i < ARRAY_SIZE(tv_format_names); i++) 2204 if (format_map & (1 << i)) 2205 psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i; 2206 2207 2208 psb_intel_sdvo_connector->tv_format = 2209 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2210 "mode", psb_intel_sdvo_connector->format_supported_num); 2211 if (!psb_intel_sdvo_connector->tv_format) 2212 return false; 2213 2214 for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++) 2215 drm_property_add_enum( 2216 psb_intel_sdvo_connector->tv_format, 2217 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]); 2218 2219 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0]; 2220 drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base, 2221 psb_intel_sdvo_connector->tv_format, 0); 2222 return true; 2223 2224} 2225 2226#define ENHANCEMENT(name, NAME) do { \ 2227 if (enhancements.name) { \ 2228 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2229 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2230 return false; \ 2231 psb_intel_sdvo_connector->max_##name = data_value[0]; \ 2232 psb_intel_sdvo_connector->cur_##name = response; \ 2233 psb_intel_sdvo_connector->name = \ 2234 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2235 if (!psb_intel_sdvo_connector->name) return false; \ 2236 drm_object_attach_property(&connector->base, \ 2237 psb_intel_sdvo_connector->name, \ 2238 psb_intel_sdvo_connector->cur_##name); \ 2239 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2240 data_value[0], data_value[1], response); \ 2241 } \ 2242} while(0) 2243 2244static bool 2245psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo, 2246 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2247 struct psb_intel_sdvo_enhancements_reply enhancements) 2248{ 2249 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2250 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base; 2251 uint16_t response, data_value[2]; 2252 2253 /* when horizontal overscan is supported, Add the left/right property */ 2254 if (enhancements.overscan_h) { 2255 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2256 SDVO_CMD_GET_MAX_OVERSCAN_H, 2257 &data_value, 4)) 2258 return false; 2259 2260 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2261 SDVO_CMD_GET_OVERSCAN_H, 2262 &response, 2)) 2263 return false; 2264 2265 psb_intel_sdvo_connector->max_hscan = data_value[0]; 2266 psb_intel_sdvo_connector->left_margin = data_value[0] - response; 2267 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin; 2268 psb_intel_sdvo_connector->left = 2269 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2270 if (!psb_intel_sdvo_connector->left) 2271 return false; 2272 2273 drm_object_attach_property(&connector->base, 2274 psb_intel_sdvo_connector->left, 2275 psb_intel_sdvo_connector->left_margin); 2276 2277 psb_intel_sdvo_connector->right = 2278 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2279 if (!psb_intel_sdvo_connector->right) 2280 return false; 2281 2282 drm_object_attach_property(&connector->base, 2283 psb_intel_sdvo_connector->right, 2284 psb_intel_sdvo_connector->right_margin); 2285 DRM_DEBUG_KMS("h_overscan: max %d, " 2286 "default %d, current %d\n", 2287 data_value[0], data_value[1], response); 2288 } 2289 2290 if (enhancements.overscan_v) { 2291 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2292 SDVO_CMD_GET_MAX_OVERSCAN_V, 2293 &data_value, 4)) 2294 return false; 2295 2296 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2297 SDVO_CMD_GET_OVERSCAN_V, 2298 &response, 2)) 2299 return false; 2300 2301 psb_intel_sdvo_connector->max_vscan = data_value[0]; 2302 psb_intel_sdvo_connector->top_margin = data_value[0] - response; 2303 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin; 2304 psb_intel_sdvo_connector->top = 2305 drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]); 2306 if (!psb_intel_sdvo_connector->top) 2307 return false; 2308 2309 drm_object_attach_property(&connector->base, 2310 psb_intel_sdvo_connector->top, 2311 psb_intel_sdvo_connector->top_margin); 2312 2313 psb_intel_sdvo_connector->bottom = 2314 drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]); 2315 if (!psb_intel_sdvo_connector->bottom) 2316 return false; 2317 2318 drm_object_attach_property(&connector->base, 2319 psb_intel_sdvo_connector->bottom, 2320 psb_intel_sdvo_connector->bottom_margin); 2321 DRM_DEBUG_KMS("v_overscan: max %d, " 2322 "default %d, current %d\n", 2323 data_value[0], data_value[1], response); 2324 } 2325 2326 ENHANCEMENT(hpos, HPOS); 2327 ENHANCEMENT(vpos, VPOS); 2328 ENHANCEMENT(saturation, SATURATION); 2329 ENHANCEMENT(contrast, CONTRAST); 2330 ENHANCEMENT(hue, HUE); 2331 ENHANCEMENT(sharpness, SHARPNESS); 2332 ENHANCEMENT(brightness, BRIGHTNESS); 2333 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2334 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2335 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2336 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2337 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2338 2339 if (enhancements.dot_crawl) { 2340 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2341 return false; 2342 2343 psb_intel_sdvo_connector->max_dot_crawl = 1; 2344 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2345 psb_intel_sdvo_connector->dot_crawl = 2346 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2347 if (!psb_intel_sdvo_connector->dot_crawl) 2348 return false; 2349 2350 drm_object_attach_property(&connector->base, 2351 psb_intel_sdvo_connector->dot_crawl, 2352 psb_intel_sdvo_connector->cur_dot_crawl); 2353 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2354 } 2355 2356 return true; 2357} 2358 2359static bool 2360psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo, 2361 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2362 struct psb_intel_sdvo_enhancements_reply enhancements) 2363{ 2364 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2365 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base; 2366 uint16_t response, data_value[2]; 2367 2368 ENHANCEMENT(brightness, BRIGHTNESS); 2369 2370 return true; 2371} 2372#undef ENHANCEMENT 2373 2374static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo, 2375 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector) 2376{ 2377 union { 2378 struct psb_intel_sdvo_enhancements_reply reply; 2379 uint16_t response; 2380 } enhancements; 2381 2382 BUILD_BUG_ON(sizeof(enhancements) != 2); 2383 2384 enhancements.response = 0; 2385 psb_intel_sdvo_get_value(psb_intel_sdvo, 2386 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2387 &enhancements, sizeof(enhancements)); 2388 if (enhancements.response == 0) { 2389 DRM_DEBUG_KMS("No enhancement is supported\n"); 2390 return true; 2391 } 2392 2393 if (IS_TV(psb_intel_sdvo_connector)) 2394 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply); 2395 else if(IS_LVDS(psb_intel_sdvo_connector)) 2396 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply); 2397 else 2398 return true; 2399} 2400 2401static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, 2402 struct i2c_msg *msgs, 2403 int num) 2404{ 2405 struct psb_intel_sdvo *sdvo = adapter->algo_data; 2406 2407 if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2408 return -EIO; 2409 2410 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); 2411} 2412 2413static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) 2414{ 2415 struct psb_intel_sdvo *sdvo = adapter->algo_data; 2416 return sdvo->i2c->algo->functionality(sdvo->i2c); 2417} 2418 2419static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = { 2420 .master_xfer = psb_intel_sdvo_ddc_proxy_xfer, 2421 .functionality = psb_intel_sdvo_ddc_proxy_func 2422}; 2423 2424static bool 2425psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo, 2426 struct drm_device *dev) 2427{ 2428 sdvo->ddc.owner = THIS_MODULE; 2429 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); 2430 sdvo->ddc.dev.parent = dev->dev; 2431 sdvo->ddc.algo_data = sdvo; 2432 sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy; 2433 2434 return i2c_add_adapter(&sdvo->ddc) == 0; 2435} 2436 2437bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg) 2438{ 2439 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); 2440 struct gma_encoder *gma_encoder; 2441 struct psb_intel_sdvo *psb_intel_sdvo; 2442 int i; 2443 2444 psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL); 2445 if (!psb_intel_sdvo) 2446 return false; 2447 2448 psb_intel_sdvo->sdvo_reg = sdvo_reg; 2449 psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1; 2450 psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg); 2451 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) { 2452 kfree(psb_intel_sdvo); 2453 return false; 2454 } 2455 2456 /* encoder type will be decided later */ 2457 gma_encoder = &psb_intel_sdvo->base; 2458 gma_encoder->type = INTEL_OUTPUT_SDVO; 2459 drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs, 2460 0, NULL); 2461 2462 /* Read the regs to test if we can talk to the device */ 2463 for (i = 0; i < 0x40; i++) { 2464 u8 byte; 2465 2466 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) { 2467 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2468 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2469 goto err; 2470 } 2471 } 2472 2473 if (IS_SDVOB(sdvo_reg)) 2474 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; 2475 else 2476 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; 2477 2478 drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs); 2479 2480 /* In default case sdvo lvds is false */ 2481 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps)) 2482 goto err; 2483 2484 if (psb_intel_sdvo_output_setup(psb_intel_sdvo, 2485 psb_intel_sdvo->caps.output_flags) != true) { 2486 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2487 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2488 goto err; 2489 } 2490 2491 psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg); 2492 2493 /* Set the input timing to the screen. Assume always input 0. */ 2494 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 2495 goto err; 2496 2497 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo, 2498 &psb_intel_sdvo->pixel_clock_min, 2499 &psb_intel_sdvo->pixel_clock_max)) 2500 goto err; 2501 2502 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2503 "clock range %dMHz - %dMHz, " 2504 "input 1: %c, input 2: %c, " 2505 "output 1: %c, output 2: %c\n", 2506 SDVO_NAME(psb_intel_sdvo), 2507 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id, 2508 psb_intel_sdvo->caps.device_rev_id, 2509 psb_intel_sdvo->pixel_clock_min / 1000, 2510 psb_intel_sdvo->pixel_clock_max / 1000, 2511 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2512 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2513 /* check currently supported outputs */ 2514 psb_intel_sdvo->caps.output_flags & 2515 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2516 psb_intel_sdvo->caps.output_flags & 2517 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2518 return true; 2519 2520err: 2521 drm_encoder_cleanup(&gma_encoder->base); 2522 i2c_del_adapter(&psb_intel_sdvo->ddc); 2523 kfree(psb_intel_sdvo); 2524 2525 return false; 2526} 2527