/u-boot/drivers/spi/ |
H A D | spi-sn-f-ospi.c | 575 static int f_ospi_set_speed(struct udevice *bus, u32 speed) argument 579 ospi->max_speed_hz = speed;
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H A D | sh_qspi.c | 312 static int sh_qspi_set_speed(struct udevice *dev, uint speed) argument
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H A D | nxp_fspi.c | 47 #include <asm/arch/speed.h> 971 static int nxp_fspi_set_speed(struct udevice *bus, uint speed) argument 979 ret = clk_set_rate(&f->clk, speed);
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/u-boot/drivers/net/ |
H A D | ravb.c | 448 /* Set the transfer speed */ 449 if (phy->speed == 100) 451 else if (phy->speed == 1000) 662 cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
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H A D | pic32_eth.c | 131 /* Configure MAC based on negotiated speed and duplex 152 switch (phydev->speed) { 165 phydev->drv->name, phydev->speed,
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H A D | cortina_ni.h | 365 u32 speed : 1; /* bits 0:0 */ member in struct:NI_HV_PT_PORT_GLB_CFG_t
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H A D | mvgbe.h | 484 unsigned int speed; member in struct:mvgbe_device
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H A D | dwc_eth_qos.c | 499 switch (eqos->phy->speed) { 510 pr_err("invalid speed %d\n", eqos->phy->speed); 541 switch (eqos->phy->speed) { 555 pr_err("invalid speed %d\n", eqos->phy->speed); 1377 eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0);
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H A D | ag7xxx.c | 609 u32 speed; local 621 speed = AG7XXX_ETH_CFG2_IF_10_100; 623 speed = AG7XXX_ETH_CFG2_IF_1000; 627 speed | AG7XXX_ETH_CFG2_PAD_CRC_EN |
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H A D | designware.c | 338 if (phydev->speed != 1000) 343 if (phydev->speed == 100) 351 printf("Speed: %d, %s duplex%s\n", phydev->speed, 850 pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0);
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H A D | sh_eth.c | 433 /* Set the transfer speed */ 434 if (phy->speed == 100) { 443 } else if (phy->speed == 10) { 452 else if (phy->speed == 1000) { 748 cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
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H A D | tsec.c | 180 * Configure maccfg2 based on negotiated speed and duplex 203 switch (phydev->speed) { 215 if (phydev->speed == 100) 226 printf("Speed: %d, %s duplex%s\n", phydev->speed, 706 /* Check for speed limit, default is 1000Mbps */ 707 max_speed = dev_read_u32_default(dev, "max-speed", 1000);
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H A D | e1000.c | 135 static int e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t * speed, 2322 /* With 82543, we need to force speed and duplex on the MAC equal to what 2323 * the PHY speed and duplex configuration is. In addition, we need to 2372 * activating lplu this function also disables smart speed and vise versa. 2507 * activating lplu this function also disables smart speed and vise versa. 3168 * 1) Set up the MAC to the current PHY speed/duplex 3202 * Detects which PHY is present and setup the speed and duplex 3345 /* First we clear all the 10/100 mb speed bits in the Auto-Neg 3346 * Advertisement Register (Address 4) and the 1000 mb speed bits in 3464 * Link should have been established previously. Reads the speed an 3624 uint16_t speed; local 4089 e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t *speed, uint16_t *duplex) argument [all...] |
/u-boot/drivers/usb/gadget/ |
H A D | storage_common.c | 416 * Three full-speed endpoint descriptors: bulk-in, bulk-out, and 475 * USB 2.0 devices need to expose both high speed and full speed 476 * descriptors, unless they only run at full speed. 537 /* Maxpacket and other transfer characteristics vary by speed. */ 542 if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
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/u-boot/drivers/net/ti/ |
H A D | cpsw.c | 477 if (phy->speed == 1000) 481 if (phy->speed == 100) 483 if (phy->speed == 10 && phy_interface_is_rgmii(phy)) 491 printf("link up on port %d, speed %d, %s duplex\n", 492 slave->slave_num, phy->speed, 847 dev_dbg(priv->dev, "Port %u speed forced to %uMbit\n", 1123 "max-speed", 0);
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/u-boot/drivers/ram/stm32mp1/ |
H A D | stm32mp1_ram.c | 123 config.info.speed = ofnode_read_u32_default(node, "st,mem-speed", 0);
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H A D | stm32mp1_ddr.c | 730 log_debug("speed = %d kHz\n", config->info.speed); 745 if (stm32mp1_ddr_clk_enable(priv, config->info.speed)) 747 config->info.speed);
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/u-boot/drivers/i2c/ |
H A D | xilinx_xiic.c | 318 static int xilinx_xiic_set_speed(struct udevice *dev, uint speed) argument
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/u-boot/arch/mips/mach-octeon/ |
H A D | cvmx-helper-ilk.c | 852 result.s.speed = cvmx_qlm_get_gbaud_mhz(qlm) * 64 / 67; 854 result.s.speed = 857 result.s.speed *= cvmx_pop(lane_mask);
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/u-boot/drivers/ata/ |
H A D | sata_sil.c | 64 static const char *sata_spd_string(unsigned int speed) argument 72 if ((speed - 1) > 2) 75 return spd_str[speed - 1];
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/u-boot/drivers/net/fm/ |
H A D | eth.c | 486 fm_eth->phydev->speed = SPEED_1000; 492 mac->set_if_mode(mac, fm_eth->enet_if, fm_eth->phydev->speed); 493 debug("MAC IF mode %d, speed %d, link %d\n", fm_eth->enet_if, 494 fm_eth->phydev->speed, fm_eth->phydev->link);
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/u-boot/drivers/usb/musb-new/ |
H A D | musb_gadget_ep0.c | 315 if (musb->g.speed != USB_SPEED_HIGH) 797 if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) { 804 musb->g.speed = (power & MUSB_POWER_HSMODE) 883 * g_file_storage and high speed. Do nothing.
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H A D | musb_host.c | 50 * + about 1/15 the speed of typical EHCI implementations (PCI) 68 * although ARP RX wins. (That test was done with a full speed link.) 703 epnum, urb, urb->dev->speed, 1872 * multiplexed. This scheme doen't work in high speed to full 1873 * speed scenario as NAK interrupts are not coming from a 1874 * full speed device connected to a high speed device. 1880 (USB_SPEED_HIGH == qh->dev->speed) ? 8 : 4; 1908 (dev->speed < USB_SPEED_HIGH)) 2001 switch (urb->dev->speed) { [all...] |
/u-boot/drivers/usb/dwc3/ |
H A D | ep0.c | 349 if (dwc->speed == DWC3_DSTS_SUPERSPEED) { 419 if (dwc->speed != DWC3_DSTS_SUPERSPEED) 433 if (dwc->speed != DWC3_DSTS_SUPERSPEED)
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/u-boot/drivers/net/qe/ |
H A D | dm_qe_uec.c | 146 switch (uec_info->speed) { 225 uec_info->speed = phydev->speed;
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