/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
H A D | ramnv40.c | 29 #include <subdev/bios/pll.h> 30 #include <subdev/clk/pll.h> 39 struct nvbios_pll pll; local 43 ret = nvbios_pll_parse(bios, 0x04, &pll); 45 nvkm_error(subdev, "mclk pll data not found\n"); 49 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P); 54 ram->ctrl |= min(pll.bias_p + log2P, (int)pll.max_p) << 20;
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/linux-master/drivers/clk/sunxi-ng/ |
H A D | ccu_common.c | 85 struct ccu_pll_nb *pll = to_ccu_pll_nb(nb); local 91 ccu_gate_helper_disable(pll->common, pll->enable); 93 ret = ccu_gate_helper_enable(pll->common, pll->enable); 97 ccu_helper_wait_for_lock(pll->common, pll->lock);
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/linux-master/drivers/video/fbdev/aty/ |
H A D | atyfb.h | 139 union aty_pll pll; member in struct:atyfb_par 301 const union aty_pll * pll, u32 bpp, u32 accel); 316 int (*var_to_pll) (const struct fb_info * info, u32 vclk_per, u32 bpp, union aty_pll * pll); 317 u32 (*pll_to_var) (const struct fb_info * info, const union aty_pll * pll); 318 void (*set_pll) (const struct fb_info * info, const union aty_pll * pll); 319 void (*get_pll) (const struct fb_info *info, union aty_pll * pll); 320 int (*init_pll) (const struct fb_info * info, union aty_pll * pll); 321 void (*resume_pll)(const struct fb_info *info, union aty_pll *pll); 333 extern void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll);
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H A D | radeon_base.c | 558 rinfo->pll.ref_clk = (*val) / 10; 562 rinfo->pll.sclk = (*val) / 10; 566 rinfo->pll.mclk = (*val) / 10; 698 rinfo->pll.ref_clk = xtal; 699 rinfo->pll.ref_div = ref_div; 700 rinfo->pll.sclk = sclk; 701 rinfo->pll.mclk = mclk; 719 rinfo->pll.ppll_max = 35000; 720 rinfo->pll.ppll_min = 12000; 721 rinfo->pll [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
H A D | gk20a.h | 119 struct gk20a_pll pll; member in struct:gk20a_clk 143 gk20a_pllg_n_lo(struct gk20a_clk *clk, struct gk20a_pll *pll) argument 145 return DIV_ROUND_UP(pll->m * clk->params->min_vco,
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H A D | nv40.c | 26 #include "pll.h" 29 #include <subdev/bios/pll.h> 128 struct nvbios_pll pll; local 131 ret = nvbios_pll_parse(subdev->device->bios, reg, &pll); 135 if (khz < pll.vco1.max_freq) 136 pll.vco2.max_freq = 0; 138 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); 168 /* use the second pll for shader/rop clock, if it differs from core */
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/linux-master/drivers/gpu/drm/renesas/rcar-du/ |
H A D | rcar_lvds.c | 142 unsigned long target, struct pll_info *pll, 245 if (diff < pll->diff) { 246 pll->diff = diff; 247 pll->pll_m = m; 248 pll->pll_n = n; 249 pll->pll_e = e; 250 pll->div = div; 251 pll->clksel = clksel; 261 output = fin * pll->pll_n / pll 141 rcar_lvds_d3_e3_pll_calc(struct rcar_lvds *lvds, struct clk *clk, unsigned long target, struct pll_info *pll, u32 clksel, bool dot_clock_only) argument 275 struct pll_info pll = { .diff = (unsigned long)-1 }; local [all...] |
/linux-master/drivers/clk/nxp/ |
H A D | clk-lpc18xx-cgu.c | 264 struct lpc18xx_pll pll; member in struct:lpc18xx_cgu_pll_clk 349 struct lpc18xx_pll *pll = to_lpc_pll(hw); local 352 ctrl = readl(pll->reg + LPC18XX_CGU_PLL0USB_CTRL); 353 mdiv = readl(pll->reg + LPC18XX_CGU_PLL0USB_MDIV); 354 npdiv = readl(pll->reg + LPC18XX_CGU_PLL0USB_NP_DIV); 379 pr_warn("%s: pll dividers not supported\n", __func__); 395 struct lpc18xx_pll *pll = to_lpc_pll(hw); local 400 pr_warn("%s: pll dividers not supported\n", __func__); 415 ctrl = readl(pll->reg + LPC18XX_CGU_PLL0USB_CTRL); 419 writel(ctrl, pll 453 struct lpc18xx_pll *pll = to_lpc_pll(hw); local [all...] |
/linux-master/drivers/clk/davinci/ |
H A D | pll.c | 22 #include <linux/platform_data/clk-davinci-pll.h> 29 #include "pll.h" 97 * @hw: clk_hw for the pll 117 struct davinci_pll_clk *pll = to_davinci_pll_clk(hw); local 121 mult = readl(pll->base + PLLM) & pll->pllm_mask; 130 struct davinci_pll_clk *pll = to_davinci_pll_clk(hw); local 150 if (mult < pll->pllm_min || mult > pll->pllm_max) 161 for (mult = pll 183 struct davinci_pll_clk *pll = to_davinci_pll_clk(hw); local 209 struct davinci_pll_clk *pll = to_davinci_pll_clk(hw); local 310 struct davinci_pllen_clk *pll = to_davinci_pllen_clk(hw); local 644 struct davinci_pllen_clk *pll = to_davinci_pllen_clk(hw); local 975 struct davinci_pll_clk *pll = to_davinci_pll_clk(hw); local [all...] |
/linux-master/drivers/staging/sm750fb/ |
H A D | ddk750_chip.h | 97 unsigned int sm750_calc_pll_value(unsigned int request, struct pll_value *pll);
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/linux-master/drivers/media/i2c/ccs/ |
H A D | ccs-quirk.c | 193 sensor->pll.flags |= CCS_PLL_FLAG_LANE_SPEED_MODEL | 195 sensor->pll.vt_lanes = 1; 196 sensor->pll.op_lanes = sensor->pll.csi2.lanes;
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/linux-master/drivers/media/tuners/ |
H A D | qm1d1b0004.c | 107 u32 frequency, pll, lpf_freq; local 115 pll = QM1D1B0004_XTL_FREQ / 4; 117 pll /= 2; 118 word = DIV_ROUND_CLOSEST(frequency, pll);
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/linux-master/drivers/media/radio/ |
H A D | tef6862.c | 96 u16 pll; local 104 pll = 1964 + ((freq - TEF6862_LO_FREQ) * 20) / FREQ_MUL; 106 i2cmsg[1] = (pll >> 8) & 0xff; 107 i2cmsg[2] = pll & 0xff;
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/linux-master/drivers/phy/mediatek/ |
H A D | phy-mtk-hdmi.h | 33 struct clk *pll; member in struct:mtk_hdmi_phy
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/linux-master/drivers/clk/starfive/ |
H A D | clk-starfive-jh7110-sys.c | 411 priv->pll[0] = devm_clk_hw_register_fixed_factor(priv->dev, "pll0_out", 413 if (IS_ERR(priv->pll[0])) 414 return PTR_ERR(priv->pll[0]); 417 priv->pll[0] = NULL; 423 priv->pll[1] = devm_clk_hw_register_fixed_factor(priv->dev, "pll1_out", 425 if (IS_ERR(priv->pll[1])) 426 return PTR_ERR(priv->pll[1]); 429 priv->pll[1] = NULL; 435 priv->pll[2] = devm_clk_hw_register_fixed_factor(priv->dev, "pll2_out", 437 if (IS_ERR(priv->pll[ [all...] |
H A D | clk-starfive-jh7100.c | 279 return priv->pll[idx - JH7100_CLK_PLL0_OUT]; 300 priv->pll[0] = devm_clk_hw_register_fixed_factor(priv->dev, "pll0_out", 302 if (IS_ERR(priv->pll[0])) 303 return PTR_ERR(priv->pll[0]); 305 priv->pll[1] = devm_clk_hw_register_fixed_factor(priv->dev, "pll1_out", 307 if (IS_ERR(priv->pll[1])) 308 return PTR_ERR(priv->pll[1]); 310 priv->pll[2] = devm_clk_hw_register_fixed_factor(priv->dev, "pll2_out", 312 if (IS_ERR(priv->pll[2])) 313 return PTR_ERR(priv->pll[ [all...] |
/linux-master/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi5.c | 168 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin), 176 r = dss_pll_enable(&hdmi->pll.pll); 182 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo); 221 dss_pll_disable(&hdmi->pll.pll); [all...] |
/linux-master/sound/soc/codecs/ |
H A D | wm8955.c | 144 int Fref, int Fout, struct pll_factors *pll) 157 pll->outdiv = 1; 160 pll->outdiv = 0; 170 pll->n = Ndiv; 185 pll->k = K / 10; 187 dev_dbg(dev, "N=%x K=%x OUTDIV=%x\n", pll->n, pll->k, pll->outdiv); 249 struct pll_factors pll; local 283 clock_cfgs[sr].mclk, &pll); 143 wm8955_pll_factors(struct device *dev, int Fref, int Fout, struct pll_factors *pll) argument [all...] |
/linux-master/drivers/clk/actions/ |
H A D | Makefile | 10 clk-owl-y += owl-pll.o
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
H A D | tu102.c | 25 #include <subdev/bios/pll.h> 26 #include <subdev/clk/pll.h>
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H A D | ga100.c | 25 #include <subdev/bios/pll.h> 26 #include <subdev/clk/pll.h>
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/linux-master/drivers/clk/mediatek/ |
H A D | clk-pll.h | 95 void mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, 102 struct clk_hw *mtk_clk_register_pll_ops(struct mtk_clk_pll *pll,
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/linux-master/drivers/clk/baikal-t1/ |
H A D | clk-ccu-pll.c | 12 #define pr_fmt(fmt) "bt1-ccu-pll: " fmt 27 #include "ccu-pll.h" 133 struct ccu_pll *pll; local 137 pll = ccu_pll_find_desc(data, clk_id); 138 if (IS_ERR(pll)) { 139 if (pll != ERR_PTR(-EPROBE_DEFER)) 142 return ERR_CAST(pll); 145 return ccu_pll_get_clk_hw(pll); 232 { .compatible = "baikal,bt1-ccu-pll" }, 239 .name = "clk-ccu-pll", [all...] |
/linux-master/drivers/mmc/host/ |
H A D | sdhci-pci-gli.c | 421 u32 pll; local 424 pll = sdhci_readl(host, SDHCI_GLI_9750_PLL); 425 pll &= ~(SDHCI_GLI_9750_PLL_DIR | SDHCI_GLI_9750_PLLSSC_EN); 426 sdhci_writel(host, pll, SDHCI_GLI_9750_PLL); 432 u32 pll; local 435 pll = sdhci_readl(host, SDHCI_GLI_9750_PLL); 436 pll &= ~(SDHCI_GLI_9750_PLL_LDIV | 439 pll |= FIELD_PREP(SDHCI_GLI_9750_PLL_LDIV, ldiv) | 442 sdhci_writel(host, pll, SDHCI_GLI_9750_PLL); 445 /* wait for pll stabl 464 u32 pll; local 618 u32 pll; local 629 u32 pll; local 661 u32 pll; local 833 u32 pll; local 854 u32 pll; local 884 u32 pll; local [all...] |
/linux-master/drivers/video/fbdev/nvidia/ |
H A D | nv_hw.c | 144 unsigned int pll, N, M, MB, NB, P; local 147 pll = NV_RD32(par->PMC, 0x4020); 148 P = (pll >> 16) & 0x07; 149 pll = NV_RD32(par->PMC, 0x4024); 150 M = pll & 0xFF; 151 N = (pll >> 8) & 0xFF; 157 MB = (pll >> 16) & 0xFF; 158 NB = (pll >> 24) & 0xFF; 162 pll = NV_RD32(par->PMC, 0x4000); 163 P = (pll >> 1 684 unsigned int M, N, P, pll, MClk, NVClk, memctrl; local [all...] |