1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Chunhui Dai <chunhui.dai@mediatek.com>
5 */
6
7#ifndef _MTK_HDMI_PHY_H
8#define _MTK_HDMI_PHY_H
9#include <linux/clk.h>
10#include <linux/clk-provider.h>
11#include <linux/delay.h>
12#include <linux/mfd/syscon.h>
13#include <linux/module.h>
14#include <linux/phy/phy.h>
15#include <linux/platform_device.h>
16#include <linux/types.h>
17
18struct mtk_hdmi_phy;
19
20struct mtk_hdmi_phy_conf {
21	unsigned long flags;
22	bool pll_default_off;
23	const struct clk_ops *hdmi_phy_clk_ops;
24	void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
25	void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
26	int (*hdmi_phy_configure)(struct phy *phy, union phy_configure_opts *opts);
27};
28
29struct mtk_hdmi_phy {
30	void __iomem *regs;
31	struct device *dev;
32	struct mtk_hdmi_phy_conf *conf;
33	struct clk *pll;
34	struct clk_hw pll_hw;
35	unsigned long pll_rate;
36	unsigned char drv_imp_clk;
37	unsigned char drv_imp_d2;
38	unsigned char drv_imp_d1;
39	unsigned char drv_imp_d0;
40	unsigned int ibias;
41	unsigned int ibias_up;
42	bool tmds_over_340M;
43};
44
45struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);
46
47extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8195_conf;
48extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;
49extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf;
50
51#endif /* _MTK_HDMI_PHY_H */
52