Searched refs:i915 (Results 276 - 300 of 460) sorted by relevance

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/linux-master/drivers/gpu/drm/i915/
H A Di915_drm_client.c78 struct drm_i915_private *i915 = fpriv->i915; local
102 for_each_memory_region(mr, i915, id)
136 struct drm_i915_private *i915,
140 const unsigned int capacity = i915->engine_uabi_class_count[class];
162 struct drm_i915_private *i915 = file_priv->i915; local
173 if (GRAPHICS_VER(i915) < 8)
177 show_client_class(p, i915, file_priv->client, i);
135 show_client_class(struct drm_printer *p, struct drm_i915_private *i915, struct i915_drm_client *client, unsigned int class) argument
H A Dintel_step.h79 void intel_step_init(struct drm_i915_private *i915);
81 const char *intel_display_step_name(struct drm_i915_private *i915);
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_drrs.h19 bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
H A Dintel_dsb.c97 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
100 return !drm_WARN(&i915->drm, dsb->free_pos > dsb->size - 2,
108 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
111 drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] DSB %d commands {\n",
114 drm_dbg_kms(&i915->drm,
120 drm_dbg_kms(&i915->drm, "}\n");
123 static bool is_dsb_busy(struct drm_i915_private *i915, enum pipe pipe, argument
126 return intel_de_read_fw(i915, DSB_CTRL(pipe, id)) & DSB_STATUS_BUSY;
326 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
328 unsigned int latency = skl_watermark_max_latency(i915,
463 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
[all...]
H A Dintel_audio.h31 void intel_audio_register(struct drm_i915_private *i915);
H A Dintel_dp_aux_backlight.c117 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
133 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Detected %s HDR backlight interface version %d\n",
149 if (i915->display.params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
152 drm_info(&i915->drm,
153 "[CONNECTOR:%d:%s] Panel is missing HDR static metadata. Possible support for Intel HDR backlight interface is not used. If your backlight controls don't work try booting with i915.enable_dpcd_backlight=%d. needs this, please file a _new_ bug report on drm/i915, see " FDO_BUG_URL " for details.\n",
168 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
175 drm_err(&i915->drm, "[CONNECTOR:%d:%s] Failed to read current backlight mode from DPCD\n",
193 drm_err(&i915->drm, "[CONNECTOR:%d:%s] Failed to read brightness from DPCD\n",
239 struct drm_i915_private *i915 local
293 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
395 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
455 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
486 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
[all...]
H A Dintel_drrs.c66 bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915, argument
69 if (HAS_DOUBLE_BUFFERED_M_N(i915))
72 return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
124 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
126 mod_delayed_work(i915->unordered_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
132 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
137 for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc,
261 * @dev_priv: i915 device
277 * @dev_priv: i915 device
311 struct drm_i915_private *i915 local
352 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
[all...]
H A Dintel_display_debugfs.c134 struct drm_i915_private *i915 = node_to_i915(m->private); local
136 intel_display_power_debug(i915, m);
629 struct drm_i915_private *i915 = node_to_i915(m->private); local
632 intel_display_device_info_print(DISPLAY_INFO(i915),
633 DISPLAY_RUNTIME_INFO(i915), &p);
704 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, argument
710 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
711 is_enabled = intel_display_power_well_is_enabled(i915,
713 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
720 struct drm_i915_private *i915 local
1044 intel_display_debugfs_register(struct drm_i915_private *i915) argument
1075 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1102 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1142 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1213 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1256 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1322 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1389 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1425 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1507 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
[all...]
H A Dintel_fbdev.c310 struct drm_i915_private *i915 = to_i915(dev); local
327 drm_dbg_kms(&i915->drm,
334 drm_dbg_kms(&i915->drm,
341 drm_dbg_kms(&i915->drm,
350 drm_dbg_kms(&i915->drm,
364 drm_dbg_kms(&i915->drm,
370 drm_dbg_kms(&i915->drm, "checking [PLANE:%d:%s] for BIOS fb\n",
381 drm_dbg_kms(&i915->drm,
392 drm_dbg_kms(&i915->drm,
401 drm_dbg_kms(&i915
465 intel_fbdev_hpd_set_suspend(struct drm_i915_private *i915, int state) argument
652 intel_fbdev_setup(struct drm_i915_private *i915) argument
[all...]
H A Dintel_display_rps.c72 void intel_display_rps_mark_interactive(struct drm_i915_private *i915, argument
79 intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
H A Dintel_hdcp_gsc_message.h26 ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
29 bool intel_hdcp_gsc_check_status(struct drm_i915_private *i915);
H A Di9xx_plane.c581 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
584 spin_lock_irq(&i915->irq_lock);
585 bdw_enable_pipe_irq(i915, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE);
586 spin_unlock_irq(&i915->irq_lock);
592 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
595 spin_lock_irq(&i915->irq_lock);
596 bdw_disable_pipe_irq(i915, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE);
597 spin_unlock_irq(&i915->irq_lock);
603 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
605 spin_lock_irq(&i915
613 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
623 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
633 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
643 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
654 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
[all...]
H A Dintel_dpll.h49 void assert_pll_enabled(struct drm_i915_private *i915, enum pipe pipe);
50 void assert_pll_disabled(struct drm_i915_private *i915, enum pipe pipe);
H A Dintel_dp_mst.c57 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
61 if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(i915) >= 20 || !dsc)
170 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
197 drm_dbg_kms(&i915->drm, "Limiting bpp to max DPT bpp (%d -> %d)\n",
202 drm_dbg_kms(&i915->drm, "Looking for slots in range min bpp %d max bpp %d\n",
211 drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
246 drm_WARN_ON(&i915->drm, remote_tu < crtc_state->dp_m_n.tu);
256 drm_WARN_ON(&i915->drm, slots != crtc_state->dp_m_n.tu);
267 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
274 drm_dbg_kms(&i915
310 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
384 struct drm_i915_private *i915 = to_i915(encoder->base.dev); local
406 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
451 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
728 struct drm_i915_private *i915 = to_i915(state->base.dev); local
930 struct drm_i915_private *i915 = to_i915(encoder->base.dev); local
939 struct drm_i915_private *i915 = to_i915(encoder->base.dev); local
960 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1167 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
1298 struct drm_i915_private *i915 = to_i915(intel_connector->base.dev); local
1495 struct drm_i915_private *i915 = to_i915(connector->dev); local
1547 struct drm_i915_private *i915 = to_i915(connector->dev); local
1586 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
1783 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); local
[all...]
H A Dskl_universal_plane.c237 static u8 icl_nv12_y_plane_mask(struct drm_i915_private *i915) argument
239 if (DISPLAY_VER(i915) >= 13 || HAS_D12_PLANE_MINIMIZATION(i915))
468 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
474 if (DISPLAY_VER(i915) >= 13) {
636 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
642 intel_de_write_fw(i915, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0);
841 * while i915 HW rotation is clockwise, thats why this swapping.
1018 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); local
1027 drm_WARN_ON(&i915
1054 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); local
1101 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
1223 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
1339 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
1537 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); local
1774 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
1938 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
2023 skl_plane_has_fbc(struct drm_i915_private *i915, enum intel_fbc_id fbc_id, enum plane_id plane_id) argument
2231 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
2242 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
2250 skl_plane_has_rc_ccs(struct drm_i915_private *i915, enum pipe pipe, enum plane_id plane_id) argument
2268 gen12_plane_has_mc_ccs(struct drm_i915_private *i915, enum plane_id plane_id) argument
2286 skl_get_plane_caps(struct drm_i915_private *i915, enum pipe pipe, enum plane_id plane_id) argument
2639 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
[all...]
/linux-master/drivers/gpu/drm/i915/gt/
H A Dselftest_slpc.c197 if (!librapl_supported(gt->i915))
398 if (igt_flush_test(gt->i915))
410 struct drm_i915_private *i915 = arg; local
415 for_each_gt(gt, i915, i) {
426 struct drm_i915_private *i915 = arg; local
431 for_each_gt(gt, i915, i) {
443 struct drm_i915_private *i915 = arg; local
448 for_each_gt(gt, i915, i) {
459 struct drm_i915_private *i915 = arg; local
464 for_each_gt(gt, i915,
482 struct drm_i915_private *i915 = arg; local
523 intel_slpc_live_selftests(struct drm_i915_private *i915) argument
[all...]
H A Dintel_sseu.c228 HAS_ONE_EU_PER_FUSE_BIT(gt->i915) ? 8 : 16);
241 if (HAS_ONE_EU_PER_FUSE_BIT(gt->i915))
274 drm_WARN_ON(&gt->i915->drm, s_en != 0x1);
300 if (IS_JASPERLAKE(gt->i915) || IS_ELKHARTLAKE(gt->i915))
311 drm_WARN_ON(&gt->i915->drm, s_en != 0x1);
380 struct drm_i915_private *i915 = gt->i915; local
391 intel_sseu_set_info(sseu, IS_GEN9_LP(i915) ? 1 : 3,
392 IS_GEN9_LP(i915)
571 struct drm_i915_private *i915 = gt->i915; local
638 struct drm_i915_private *i915 = gt->i915; local
659 struct drm_i915_private *i915 = gt->i915; local
843 intel_sseu_print_topology(struct drm_i915_private *i915, const struct sseu_dev_info *sseu, struct drm_printer *p) argument
[all...]
H A Dintel_migrate.c21 #define GET_CCS_BYTES(i915, size) (HAS_FLAT_CCS(i915) ? \
49 i915_gem_get_pat_index(vm->i915, I915_CACHE_NONE),
69 i915_gem_get_pat_index(vm->i915, I915_CACHE_NONE),
81 i915_gem_get_pat_index(vm->i915, I915_CACHE_NONE),
154 if (HAS_64K_PAGES(gt->i915))
176 if (HAS_64K_PAGES(gt->i915))
186 if (HAS_64K_PAGES(gt->i915))
210 if (HAS_64K_PAGES(gt->i915)) {
369 bool has_64K_pages = HAS_64K_PAGES(rq->i915);
534 struct drm_i915_private *i915 = rq->i915; local
641 calculate_chunk_sz(struct drm_i915_private *i915, bool src_is_lmem, u64 bytes_to_cpy, u64 ccs_bytes_to_cpy) argument
689 struct drm_i915_private *i915 = ce->engine->i915; local
920 struct drm_i915_private *i915 = rq->i915; local
992 struct drm_i915_private *i915 = ce->engine->i915; local
[all...]
H A Dselftest_migrate.c25 create_lmem_or_internal(struct drm_i915_private *i915, size_t size) argument
29 obj = i915_gem_object_create_lmem(i915, size, 0);
33 return i915_gem_object_create_internal(i915, size);
44 struct drm_i915_private *i915 = migrate->context->engine->i915; local
52 src = create_lmem_or_internal(i915, sz);
57 dst = i915_gem_object_create_internal(i915, sz);
157 if (HAS_64K_PAGES(ce->engine->i915))
263 struct drm_i915_private *i915 = migrate->context->engine->i915; local
492 struct drm_i915_private *i915 = migrate->context->engine->i915; local
514 struct drm_i915_private *i915 = migrate->context->engine->i915; local
550 struct drm_i915_private *i915 = migrate->context->engine->i915; local
791 intel_migrate_live_selftests(struct drm_i915_private *i915) argument
1017 intel_migrate_perf_selftests(struct drm_i915_private *i915) argument
[all...]
H A Dselftest_ring_submission.c16 obj = i915_gem_object_create_internal(engine->i915, 4096);
44 if (GRAPHICS_VER(engine->i915) >= 6) {
47 } else if (GRAPHICS_VER(engine->i915) >= 4) {
269 if (IS_GRAPHICS_VER(gt->i915, 4, 5))
277 if (igt_flush_test(gt->i915))
288 int intel_ring_submission_live_selftests(struct drm_i915_private *i915) argument
294 if (to_gt(i915)->submission_method > INTEL_SUBMISSION_RING)
297 return intel_gt_live_subtests(tests, to_gt(i915));
/linux-master/drivers/gpu/drm/i915/gvt/
H A Dfirmware.c59 struct drm_i915_private *i915 = gvt->gt->i915; local
60 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
83 memcpy(gvt->firmware.cfg_space, i915->vgpu.initial_cfg_space,
89 memcpy(gvt->firmware.mmio, i915->vgpu.initial_mmio,
110 struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev);
134 struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev);
178 #define GVT_FIRMWARE_PATH "i915/gvt"
188 struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev);
223 ret = request_firmware(&fw, path, gvt->gt->i915
[all...]
/linux-master/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_slpc.c30 return slpc_to_gt(slpc)->i915;
194 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
211 with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
389 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
398 with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
426 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
430 with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
443 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
448 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
466 intel_runtime_pm_put(&i915
483 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
525 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
542 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
556 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
777 struct drm_i915_private *i915 = slpc_to_i915(slpc); local
[all...]
/linux-master/drivers/gpu/drm/i915/gem/
H A Di915_gem_throttle.c42 struct drm_i915_private *i915 = to_i915(dev); local
48 ret = intel_gt_terminally_wedged(to_gt(i915));
H A Di915_gem_domain.c25 struct drm_i915_private *i915 = to_i915(obj->base.dev); local
27 if (IS_DGFX(i915))
43 struct drm_i915_private *i915 = to_i915(obj->base.dev); local
48 if (IS_DGFX(i915))
342 struct drm_i915_private *i915 = to_i915(dev); local
348 if (IS_DGFX(i915))
351 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
365 if (!HAS_LLC(i915) && !HAS_SNOOP(i915))
371 level = HAS_WT(i915)
431 struct drm_i915_private *i915 = to_i915(obj->base.dev); local
[all...]
/linux-master/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_huc.c47 drm_err(&gt->i915->drm,
64 drm_err(&gt->i915->drm,

Completed in 343 milliseconds

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