Searched refs:i915 (Results 151 - 175 of 460) sorted by relevance

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/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_tlb.c51 struct drm_i915_private *i915 = gt->i915; local
58 if (GRAPHICS_VER(i915) < 8)
87 (IS_TIGERLAKE(i915) ||
88 IS_DG1(i915) ||
89 IS_ROCKETLAKE(i915) ||
90 IS_ALDERLAKE_S(i915) ||
91 IS_ALDERLAKE_P(i915)))
141 if (HAS_GUC_TLB_INVALIDATION(gt->i915)) {
H A Dintel_gt.c63 int intel_root_gt_init_early(struct drm_i915_private *i915) argument
67 gt = drmm_kzalloc(&i915->drm, sizeof(*gt), GFP_KERNEL);
71 i915->gt[0] = gt;
73 gt->i915 = i915;
74 gt->uncore = &i915->uncore;
75 gt->irq_lock = drmm_kzalloc(&i915->drm, sizeof(*gt->irq_lock), GFP_KERNEL);
86 struct drm_i915_private *i915 = gt->i915; local
108 GEM_BUG_ON(!HAS_REGION(i915, i
154 struct drm_i915_private *i915 = gt->i915; local
173 struct drm_i915_private *i915 = gt->i915; local
246 struct drm_i915_private *i915 = gt->i915; local
403 struct drm_i915_private *i915 = gt->i915; local
478 struct drm_i915_private *i915 = gt->i915; local
853 intel_gt_driver_late_release_all(struct drm_i915_private *i915) argument
904 intel_gt_probe_all(struct drm_i915_private *i915) argument
988 intel_gt_tiles_init(struct drm_i915_private *i915) argument
[all...]
H A Dselftest_gt_pm.c41 struct drm_i915_private *i915 = engine->i915; local
46 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915))
92 if (GRAPHICS_VER(gt->i915) < 4) /* Any CS_TIMESTAMP? */
104 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0)
177 int intel_gt_pm_live_selftests(struct drm_i915_private *i915) argument
192 if (intel_gt_is_wedged(to_gt(i915)))
195 return intel_gt_live_subtests(tests, to_gt(i915));
198 int intel_gt_pm_late_selftests(struct drm_i915_private *i915) argument
[all...]
H A Dintel_workarounds.c50 * ``drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c`` for reference.
150 struct drm_i915_private *i915 = wal->gt->i915; local
163 drm_err(&i915->drm, "No space for workaround init!\n");
186 drm_err(&i915->drm,
400 struct drm_i915_private *i915 = engine->i915; local
422 (IS_BROADWELL_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
440 struct drm_i915_private *i915 = engine->i915; local
597 struct drm_i915_private *i915 = engine->i915; local
692 struct drm_i915_private *i915 = engine->i915; local
902 struct drm_i915_private *i915 = engine->i915; local
1095 gen9_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal) argument
1135 struct drm_i915_private *i915 = gt->i915; local
1376 struct drm_i915_private *i915 = gt->i915; local
1626 struct drm_i915_private *i915 = gt->i915; local
2077 struct drm_i915_private *i915 = engine->i915; local
2182 struct drm_i915_private *i915 = engine->i915; local
2650 struct drm_i915_private *i915 = engine->i915; local
2687 struct drm_i915_private *i915 = gt->i915; local
2741 struct drm_i915_private *i915 = engine->i915; local
2923 mcr_range(struct drm_i915_private *i915, u32 offset) argument
2955 struct drm_i915_private *i915 = rq->i915; local
[all...]
H A Dintel_gtt.c24 bool i915_ggtt_require_binder(struct drm_i915_private *i915) argument
27 return !i915_direct_stolen_access(i915) &&
28 MEDIA_VER_FULL(i915) == IP_VER(13, 0);
31 static bool intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *i915) argument
33 return IS_BROXTON(i915) && i915_vtd_active(i915);
36 bool intel_vm_no_concurrent_access_wa(struct drm_i915_private *i915) argument
38 return IS_CHERRYVIEW(i915) || intel_ggtt_update_needs_vtd_wa(i915);
57 obj = __i915_gem_object_create_lmem_with_ps(vm->i915, s
437 struct drm_i915_private *i915 = gt->i915; local
612 struct drm_i915_private *i915 = uncore->i915; local
672 struct drm_i915_private *i915 = gt->i915; local
[all...]
H A Dintel_ggtt.c58 struct drm_i915_private *i915 = ggtt->vm.i915; local
65 ggtt->vm.has_read_only = IS_VALLEYVIEW(i915);
67 if (!HAS_LLC(i915) && !HAS_PPGTT(i915))
89 * @i915: i915 device
91 int i915_ggtt_init_hw(struct drm_i915_private *i915) argument
101 ret = ggtt_init_hw(to_gt(i915)->ggtt);
120 drm_WARN_ON(&vm->i915
199 needs_wc_ggtt_mapping(struct drm_i915_private *i915) argument
240 struct drm_i915_private *i915 = ggtt->vm.i915; local
1016 i915_init_ggtt(struct drm_i915_private *i915) argument
1078 i915_ggtt_driver_release(struct drm_i915_private *i915) argument
1093 i915_ggtt_driver_late_release(struct drm_i915_private *i915) argument
1135 gen6_gttmmadr_size(struct drm_i915_private *i915) argument
1145 gen6_gttadr_offset(struct drm_i915_private *i915) argument
1152 struct drm_i915_private *i915 = ggtt->vm.i915; local
1216 struct drm_i915_private *i915 = ggtt->vm.i915; local
1393 struct drm_i915_private *i915 = ggtt->vm.i915; local
1452 struct drm_i915_private *i915 = gt->i915; local
1504 i915_ggtt_probe_hw(struct drm_i915_private *i915) argument
1525 i915_ggtt_create(struct drm_i915_private *i915) argument
1538 i915_ggtt_enable_hw(struct drm_i915_private *i915) argument
[all...]
H A Dintel_ring_submission.c42 if (GRAPHICS_VER(engine->i915) >= 6)
56 if (GRAPHICS_VER(engine->i915) >= 4)
84 if (GRAPHICS_VER(engine->i915) == 7) {
106 } else if (GRAPHICS_VER(engine->i915) == 6) {
118 if (!IS_GRAPHICS_VER(engine->i915, 6, 7))
123 drm_warn(&engine->i915->drm, "%s not idle before sync flush!\n",
168 if (GRAPHICS_VER(engine->i915) >= 7) {
203 intel_synchronize_hardirq(engine->i915);
207 if (HWS_NEEDS_PHYSICAL(engine->i915))
247 if (GRAPHICS_VER(engine->i915) >
529 struct drm_i915_private *i915 = engine->i915; local
693 struct drm_i915_private *i915 = engine->i915; local
1055 struct drm_i915_private *i915 = engine->i915; local
1081 struct drm_i915_private *i915 = engine->i915; local
1121 struct drm_i915_private *i915 = engine->i915; local
1165 struct drm_i915_private *i915 = engine->i915; local
1194 struct drm_i915_private *i915 = engine->i915; local
1218 struct drm_i915_private *i915 = engine->i915; local
1231 struct drm_i915_private *i915 = engine->i915; local
[all...]
H A Dintel_ggtt_fencing.c20 * Important to avoid confusions: "fences" in the i915 driver are not execution
51 return fence->ggtt->vm.i915;
174 struct drm_i915_private *i915 = fence_to_i915(fence); local
182 if (GRAPHICS_VER(i915) == 2)
184 else if (GRAPHICS_VER(i915) == 3)
355 if (intel_has_pending_fb_unpin(ggtt->vm.i915))
574 struct drm_i915_private *i915 = ggtt->vm.i915; local
578 if (GRAPHICS_VER(i915) >= 8 || IS_VALLEYVIEW(i915)) {
840 struct drm_i915_private *i915 = ggtt->vm.i915; local
900 struct drm_i915_private *i915 = gt->i915; local
[all...]
/linux-master/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_mman.c97 struct drm_i915_private *i915 = to_i915(obj->base.dev); local
155 intel_gt_flush_ggtt_writes(to_gt(i915));
191 struct drm_i915_private *i915 = to_i915(obj->base.dev); local
251 intel_gt_flush_ggtt_writes(to_gt(i915));
290 setup_tile_size(struct tile *tile, struct drm_i915_private *i915) argument
292 if (GRAPHICS_VER(i915) <= 2) {
297 HAS_128_BYTE_Y_TILING(i915)) {
307 if (GRAPHICS_VER(i915) < 4)
309 else if (GRAPHICS_VER(i915) < 7)
318 struct drm_i915_private *i915 local
449 struct drm_i915_private *i915 = arg; local
542 struct drm_i915_private *i915 = to_i915(obj->base.dev); local
590 default_mapping(struct drm_i915_private *i915) argument
599 create_sys_or_internal(struct drm_i915_private *i915, unsigned long size) argument
612 assert_mmap_offset(struct drm_i915_private *i915, unsigned long size, int expected) argument
630 disable_retire_worker(struct drm_i915_private *i915) argument
637 restore_retire_worker(struct drm_i915_private *i915) argument
658 struct drm_i915_private *i915 = arg; local
873 struct drm_i915_private *i915 = to_i915(obj->base.dev); local
895 __igt_mmap(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, enum i915_mmap_type type) argument
974 struct drm_i915_private *i915 = arg; local
1015 igt_close_objects(struct drm_i915_private *i915, struct list_head *objects) argument
1094 ___igt_mmap_migrate(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, unsigned long addr, bool unfaultable) argument
1176 struct drm_i915_private *i915 = placements[0]->i915; local
1309 struct drm_i915_private *i915 = arg; local
1433 __igt_mmap_access(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, enum i915_mmap_type type) argument
1506 struct drm_i915_private *i915 = arg; local
1542 __igt_mmap_gpu(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, enum i915_mmap_type type) argument
1652 struct drm_i915_private *i915 = arg; local
1740 __igt_mmap_revoke(struct drm_i915_private *i915, struct drm_i915_gem_object *obj, enum i915_mmap_type type) argument
1806 struct drm_i915_private *i915 = arg; local
1838 i915_gem_mman_live_selftests(struct drm_i915_private *i915) argument
[all...]
/linux-master/drivers/gpu/drm/i915/selftests/
H A Di915_selftest.c45 int i915_live_sanitycheck(struct drm_i915_private *i915) argument
47 pr_info("%s: %s() - ok!\n", i915->drm.driver->name, __func__);
139 __wait_gsc_proxy_completed(struct drm_i915_private *i915) argument
142 i915->media_gt &&
143 HAS_ENGINE(i915->media_gt, GSC0) &&
144 intel_uc_fw_is_loadable(&i915->media_gt->uc.gsc.fw));
152 if (need_to_wait && wait_for(!__gsc_proxy_init_progressing(&i915->media_gt->uc.gsc),
158 __wait_gsc_huc_load_completed(struct drm_i915_private *i915) argument
161 struct intel_huc *huc = &to_gt(i915)->uc.huc;
169 * complete in less than a second from the i915 loa
255 struct drm_i915_private *i915 = pdev_to_i915(pdev); local
280 struct drm_i915_private *i915 = pdev_to_i915(pdev); local
358 struct drm_i915_private *i915 = data; local
369 struct drm_i915_private *i915 = data; local
[all...]
H A Di915_active.c63 static struct live_active *__live_alloc(struct drm_i915_private *i915) argument
78 __live_active_setup(struct drm_i915_private *i915) argument
86 active = __live_alloc(i915);
100 for_each_uabi_engine(engine, i915) {
147 struct drm_i915_private *i915 = arg; local
153 active = __live_active_setup(i915);
159 struct drm_printer p = drm_err_printer(&i915->drm, __func__);
169 if (igt_flush_test(i915))
177 struct drm_i915_private *i915 = arg; local
183 active = __live_active_setup(i915);
207 struct drm_i915_private *i915 = arg; local
250 i915_active_live_selftests(struct drm_i915_private *i915) argument
[all...]
H A Dmock_uncore.c43 struct drm_i915_private *i915)
45 intel_uncore_init_early(uncore, to_gt(i915));
42 mock_uncore_init(struct intel_uncore *uncore, struct drm_i915_private *i915) argument
/linux-master/drivers/gpu/drm/i915/gem/
H A Di915_gem_create.c51 struct drm_i915_private *i915 = mr->i915; local
53 obj->mm.placements = &i915->mm.regions[mr->id];
91 __i915_gem_object_create_user_ext(struct drm_i915_private *i915, u64 size, argument
101 i915_gem_flush_free_objects(i915);
149 * @i915: i915 private
159 __i915_gem_object_create_user(struct drm_i915_private *i915, u64 size, argument
163 return __i915_gem_object_create_user_ext(i915, size, placements,
228 struct drm_i915_private *i915 local
243 struct drm_i915_private *i915; member in struct:create_ext
276 struct drm_i915_private *i915 = ext_data->i915; local
401 struct drm_i915_private *i915 = ext_data->i915; local
445 struct drm_i915_private *i915 = to_i915(dev); local
[all...]
H A Di915_gem_lmem.c81 * @i915: The i915 instance.
100 __i915_gem_object_create_lmem_with_ps(struct drm_i915_private *i915, argument
105 return i915_gem_object_create_region(i915->mm.regions[INTEL_REGION_LMEM_0],
110 i915_gem_object_create_lmem_from_data(struct drm_i915_private *i915, argument
116 obj = i915_gem_object_create_lmem(i915,
137 i915_gem_object_create_lmem(struct drm_i915_private *i915, argument
141 return i915_gem_object_create_region(i915->mm.regions[INTEL_REGION_LMEM_0],
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_fbc.h46 void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
47 void intel_fbc_reset_underrun(struct drm_i915_private *i915);
49 void intel_fbc_debugfs_register(struct drm_i915_private *i915);
H A Dintel_crtc.h44 struct intel_crtc *intel_first_crtc(struct drm_i915_private *i915);
45 struct intel_crtc *intel_crtc_for_pipe(struct drm_i915_private *i915,
47 void intel_wait_for_vblank_if_active(struct drm_i915_private *i915,
H A Dintel_hdcp.h40 bool is_hdcp_supported(struct drm_i915_private *i915, enum port port);
46 void intel_hdcp_component_init(struct drm_i915_private *i915);
47 void intel_hdcp_component_fini(struct drm_i915_private *i915);
H A Dintel_dvo.c131 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
137 tmp = intel_de_read(i915, DVO(port));
148 struct drm_i915_private *i915 = to_i915(encoder->base.dev); local
152 tmp = intel_de_read(i915, DVO(port));
162 struct drm_i915_private *i915 = to_i915(encoder->base.dev); local
168 tmp = intel_de_read(i915, DVO(port));
188 struct drm_i915_private *i915 = to_i915(encoder->base.dev); local
194 intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0);
195 intel_de_posting_read(i915, DVO(port));
203 struct drm_i915_private *i915 local
222 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
290 struct drm_i915_private *i915 = to_i915(encoder->base.dev); local
321 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
339 struct drm_i915_private *i915 = to_i915(connector->base.dev); local
473 intel_dvo_probe(struct drm_i915_private *i915, struct intel_dvo *intel_dvo) argument
488 intel_dvo_init(struct drm_i915_private *i915) argument
[all...]
H A Dintel_bw.c123 static u16 icl_qgv_points_mask(struct drm_i915_private *i915) argument
125 unsigned int num_psf_gv_points = i915->display.bw.max[0].num_psf_gv_points;
126 unsigned int num_qgv_points = i915->display.bw.max[0].num_qgv_points;
143 static bool is_sagv_enabled(struct drm_i915_private *i915, u16 points_mask) argument
145 return !is_power_of_2(~points_mask & icl_qgv_points_mask(i915) &
576 static void dg2_get_bw_info(struct drm_i915_private *i915) argument
578 unsigned int deratedbw = IS_DG2_G11(i915) ? 38000 : 50000;
579 int num_groups = ARRAY_SIZE(i915->display.bw.max);
590 struct intel_bw_info *bi = &i915->display.bw.max[i];
598 i915
666 icl_qgv_bw(struct drm_i915_private *i915, int num_active_planes, int qgv_point) argument
715 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
740 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
752 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
828 icl_max_bw_qgv_point_mask(struct drm_i915_private *i915, int num_active_planes) argument
857 icl_prepare_qgv_points_mask(struct drm_i915_private *i915, unsigned int qgv_points, unsigned int psf_points) argument
865 icl_max_bw_psf_gv_point_mask(struct drm_i915_private *i915) argument
886 icl_force_disable_sagv(struct drm_i915_private *i915, struct intel_bw_state *bw_state) argument
902 mtl_find_qgv_points(struct drm_i915_private *i915, unsigned int data_rate, unsigned int num_active_planes, struct intel_bw_state *new_bw_state) argument
973 icl_find_qgv_points(struct drm_i915_private *i915, unsigned int data_rate, unsigned int num_active_planes, const struct intel_bw_state *old_bw_state, struct intel_bw_state *new_bw_state) argument
1061 intel_bw_check_qgv_points(struct drm_i915_private *i915, const struct intel_bw_state *old_bw_state, struct intel_bw_state *new_bw_state) argument
1079 intel_bw_state_changed(struct drm_i915_private *i915, const struct intel_bw_state *old_bw_state, const struct intel_bw_state *new_bw_state) argument
1111 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1130 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1160 intel_bw_dbuf_min_cdclk(struct drm_i915_private *i915, const struct intel_bw_state *bw_state) argument
1189 intel_bw_min_cdclk(struct drm_i915_private *i915, const struct intel_bw_state *bw_state) argument
1279 struct drm_i915_private *i915 = to_i915(state->base.dev); local
1326 struct drm_i915_private *i915 = to_i915(state->base.dev); local
1387 intel_bw_init(struct drm_i915_private *i915) argument
[all...]
H A Dintel_color.c210 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
213 intel_de_write_fw(i915, PIPE_CSC_PREOFF_HI(pipe), csc->preoff[0]);
214 intel_de_write_fw(i915, PIPE_CSC_PREOFF_ME(pipe), csc->preoff[1]);
215 intel_de_write_fw(i915, PIPE_CSC_PREOFF_LO(pipe), csc->preoff[2]);
217 intel_de_write_fw(i915, PIPE_CSC_COEFF_RY_GY(pipe),
219 intel_de_write_fw(i915, PIPE_CSC_COEFF_BY(pipe),
222 intel_de_write_fw(i915, PIPE_CSC_COEFF_RU_GU(pipe),
224 intel_de_write_fw(i915, PIPE_CSC_COEFF_BU(pipe),
227 intel_de_write_fw(i915, PIPE_CSC_COEFF_RV_GV(pipe),
229 intel_de_write_fw(i915, PIPE_CSC_COEFF_B
243 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
309 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
339 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
388 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
403 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
426 ilk_csc_copy(struct drm_i915_private *i915, struct intel_csc_matrix *dst, const struct intel_csc_matrix *src) argument
440 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
498 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
538 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
674 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
718 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
736 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
770 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
998 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1010 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1021 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1028 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1063 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1081 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1109 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1128 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1148 create_linear_lut(struct drm_i915_private *i915, int lut_size) argument
1182 create_resized_lut(struct drm_i915_private *i915, const struct drm_property_blob *blob_in, int lut_out_size, bool limited_color_range) argument
1313 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
1525 glk_degamma_lut_size(struct drm_i915_private *i915) argument
1560 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1799 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1833 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1849 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1870 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
1880 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
1888 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
1898 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
1907 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
1990 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
1997 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2013 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2029 struct drm_i915_private *i915 = to_i915(plane->base.dev); local
2045 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
2084 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2095 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2102 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2113 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2118 check_lut_size(struct drm_i915_private *i915, const struct drm_property_blob *lut, int expected) argument
2139 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2207 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2245 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2421 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2459 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2528 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2560 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2628 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2691 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); local
2746 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
3297 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
3324 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
3346 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
3371 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
3499 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
3630 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
3824 struct drm_i915_private *i915 = to_i915(crtc->base.dev); local
3849 intel_color_init(struct drm_i915_private *i915) argument
3866 intel_color_init_hooks(struct drm_i915_private *i915) argument
[all...]
H A Dintel_lspcon.c83 struct drm_i915_private *i915 = dp_to_i915(dp); local
88 drm_err(&i915->drm, "Can't read description\n");
99 drm_dbg_kms(&i915->drm, "Vendor: Mega Chips\n");
104 drm_dbg_kms(&i915->drm, "Vendor: Parade Tech\n");
108 drm_err(&i915->drm, "Invalid/Unknown vendor OUI\n");
126 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
134 drm_dbg_kms(&i915->drm, "HDR capability detection failed\n");
137 drm_dbg_kms(&i915->drm, "LSPCON capable of HDR\n");
145 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
150 drm_dbg_kms(&i915
172 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
198 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
228 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
248 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
292 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
482 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
530 struct drm_i915_private *i915 = to_i915(encoder->base.dev); local
663 struct drm_i915_private *i915 = dp_to_i915(intel_dp); local
702 struct drm_i915_private *i915 = to_i915(dev); local
[all...]
H A Dintel_hotplug.c40 * Hotplug in i915 is handled in many different levels of abstraction.
180 static bool detection_work_enabled(struct drm_i915_private *i915) argument
182 lockdep_assert_held(&i915->irq_lock);
184 return i915->display.hotplug.detection_work_enabled;
188 mod_delayed_detection_work(struct drm_i915_private *i915, struct delayed_work *work, int delay) argument
190 lockdep_assert_held(&i915->irq_lock);
192 if (!detection_work_enabled(i915))
195 return mod_delayed_work(i915->unordered_wq, work, delay);
199 queue_delayed_detection_work(struct drm_i915_private *i915, struct delayed_work *work, int delay) argument
201 lockdep_assert_held(&i915
210 queue_detection_work(struct drm_i915_private *i915, struct work_struct *work) argument
406 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); local
684 i915_hpd_poll_detect_connectors(struct drm_i915_private *i915) argument
863 intel_hpd_init_early(struct drm_i915_private *i915) argument
882 cancel_all_detection_work(struct drm_i915_private *i915) argument
947 queue_work_for_missed_irqs(struct drm_i915_private *i915) argument
974 intel_hpd_enable_detection_work(struct drm_i915_private *i915) argument
982 intel_hpd_disable_detection_work(struct drm_i915_private *i915) argument
991 intel_hpd_schedule_detection(struct drm_i915_private *i915) argument
1159 intel_hpd_debugfs_register(struct drm_i915_private *i915) argument
[all...]
/linux-master/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_pm.c31 with_intel_runtime_pm(&pxp->ctrl_gt->i915->runtime_pm, wakeref) {
54 wakeref = intel_runtime_pm_get(&pxp->ctrl_gt->i915->runtime_pm);
57 intel_runtime_pm_put(&pxp->ctrl_gt->i915->runtime_pm, wakeref);
H A Dintel_pxp_gsccs.c60 struct drm_i915_private *i915 = gt->i915; local
117 drm_err(&i915->drm, "failed to send gsc PXP msg (%d)\n", ret);
123 drm_err(&i915->drm, "gsc PXP reply with invalid validity marker\n");
128 drm_dbg(&i915->drm, "gsc PXP reply status has error = 0x%08x\n",
134 drm_dbg(&i915->drm, "gsc PXP reply is busy\n");
148 drm_warn(&i915->drm, "caller with insufficient PXP reply size %u (%zu)\n",
211 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; local
228 drm_err(&i915
249 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; local
291 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; local
322 struct drm_i915_private *i915 = gt->i915; local
[all...]
/linux-master/drivers/gpu/drm/i915/gvt/
H A Dmmio.c112 struct drm_i915_private *i915 = gvt->gt->i915; local
124 if (drm_WARN_ON(&i915->drm, bytes > 8))
128 if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, 4) &&
131 if (drm_WARN_ON(&i915->drm, bytes != 4 && bytes != 8))
133 if (drm_WARN_ON(&i915->drm,
144 if (drm_WARN_ON_ONCE(&i915->drm, !reg_is_mmio(gvt, offset))) {
149 if (drm_WARN_ON(&i915->drm, !reg_is_mmio(gvt, offset + bytes - 1)))
153 if (drm_WARN_ON(&i915->drm, !IS_ALIGNED(offset, bytes)))
187 struct drm_i915_private *i915 local
[all...]

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