1/* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright �� 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 28#include <linux/i2c.h> 29#include <linux/slab.h> 30 31#include <drm/drm_atomic_helper.h> 32#include <drm/drm_crtc.h> 33#include <drm/drm_edid.h> 34 35#include "i915_drv.h" 36#include "i915_reg.h" 37#include "intel_connector.h" 38#include "intel_de.h" 39#include "intel_display_driver.h" 40#include "intel_display_types.h" 41#include "intel_dvo.h" 42#include "intel_dvo_dev.h" 43#include "intel_dvo_regs.h" 44#include "intel_gmbus.h" 45#include "intel_panel.h" 46 47#define INTEL_DVO_CHIP_NONE 0 48#define INTEL_DVO_CHIP_LVDS 1 49#define INTEL_DVO_CHIP_TMDS 2 50#define INTEL_DVO_CHIP_TVOUT 4 51#define INTEL_DVO_CHIP_LVDS_NO_FIXED 5 52 53#define SIL164_ADDR 0x38 54#define CH7xxx_ADDR 0x76 55#define TFP410_ADDR 0x38 56#define NS2501_ADDR 0x38 57 58static const struct intel_dvo_device intel_dvo_devices[] = { 59 { 60 .type = INTEL_DVO_CHIP_TMDS, 61 .name = "sil164", 62 .port = PORT_C, 63 .slave_addr = SIL164_ADDR, 64 .dev_ops = &sil164_ops, 65 }, 66 { 67 .type = INTEL_DVO_CHIP_TMDS, 68 .name = "ch7xxx", 69 .port = PORT_C, 70 .slave_addr = CH7xxx_ADDR, 71 .dev_ops = &ch7xxx_ops, 72 }, 73 { 74 .type = INTEL_DVO_CHIP_TMDS, 75 .name = "ch7xxx", 76 .port = PORT_C, 77 .slave_addr = 0x75, /* For some ch7010 */ 78 .dev_ops = &ch7xxx_ops, 79 }, 80 { 81 .type = INTEL_DVO_CHIP_LVDS, 82 .name = "ivch", 83 .port = PORT_A, 84 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 85 .dev_ops = &ivch_ops, 86 }, 87 { 88 .type = INTEL_DVO_CHIP_TMDS, 89 .name = "tfp410", 90 .port = PORT_C, 91 .slave_addr = TFP410_ADDR, 92 .dev_ops = &tfp410_ops, 93 }, 94 { 95 .type = INTEL_DVO_CHIP_LVDS, 96 .name = "ch7017", 97 .port = PORT_C, 98 .slave_addr = 0x75, 99 .gpio = GMBUS_PIN_DPB, 100 .dev_ops = &ch7017_ops, 101 }, 102 { 103 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED, 104 .name = "ns2501", 105 .port = PORT_B, 106 .slave_addr = NS2501_ADDR, 107 .dev_ops = &ns2501_ops, 108 }, 109}; 110 111struct intel_dvo { 112 struct intel_encoder base; 113 114 struct intel_dvo_device dev; 115 116 struct intel_connector *attached_connector; 117}; 118 119static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 120{ 121 return container_of(encoder, struct intel_dvo, base); 122} 123 124static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector) 125{ 126 return enc_to_dvo(intel_attached_encoder(connector)); 127} 128 129static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 130{ 131 struct drm_i915_private *i915 = to_i915(connector->base.dev); 132 struct intel_encoder *encoder = intel_attached_encoder(connector); 133 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 134 enum port port = encoder->port; 135 u32 tmp; 136 137 tmp = intel_de_read(i915, DVO(port)); 138 139 if (!(tmp & DVO_ENABLE)) 140 return false; 141 142 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 143} 144 145static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 146 enum pipe *pipe) 147{ 148 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 149 enum port port = encoder->port; 150 u32 tmp; 151 152 tmp = intel_de_read(i915, DVO(port)); 153 154 *pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp); 155 156 return tmp & DVO_ENABLE; 157} 158 159static void intel_dvo_get_config(struct intel_encoder *encoder, 160 struct intel_crtc_state *pipe_config) 161{ 162 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 163 enum port port = encoder->port; 164 u32 tmp, flags = 0; 165 166 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); 167 168 tmp = intel_de_read(i915, DVO(port)); 169 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 170 flags |= DRM_MODE_FLAG_PHSYNC; 171 else 172 flags |= DRM_MODE_FLAG_NHSYNC; 173 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 174 flags |= DRM_MODE_FLAG_PVSYNC; 175 else 176 flags |= DRM_MODE_FLAG_NVSYNC; 177 178 pipe_config->hw.adjusted_mode.flags |= flags; 179 180 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; 181} 182 183static void intel_disable_dvo(struct intel_atomic_state *state, 184 struct intel_encoder *encoder, 185 const struct intel_crtc_state *old_crtc_state, 186 const struct drm_connector_state *old_conn_state) 187{ 188 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 189 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 190 enum port port = encoder->port; 191 192 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 193 194 intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0); 195 intel_de_posting_read(i915, DVO(port)); 196} 197 198static void intel_enable_dvo(struct intel_atomic_state *state, 199 struct intel_encoder *encoder, 200 const struct intel_crtc_state *pipe_config, 201 const struct drm_connector_state *conn_state) 202{ 203 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 204 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 205 enum port port = encoder->port; 206 207 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 208 &pipe_config->hw.mode, 209 &pipe_config->hw.adjusted_mode); 210 211 intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE); 212 intel_de_posting_read(i915, DVO(port)); 213 214 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 215} 216 217static enum drm_mode_status 218intel_dvo_mode_valid(struct drm_connector *_connector, 219 struct drm_display_mode *mode) 220{ 221 struct intel_connector *connector = to_intel_connector(_connector); 222 struct drm_i915_private *i915 = to_i915(connector->base.dev); 223 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 224 const struct drm_display_mode *fixed_mode = 225 intel_panel_fixed_mode(connector, mode); 226 int max_dotclk = to_i915(connector->base.dev)->max_dotclk_freq; 227 int target_clock = mode->clock; 228 enum drm_mode_status status; 229 230 status = intel_cpu_transcoder_mode_valid(i915, mode); 231 if (status != MODE_OK) 232 return status; 233 234 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 235 return MODE_NO_DBLESCAN; 236 237 /* XXX: Validate clock range */ 238 239 if (fixed_mode) { 240 enum drm_mode_status status; 241 242 status = intel_panel_mode_valid(connector, mode); 243 if (status != MODE_OK) 244 return status; 245 246 target_clock = fixed_mode->clock; 247 } 248 249 if (target_clock > max_dotclk) 250 return MODE_CLOCK_HIGH; 251 252 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 253} 254 255static int intel_dvo_compute_config(struct intel_encoder *encoder, 256 struct intel_crtc_state *pipe_config, 257 struct drm_connector_state *conn_state) 258{ 259 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 260 struct intel_connector *connector = to_intel_connector(conn_state->connector); 261 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 262 const struct drm_display_mode *fixed_mode = 263 intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode); 264 265 /* 266 * If we have timings from the BIOS for the panel, put them in 267 * to the adjusted mode. The CRTC will be set up for this mode, 268 * with the panel scaling set up to source from the H/VDisplay 269 * of the original mode. 270 */ 271 if (fixed_mode) { 272 int ret; 273 274 ret = intel_panel_compute_config(connector, adjusted_mode); 275 if (ret) 276 return ret; 277 } 278 279 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 280 return -EINVAL; 281 282 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; 283 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 284 285 return 0; 286} 287 288static void intel_dvo_pre_enable(struct intel_atomic_state *state, 289 struct intel_encoder *encoder, 290 const struct intel_crtc_state *pipe_config, 291 const struct drm_connector_state *conn_state) 292{ 293 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 294 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); 295 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 296 enum port port = encoder->port; 297 enum pipe pipe = crtc->pipe; 298 u32 dvo_val; 299 300 /* Save the active data order, since I don't know what it should be set to. */ 301 dvo_val = intel_de_read(i915, DVO(port)) & 302 (DVO_DEDICATED_INT_ENABLE | 303 DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK); 304 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 305 DVO_BLANK_ACTIVE_HIGH; 306 307 dvo_val |= DVO_PIPE_SEL(pipe); 308 dvo_val |= DVO_PIPE_STALL; 309 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 310 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 311 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 312 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 313 314 intel_de_write(i915, DVO_SRCDIM(port), 315 DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) | 316 DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay)); 317 intel_de_write(i915, DVO(port), dvo_val); 318} 319 320static enum drm_connector_status 321intel_dvo_detect(struct drm_connector *_connector, bool force) 322{ 323 struct intel_connector *connector = to_intel_connector(_connector); 324 struct drm_i915_private *i915 = to_i915(connector->base.dev); 325 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 326 327 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n", 328 connector->base.base.id, connector->base.name); 329 330 if (!intel_display_device_enabled(i915)) 331 return connector_status_disconnected; 332 333 if (!intel_display_driver_check_access(i915)) 334 return connector->base.status; 335 336 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 337} 338 339static int intel_dvo_get_modes(struct drm_connector *_connector) 340{ 341 struct intel_connector *connector = to_intel_connector(_connector); 342 struct drm_i915_private *i915 = to_i915(connector->base.dev); 343 int num_modes; 344 345 if (!intel_display_driver_check_access(i915)) 346 return drm_edid_connector_add_modes(&connector->base); 347 348 /* 349 * We should probably have an i2c driver get_modes function for those 350 * devices which will have a fixed set of modes determined by the chip 351 * (TV-out, for example), but for now with just TMDS and LVDS, 352 * that's not the case. 353 */ 354 num_modes = intel_ddc_get_modes(&connector->base, connector->base.ddc); 355 if (num_modes) 356 return num_modes; 357 358 return intel_panel_get_modes(connector); 359} 360 361static const struct drm_connector_funcs intel_dvo_connector_funcs = { 362 .detect = intel_dvo_detect, 363 .late_register = intel_connector_register, 364 .early_unregister = intel_connector_unregister, 365 .destroy = intel_connector_destroy, 366 .fill_modes = drm_helper_probe_single_connector_modes, 367 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 368 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 369}; 370 371static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 372 .mode_valid = intel_dvo_mode_valid, 373 .get_modes = intel_dvo_get_modes, 374}; 375 376static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 377{ 378 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 379 380 if (intel_dvo->dev.dev_ops->destroy) 381 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 382 383 intel_encoder_destroy(encoder); 384} 385 386static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 387 .destroy = intel_dvo_enc_destroy, 388}; 389 390static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo) 391{ 392 switch (dvo->type) { 393 case INTEL_DVO_CHIP_TMDS: 394 return DRM_MODE_ENCODER_TMDS; 395 case INTEL_DVO_CHIP_LVDS_NO_FIXED: 396 case INTEL_DVO_CHIP_LVDS: 397 return DRM_MODE_ENCODER_LVDS; 398 default: 399 MISSING_CASE(dvo->type); 400 return DRM_MODE_ENCODER_NONE; 401 } 402} 403 404static int intel_dvo_connector_type(const struct intel_dvo_device *dvo) 405{ 406 switch (dvo->type) { 407 case INTEL_DVO_CHIP_TMDS: 408 return DRM_MODE_CONNECTOR_DVII; 409 case INTEL_DVO_CHIP_LVDS_NO_FIXED: 410 case INTEL_DVO_CHIP_LVDS: 411 return DRM_MODE_CONNECTOR_LVDS; 412 default: 413 MISSING_CASE(dvo->type); 414 return DRM_MODE_CONNECTOR_Unknown; 415 } 416} 417 418static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv, 419 struct intel_dvo *intel_dvo, 420 const struct intel_dvo_device *dvo) 421{ 422 struct i2c_adapter *i2c; 423 u32 dpll[I915_MAX_PIPES]; 424 enum pipe pipe; 425 int gpio; 426 bool ret; 427 428 /* 429 * Allow the I2C driver info to specify the GPIO to be used in 430 * special cases, but otherwise default to what's defined 431 * in the spec. 432 */ 433 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) 434 gpio = dvo->gpio; 435 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 436 gpio = GMBUS_PIN_SSC; 437 else 438 gpio = GMBUS_PIN_DPB; 439 440 /* 441 * Set up the I2C bus necessary for the chip we're probing. 442 * It appears that everything is on GPIOE except for panels 443 * on i830 laptops, which are on GPIOB (DVOA). 444 */ 445 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 446 447 intel_dvo->dev = *dvo; 448 449 /* 450 * GMBUS NAK handling seems to be unstable, hence let the 451 * transmitter detection run in bit banging mode for now. 452 */ 453 intel_gmbus_force_bit(i2c, true); 454 455 /* 456 * ns2501 requires the DVO 2x clock before it will 457 * respond to i2c accesses, so make sure we have 458 * the clock enabled before we attempt to initialize 459 * the device. 460 */ 461 for_each_pipe(dev_priv, pipe) 462 dpll[pipe] = intel_de_rmw(dev_priv, DPLL(pipe), 0, DPLL_DVO_2X_MODE); 463 464 ret = dvo->dev_ops->init(&intel_dvo->dev, i2c); 465 466 /* restore the DVO 2x clock state to original */ 467 for_each_pipe(dev_priv, pipe) { 468 intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]); 469 } 470 471 intel_gmbus_force_bit(i2c, false); 472 473 return ret; 474} 475 476static bool intel_dvo_probe(struct drm_i915_private *i915, 477 struct intel_dvo *intel_dvo) 478{ 479 int i; 480 481 /* Now, try to find a controller */ 482 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 483 if (intel_dvo_init_dev(i915, intel_dvo, 484 &intel_dvo_devices[i])) 485 return true; 486 } 487 488 return false; 489} 490 491void intel_dvo_init(struct drm_i915_private *i915) 492{ 493 struct intel_connector *connector; 494 struct intel_encoder *encoder; 495 struct intel_dvo *intel_dvo; 496 497 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 498 if (!intel_dvo) 499 return; 500 501 connector = intel_connector_alloc(); 502 if (!connector) { 503 kfree(intel_dvo); 504 return; 505 } 506 507 intel_dvo->attached_connector = connector; 508 509 encoder = &intel_dvo->base; 510 511 encoder->disable = intel_disable_dvo; 512 encoder->enable = intel_enable_dvo; 513 encoder->get_hw_state = intel_dvo_get_hw_state; 514 encoder->get_config = intel_dvo_get_config; 515 encoder->compute_config = intel_dvo_compute_config; 516 encoder->pre_enable = intel_dvo_pre_enable; 517 connector->get_hw_state = intel_dvo_connector_get_hw_state; 518 519 if (!intel_dvo_probe(i915, intel_dvo)) { 520 kfree(intel_dvo); 521 intel_connector_free(connector); 522 return; 523 } 524 525 assert_port_valid(i915, intel_dvo->dev.port); 526 527 encoder->type = INTEL_OUTPUT_DVO; 528 encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 529 encoder->port = intel_dvo->dev.port; 530 encoder->pipe_mask = ~0; 531 532 if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS) 533 encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) | 534 BIT(INTEL_OUTPUT_DVO); 535 536 drm_encoder_init(&i915->drm, &encoder->base, 537 &intel_dvo_enc_funcs, 538 intel_dvo_encoder_type(&intel_dvo->dev), 539 "DVO %c", port_name(encoder->port)); 540 541 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n", 542 encoder->base.base.id, encoder->base.name, 543 intel_dvo->dev.name); 544 545 if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS) 546 connector->polled = DRM_CONNECTOR_POLL_CONNECT | 547 DRM_CONNECTOR_POLL_DISCONNECT; 548 connector->base.polled = connector->polled; 549 550 drm_connector_init_with_ddc(&i915->drm, &connector->base, 551 &intel_dvo_connector_funcs, 552 intel_dvo_connector_type(&intel_dvo->dev), 553 intel_gmbus_get_adapter(i915, GMBUS_PIN_DPC)); 554 555 drm_connector_helper_add(&connector->base, 556 &intel_dvo_connector_helper_funcs); 557 connector->base.display_info.subpixel_order = SubPixelHorizontalRGB; 558 559 intel_connector_attach_encoder(connector, encoder); 560 561 if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) { 562 /* 563 * For our LVDS chipsets, we should hopefully be able 564 * to dig the fixed panel mode out of the BIOS data. 565 * However, it's in a different format from the BIOS 566 * data on chipsets with integrated LVDS (stored in AIM 567 * headers, likely), so for now, just get the current 568 * mode being output through DVO. 569 */ 570 intel_panel_add_encoder_fixed_mode(connector, encoder); 571 572 intel_panel_init(connector, NULL); 573 } 574} 575