Searched refs:clk_data (Results 151 - 175 of 184) sorted by relevance

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/linux-master/drivers/clk/mmp/
H A Dclk.h139 struct clk_onecell_data clk_data; member in struct:mmp_clk_unit
/linux-master/drivers/clk/imx/
H A Dclk-vf610.c114 static struct clk_onecell_data clk_data; variable in typeref:struct:clk_onecell_data
468 clk_data.clks = clk;
469 clk_data.clk_num = ARRAY_SIZE(clk);
470 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/linux-master/drivers/clk/x86/
H A Dclk-cgu.h74 * @clk_data: array of hw clocks and clk number.
80 struct clk_hw_onecell_data clk_data; member in struct:lgm_clk_provider
H A Dclk-cgu.c385 ctx->clk_data.hws[list->id] = hw;
578 ctx->clk_data.hws[list->id] = hw;
/linux-master/sound/soc/samsung/
H A Di2s.c124 struct clk_onecell_data clk_data; member in struct:samsung_i2s_priv
690 if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL)
1263 for (i = 0; i < priv->clk_data.clk_num; i++) {
1327 priv->clk_data.clk_num = 2;
1336 priv->clk_data.clk_num += 1;
1337 priv->clk_data.clks = priv->clk_table;
1340 &priv->clk_data);
/linux-master/drivers/phy/cadence/
H A Dphy-cadence-sierra.c293 struct clk_init_data clk_data; member in struct:cdns_sierra_pll_mux
322 struct clk_init_data clk_data; member in struct:cdns_sierra_derived_refclk
407 struct clk_hw_onecell_data clk_data; member in struct:cdns_sierra_phy
767 init = &mux->clk_data;
784 sp->clk_data.hws[clk_index] = &mux->hw;
869 init = &derived_refclk->clk_data;
897 sp->clk_data.hws[CDNS_SIERRA_DERIVED_REFCLK] = &derived_refclk->hw;
928 sp->clk_data.num = CDNS_SIERRA_OUTPUT_CLOCKS;
930 &sp->clk_data);
1379 sp = devm_kzalloc(dev, struct_size(sp, clk_data
[all...]
H A Dphy-cadence-torrent.c392 struct clk_init_data clk_data; member in struct:cdns_torrent_refclk_driver
402 struct clk_init_data clk_data; member in struct:cdns_torrent_derived_refclk
412 struct clk_init_data clk_data; member in struct:cdns_torrent_received_refclk
1855 init = &derived_refclk->clk_data;
1938 init = &received_refclk->clk_data;
2053 init = &refclk_driver->clk_data;
/linux-master/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-ufs.c1826 struct clk_hw_onecell_data *clk_data; local
1831 clk_data = devm_kzalloc(qmp->dev,
1832 struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS),
1834 if (!clk_data)
1837 clk_data->num = UFS_SYMBOL_CLOCKS;
1844 clk_data->hws[0] = hw;
1851 clk_data->hws[1] = hw;
1858 clk_data->hws[2] = hw;
1860 ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
/linux-master/sound/soc/codecs/
H A Dda7219.c2133 struct clk_hw_onecell_data *clk_data; local
2138 clk_data = kzalloc(struct_size(clk_data, hws, DA7219_DAI_NUM_CLKS),
2140 if (!clk_data)
2143 clk_data->num = DA7219_DAI_NUM_CLKS;
2144 da7219->clk_hw_data = clk_data;
H A Dcs43130.c590 u8 clk_data; local
660 clk_data = lrck_edge & CS43130_SP_LCPOL_IN_MASK;
661 clk_data |= (lrck_edge << CS43130_SP_LCPOL_OUT_SHIFT) &
663 clk_data |= (sclk_edge << CS43130_SP_SCPOL_IN_SHIFT) &
665 clk_data |= (sclk_edge << CS43130_SP_SCPOL_OUT_SHIFT) &
667 clk_data |= (dai_mode_val << CS43130_SP_MODE_SHIFT) &
692 regmap_write(cs43130->regmap, CS43130_ASP_CLOCK_CONF, clk_data);
714 regmap_write(cs43130->regmap, CS43130_XSP_CLOCK_CONF, clk_data);
/linux-master/arch/mips/ath79/
H A Dclock.c32 static struct clk_onecell_data clk_data = { variable in typeref:struct:clk_onecell_data
652 if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) {
/linux-master/drivers/clk/ux500/
H A Du8500_of_clk.c32 struct clk **clk_data = data; local
46 return PRCC_SHOW(clk_data, base, bit);
/linux-master/drivers/clk/xilinx/
H A Dclk-xlnx-clock-wizard.c124 * @clk_data: Clock data
135 struct clk_onecell_data clk_data; member in struct:clk_wzrd
1193 clk_wzrd->clk_data.clks = clk_wzrd->clkout;
1194 clk_wzrd->clk_data.clk_num = ARRAY_SIZE(clk_wzrd->clkout);
1195 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_wzrd->clk_data);
/linux-master/drivers/clk/samsung/
H A Dclk.h22 * @clk_data: holds clock related data like clk_hw* and number of clocks
28 /* clk_data must be the last entry due to variable length 'hws' array */
29 struct clk_hw_onecell_data clk_data; member in struct:samsung_clk_provider
H A Dclk-s5pv210.c747 hws = ctx->clk_data.hws;
H A Dclk-s3c64xx.c409 hws = ctx->clk_data.hws;
/linux-master/drivers/soc/tegra/
H A Dpmc.c2705 struct clk_onecell_data *clk_data; local
2716 clk_data = devm_kmalloc(pmc->dev, sizeof(*clk_data), GFP_KERNEL);
2717 if (!clk_data)
2720 clk_data->clks = devm_kcalloc(pmc->dev, TEGRA_PMC_CLK_MAX,
2721 sizeof(*clk_data->clks), GFP_KERNEL);
2722 if (!clk_data->clks)
2725 clk_data->clk_num = TEGRA_PMC_CLK_MAX;
2728 clk_data->clks[i] = ERR_PTR(-ENOENT);
2750 clk_data
[all...]
/linux-master/drivers/media/platform/samsung/exynos4-is/
H A Dmedia-dev.c1360 cp->clk_data.clks = cp->clks;
1361 cp->clk_data.clk_num = cp->num_clocks;
1364 &cp->clk_data);
/linux-master/drivers/clk/pistachio/
H A Dclk-pistachio.c195 p->clk_data.clks[CLK_DEBUG_MUX] = debug_clk;
H A Dclk-pll.c508 p->clk_data.clks[pll[i].id] = clk;
/linux-master/drivers/media/platform/qcom/venus/
H A Dcore.h376 * @clk_data: clock data per core ID
444 struct clock_data clk_data; member in struct:venus_inst
H A Dhelpers.c1718 inst->clk_data.vpp_freq = hfi_platform_get_codec_vpp_freq(version, codec,
1720 inst->clk_data.vsp_freq = hfi_platform_get_codec_vsp_freq(version, codec,
1722 inst->clk_data.low_power_freq = hfi_platform_get_codec_lp_freq(version, codec,
/linux-master/drivers/clocksource/
H A Dtimer-ti-dm.c354 struct clk_notifier_data *clk_data = data; local
359 timer->fclk_rate = clk_data->new_rate;
/linux-master/drivers/clk/
H A Dclk_test.c2382 struct clk_notifier_data *clk_data = data; local
2388 ctx->pre_rate_change.old_rate = clk_data->old_rate;
2389 ctx->pre_rate_change.new_rate = clk_data->new_rate;
2395 ctx->post_rate_change.old_rate = clk_data->old_rate;
2396 ctx->post_rate_change.new_rate = clk_data->new_rate;
/linux-master/drivers/clk/tegra/
H A Dclk-tegra210.c3699 struct clk_bulk_data *clk_data; local
3704 clk_data = kmalloc_array(num_clks, sizeof(*clk_data),
3706 if (WARN_ON(!clk_data))
3709 tegra210_pg_mbist_war[i].clks = clk_data;
3715 kfree(clk_data);
3719 clk_data[j].clk = clk;

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