#
2668cae8 |
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30-Jan-2024 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
phy: qcom-qmp-ufs: Switch to devm_clk_bulk_get_all() API Device drivers should just rely on the clocks provided by the devicetree and enable/disable them based on the requirement. There is no need to validate the clocks provided by devicetree in the driver. That's the job of DT schema. So let's switch to devm_clk_bulk_get_all() API that just gets the clocks provided by devicetree and remove hardcoded clocks info. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-2-58a49d2f4605@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
c01e03f9 |
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25-Jan-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp: move common bits definitions to common header Move bit definitions for the common headers to the common phy-qcom-qmp.h header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-5-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
53d7776e |
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25-Jan-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp: move common functions to common header Move common init tables code to the common header phy-qcom-qmp-common.h. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-3-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
b34ae859 |
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25-Dec-2023 |
Can Guo <quic_cang@quicinc.com> |
phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550 On SM8550, two sets of UFS PHY settings are provided, one set is to support HS-G5, another set is to support HS-G4 and lower gears. The two sets of PHY settings are programming different values to different registers, mixing the two sets and/or overwriting one set with another set is definitely not blessed by UFS PHY designers. To add HS-G5 support for SM8550, split the two sets of PHY settings into their dedicated overlay tables, only the common parts of the two sets of PHY settings are left in the .tbls. Consider we are going to add even higher gear support in future, to avoid adding more tables with different names, rename the .tbls_hs_g4 and make it an array, a size of 2 is enough as of now. In this case, .tbls alone is not a complete set of PHY settings, so either tbls_hs_overlay[0] or tbls_hs_overlay[1] must be applied on top of the .tbls to become a complete set of PHY settings. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Can Guo <quic_cang@quicinc.com> Link: https://lore.kernel.org/r/1703557892-1822-1-git-send-email-quic_cang@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
7551d945 |
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21-Jan-2024 |
David Wronek <davidwronek@gmail.com> |
phy: qcom: qmp-ufs: Add SC7180 support The SC7180 UFS PHY is identical to the one found on SM7150. Add a compatible for it. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: David Wronek <davidwronek@gmail.com> Link: https://lore.kernel.org/r/20240121-sm7125-upstream-v4-5-f7d1212c8ebb@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
5301b7a0 |
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02-Dec-2023 |
Can Guo <quic_cang@quicinc.com> |
phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings The registers, which are being touched in current SM8550 UFS PHY settings, and the values being programmed are mainly the ones working for HS-G4 mode, meanwhile, there are also a few ones somehow taken from HS-G5 PHY settings. However, even consider HS-G4 mode only, some of them are incorrect and some are missing. Rectify the HS-G4 PHY settings by strictly aligning with the SM8550 UFS PHY Hardware Programming Guide suggested HS-G4 PHY settings. Fixes: 1679bfef906f ("phy: qcom-qmp-ufs: Add SM8550 support") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Can Guo <quic_cang@quicinc.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Link: https://lore.kernel.org/r/1701520577-31163-10-git-send-email-quic_cang@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
7c4bf8cb |
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30-Oct-2023 |
Neil Armstrong <neil.armstrong@linaro.org> |
phy: qcom: qmp-ufs: add QMP UFS PHY tables for SM8650 Add QMP UFS PHY support for the SM8650 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-phy-v2-5-a543a4c4b491@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
8abe9792 |
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18-Sep-2023 |
Nitin Rawat <quic_nitirawa@quicinc.com> |
phy: qcom-qmp-ufs: Add Phy Configuration support for SC7280 Add SC7280 specific register layout and table configs. Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230918205037.25658-3-quic_nitirawa@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
b102ce6d |
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31-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom: qmp-ufs: add missing offsets to sm8150 configuration The conversion commit 7559e7572c03 ("phy: Explicitly include correct DT includes") misses offsets configuration for sm8150 (most likely it was developed separately from the series adding HS G4 support and was not adapted for the sm8150/sm8250 configuration split). Add missing offsets to sm8150_ufsphy_cfg. Fixes: 7559e7572c03 ("phy: Explicitly include correct DT includes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230731111009.3998089-1-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
7559e757 |
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14-Jul-2023 |
Rob Herring <robh@kernel.org> |
phy: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
20b5c6ae |
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11-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: populate offsets configuration Populate offsets configuration for the rest of UFS PHYs to make it possible to switch them to the new (single-node) bindings style. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711145153.4167820-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
607c101f |
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11-Apr-2023 |
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> |
phy: qualcomm: phy-qcom-qmp-ufs: add definitions for sa8775p Add QMP PHY config for sa8775p and add support for the new compatible. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20230411130446.401440-4-brgl@bgdev.pl Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
868c2a6c |
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11-Mar-2023 |
David Wronek <davidwronek@gmail.com> |
phy: qcom-qmp-ufs: Add SM7150 support Add the tables and constants for init sequences for UFS QMP phy found in SM7150 SoC. Signed-off-by: David Wronek <davidwronek@gmail.com> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230311231733.141806-3-danila@jiaxyga.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
1679bfef |
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17-Jan-2023 |
Abel Vesa <abel.vesa@linaro.org> |
phy: qcom-qmp-ufs: Add SM8550 support Add SM8550 specific register layout and table configs. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20230117224148.1914627-7-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
5b8154ce |
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17-Jan-2023 |
Abel Vesa <abel.vesa@linaro.org> |
phy: qcom-qmp: pcs-ufs: Add v6 register offsets The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new PCS UFS specific offsets in a dedicated header file. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230117224148.1914627-6-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
c9736600 |
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17-Jan-2023 |
Abel Vesa <abel.vesa@linaro.org> |
phy: qcom-qmp: qserdes-txrx-ufs: Add v6 register offsets The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new qserdes TX RX but UFS specific offsets in a dedicated header file. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230117224148.1914627-5-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
6900fdf4 |
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13-Jan-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qualcomm: qmp-ufs: rename qmp_ufs_offsets_v5 to qmp_ufs_offsets All currently known QMP UFS PHYs have the same offsets for register sub-regions. Instead of using qmp_ufs_offsets_v5 for older generations of PHYs, rename the offsets struct instance to remove _v5 suffix. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230113195515.407866-1-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
2a397a23 |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Add HS G4 mode support to SC8280XP SoC UFS PHY in SC8280XP SoC is capable of operating at HS G4 mode and the init sequence is compatible with SM8350. Hence, add the tbls_hs_g4 instance reusing the G4 init sequence of SM8350. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-13-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
8d0fb02c |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Add HS G4 mode support to SM8450 SoC UFS PHY in SM8450 SoC is capable of operating at HS G4 mode and the init sequence is compatible with SM8350. Hence, add the tbls_hs_g4 instance reusing the G4 init sequence of SM8350. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-12-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
90c64cc0 |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Add HS G4 mode support to SM8350 SoC UFS PHY in SM8350 SoC is capable of operating at HS G4 mode. Hence, add the required register settings using the tables_hs_g4 struct instance. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-11-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
0d46b98d |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Avoid setting HS G3 specific registers SM8350 default init sequence sets some PCS registers to HS G3, thereby disabling HS G4 mode. This has the effect on MPHY capability negotiation between the host and the device during link startup and causes the PA_MAXHSGEAR to G3 irrespective of device max gear. Due to that, the agreed gear speed determined by the UFS core will become G3 only and the platform won't run at G4. So, let's remove setting these registers for SM8350 as like other G4 compatible platforms. One downside of this is that, when the board design uses non-G4 compatible device, then MPHY will continue to run in the default mode (G4) even if UFSHCD runs in G3. But this is the case for other platforms as well. Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-10-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
692b6551 |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Add HS G4 mode support to SM8250 SoC UFS PHY in SM8250 SoC is capable of operating at HS G4 mode. Hence, add the required register settings using the tables_hs_g4 struct instance. This also requires a separate qmp_phy_cfg for SM8250 instead of reusing SM8150. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-9-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
f89dcb24 |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Add HS G4 mode support to SM8150 SoC UFS PHY in SM8150 SoC is capable of operating at HS G4 mode. Hence, add the required register settings using the tables_hs_g4 struct instance. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-8-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
0cf7620e |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Move HS Rate B register setting to tbls_hs_b Since now there is support for configuring the HS Rate B mode properly, let's move the register setting to tbls_hs_b struct for all SoCs. This allows the PHY to be configured in Rate A initially and then in Rate B if requested by the UFS driver. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-7-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
baf8d17e |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Add support for configuring PHY in HS G4 mode Add separate tables_hs_g4 instance to allow the PHY driver to configure the PHY in HS G4 mode. The individual SoC configs need to supply the Rx, Tx and PCS register setting in tables_hs_g4 and the UFS driver can request the Hs G4 mode by calling phy_set_mode_ext() with submode set to UFS_HS_G4. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-6-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
69d2f980 |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Add support for configuring PHY in HS Series B mode Add separate tables_hs_b instance to allow the PHY driver to configure the PHY in HS Series B mode. The individual SoC configs need to supply the serdes register setting in tables_hs_b and the UFS driver can request the Series B mode by calling phy_set_mode() with mode set to PHY_MODE_UFS_HS_B. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-5-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
c9a7b0dd |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Move register settings to qmp_phy_cfg_tbls struct As done for Qcom PCIe PHY driver, let's move the register settings to the common qmp_phy_cfg_tbls struct. This helps in adding any additional PHY settings needed for functionalities like HS-G4 in the future by adding one more instance of the qmp_phy_cfg_tbls. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-4-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
fcfcae3b |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Rename MSM8996 PHY definitions Only MSM8996 is using "_ufs_" naming convention for PHY definitions instead of "_ufsphy_" as like other SoCs. So to maintain the uniformity, let's rename all of the definitions to use "_ufsphy_". Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-3-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
342ab21d |
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13-Jan-2023 |
Manivannan Sadhasivam <mani@kernel.org> |
phy: qcom-qmp-ufs: Remove _tbl suffix from qmp_phy_init_tbl definitions Following the other QMP PHY drivers like PCIe, let's remove the "_tbl" suffix from the qmp_phy_init_tbl definitions. This helps in maintaining the uniformity across all of the QMP PHY drivers. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230114071009.88102-2-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
9b9e29af |
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08-Jan-2023 |
Lux Aliaga <they@mint.lgbt> |
phy: qcom-qmp: Add SM6125 UFS PHY support The SM6125 UFS PHY is compatible with the one from SM6115. Add a compatible for it and modify the config from SM6115 to make them compatible with the SC8280XP binding Signed-off-by: Lux Aliaga <they@mint.lgbt> Reviewed-by: Martin Botka <martin.botka@somainline.org> Link: https://lore.kernel.org/r/20230108195336.388349-4-they@mint.lgbt Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
eb5793fb |
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10-Nov-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp: move type-specific headers to particular driver Remove QMP PHY type-specific headers inclusion from the common header and move them to the specific PHY drivers to cleanup the namespaces used by different drivers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221110192248.873973-14-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
5db22640 |
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10-Nov-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: rename regs layout arrays Rename regs layouts to follow the QMP PHY version. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221110192248.873973-9-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
3b4bf465 |
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10-Nov-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: rework regs layout arrays Use symbolic names for the values inside reg layout arrays. New register names are added following the PCS register layout that is used by the particular PHY. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221110192248.873973-8-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
cbd06cde |
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10-Nov-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: split UFS-specific v2 PCS registers to a separate header Follow other QMP headers, split and rename UFS-specific PCS registers to ease comparing regs differences. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221110192248.873973-7-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
7bd7044f |
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22-Nov-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: provide symbol clocks Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src, ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock provider to let other devices link these clocks through the DT. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221123104443.3415267-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
905abf12 |
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11-Nov-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp: drop unused type header The PHY type defines are no longer used in the PCIe, UFS and USB QMP drivers so drop the corresponding include. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221111094239.11547-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
0e089bb8 |
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24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: add support for updated sc8280xp binding Add support for the new SC8280XP binding. Note that the binding does not try to describe every register subregion and instead the driver holds the corresponding offsets. Also note that the driver will continue to accept the old binding, at least for the time being. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-11-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
c64d39b4 |
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24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: restructure PHY creation In preparation for supporting devicetree bindings which do not use a child node, move the PHY creation to probe() proper and parse the serdes resource in what is now the legacy devicetree helper. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-10-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
e0a0c761 |
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24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: clean up PHY init Clean up the PHY initialisation somewhat programming both tx and rx for the second lane after the first lane. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-7-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
b98e44e6 |
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24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: rename PHY ops structure Rename the PHY operation structure so that it has a "phy_ops" suffix and move it next to the implementation. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-6-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
018dfc99 |
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24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: clean up probe initialisation Stop abusing the driver data pointer and instead pass the driver state structure directly to the initialisation helpers during probe. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-5-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
cb2c3d2e |
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24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: clean up device-tree parsing Since the QMP driver split there will be at most a single child node so drop the obsolete iteration construct. While at it, drop the verbose error logging that would have been printed also on probe deferrals. Note that there's no need to check if there are additional child nodes (the kernel is not a devicetree validator), but let's return an error if there are no child nodes at all for now. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-4-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
a36032db |
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24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: merge driver data The UFS QMP PHY driver only manages a single PHY so merge the old qcom_qmp and qmp_phy structures and drop the PHY array. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-3-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
d907774e |
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24-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: move device-id table Move the device-id table below probe() and next to the driver structure to keep the driver callback functions grouped together. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221024090041.19574-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
cb4a982f |
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12-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: drop start and pwrdn-ctrl abstraction Drop the start and pwrdn-ctrl abstractions which are no longer needed since the QMP driver split. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221012085002.24099-19-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
7516edbf |
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12-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: increase ready polling period It typically takes between one and two milliseconds for the PHY to become ready after starting it. Increase the tight 3--10 us polling period to the more reasonable 51--200 us. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20221012085002.24099-12-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
2f561b68 |
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12-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: clean up ready polling Clean up the PHY ready polling by dropping the mask variables which are no longer needed since the QMP driver split. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221012085002.24099-11-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
c8f5c188 |
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12-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: drop unused phy-status config Drop the unused phy-status configuration mask which has never been used for UFS PHYs. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221012085002.24099-10-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
91496846 |
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12-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: drop unused in-layout configuration The QMP UFS PHY driver does not use the "in-layout" configuration macro to configure registers that are typically accessed using "regs_layout" arrays (e.g. QPHY_START_CTRL) so drop this unused feature. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20221012081241.18273-7-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
17302d36 |
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12-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp: drop superfluous comments Drop some unnecessary or incorrect comments. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20221012081241.18273-3-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
28d74fc3 |
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12-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp: drop regulator error message Regulator core already logs an error message in case requesting a regulator fails so drop the mostly redundant error message from probe. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20221012081241.18273-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
2d3068cf |
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17-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: clean up power-down handling Always define the POWER_DOWN_CONTROL register instead of falling back to the v2 (and v4) offset during power on and power off. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20221017065013.19647-9-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
8d3bf724 |
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17-Oct-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp: fix obsolete lane comments All QMP drivers but the MSM8996 and combo ones handle exactly one PHY and the corresponding memory resources are not per-lane, but per PHY. Update the obsolete comments. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20221017065013.19647-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
6d9b32fb |
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24-Sep-2022 |
Yuan Can <yuancan@huawei.com> |
phy: qcom-qmp-ufs: Use dev_err_probe() to simplify code In the probe path, dev_err() can be replaced with dev_err_probe() which will check if error code is -EPROBE_DEFER and prints the error name. It also sets the defer probe reason which can be checked later through debugfs. Signed-off-by: Yuan Can <yuancan@huawei.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20220924070300.25080-4-yuancan@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
07d386bf |
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20-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: consolidate lane config For legacy reasons, there are two configuration parameters that describe the number of lanes a PHY has. Replace them both with a new field simply named "lanes". Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20220920073826.20811-16-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
b4e9da4d |
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20-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp: drop unused index field Only the MSM8996 PCIe QMP driver uses the index field so drop it from the other drivers. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20220920073826.20811-12-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
ec1f303b |
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20-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp: drop unused forward declarations Only the combo QMP driver needs a forward declaration of struct qmp_phy. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20220920073826.20811-8-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
877f3deb |
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20-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: drop unused type from config The configuration PHY type is no longer used since the QMP driver split so drop it from the configuration. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20220920073826.20811-4-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
63825558 |
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15-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: drop legacy DT workaround Commit 5e17b95d9893 ("phy: qcom-qmp: Utilize fully-specified DT registers") added a workaround for legacy devicetrees which did not specify register regions for the second lane of some dual-lane PHYs. At the time, the only two dual-lane PHYs supported by mainline were "qcom,sdm845-qmp-usb3-phy" and "qcom,sdm845-qmp-ufs-phy" and they had been added to the binding less than six months before the binding was fixed. Presumably no one is using four-year old SDM845 dtbs with mainline anymore so drop the workaround for malformed devicetrees. In the unlikely event that anyone complains, we can consider reverting. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220916102340.11520-11-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
ef74a97f |
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15-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: fix memleak on probe deferral Switch to using the device-managed of_iomap helper to avoid leaking memory on probe deferral and driver unbind. Note that this helper checks for already reserved regions and may fail if there are multiple devices claiming the same memory. Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220916102340.11520-6-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
b767dedc |
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07-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-usb: shorten function prefixes The driver function prefix has gotten unnecessarily long and hurts readability. Shorten "qcom_qmp_phy_" to "qmp_" (which likely stands for "Qualcomm Multi PHY" or similar anyway). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-17-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
4412817b |
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07-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: shorten function prefixes The driver function prefix has gotten unnecessarily long and hurts readability. Shorten "qcom_qmp_phy_" to "qmp_" (which likely stands for "Qualcomm Multi PHY" or similar anyway). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-16-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
d44c3e1a |
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07-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp: silence noisy probe Drivers should in general not log anything during unless there are errors. Drop the pointless registration info message from the QMP drivers. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-12-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
6d07bd6f |
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07-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: drop unused defines Drop defines and enums that are unused since the QMP driver split. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220907110728.19092-9-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
b3a467d9 |
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07-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp-ufs: drop unused runtime PM implementation Drop the unused and incomplete runtime PM implementation, which was only used by USB PHYs before splitting the QMP driver. Note that the runtime PM was never disabled (and state restored) on driver unbind. This effectively reverts commit ac0d239936bd ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-8-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
ac439ce8 |
|
06-Sep-2022 |
Johan Hovold <johan+linaro@kernel.org> |
phy: qcom-qmp: drop dual-lane comments Drop the obsolete and misleading dual-lane comments which gave the impression that only combo PHYs have a second lane. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220906074550.4383-4-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
c1ab64aa |
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04-Jul-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register Other PHYs tables directly reference QPHY_PLL_LOCK_CHK_DLY_TIME register without using reglayout. Define corresponding register to be used by msm8996 PHY tables and use it directly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-29-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
d36e341a |
|
04-Jul-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-usb: replace FLL layout writes for msm8996 Other PHYs tables directly reference FLL registers without using reglayout. Define corresponding registers to be used by msm8996 PHY tables and use them directly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-28-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
fc270d13 |
|
04-Jul-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp: split PCS_UFS V3 symbols to separate header Several registers defined in the PCS V3 namespace in reality belong to the PCS_UFS V3 register space. Move them to the separate header and rename them to explicitly mention PCS_UFS. While we are at it, correct one register in the msm8998_usb3_pcs_tbl table to use PCS register name. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-21-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
6cad2983 |
|
04-Jul-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp: rename QMP V2 PCS registers Rename QMP V2 PCS registers to follow the usual pattern of QPHY_V2_PCS_*. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-7-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
#
2eb2920a |
|
04-Jul-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: remove spurious register write in the msm8996 table The msm8996_ufs_serdes_tbl table contains write to QPHY_POWER_DOWN_CONTROL, however this register doesn't belong to the QSERDES register space. Also the PHY power down is already handled in the qcom_qmp_phy_ufs_com_init(). Drop this entry completely. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
1da7115e |
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07-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: drop multi-PHY support Each UFS QMP PHY device provides just a single UFS PHY. Drop support for handling multiple child PHYs. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220607213203.2819885-26-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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3e1865ba |
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07-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: cleanup the driver Remove the conditionals and options that are not used by any of UFS PHY devices. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220607213203.2819885-23-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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bc3e83d7 |
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07-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: drop support for non-UFS PHY types Drop remaining support for PHY types other than UFS. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220607213203.2819885-18-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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b42c5f3d |
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07-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: change symbol prefix to qcom_qmp_phy_ufs Change all symbol names to start with qcom_qmp_phy_ufs_ rather than old qcom_qmp_phy_ Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220607213203.2819885-11-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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4846a79a |
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07-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp-ufs: drop all non-UFS compatibles support Drop support for all non-UFS compatibles from the new qmp-ufs driver. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220607213203.2819885-5-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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94a407cc |
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07-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
phy: qcom-qmp: create copies of QMP PHY driver In order to split and cleanup the single monstrous QMP PHY driver, create blind copies of the current file. They will be used for: - PCIe (and a separate msm8996 PCIe PHY driver) - UFS - USB - Combo DP + USB Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220607213203.2819885-2-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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