1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * da7219.c - DA7219 ALSA SoC Codec Driver 4 * 5 * Copyright (c) 2015 Dialog Semiconductor 6 * 7 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> 8 */ 9 10#include <linux/acpi.h> 11#include <linux/clk.h> 12#include <linux/clkdev.h> 13#include <linux/clk-provider.h> 14#include <linux/i2c.h> 15#include <linux/of.h> 16#include <linux/property.h> 17#include <linux/regmap.h> 18#include <linux/slab.h> 19#include <linux/pm.h> 20#include <linux/module.h> 21#include <linux/delay.h> 22#include <linux/regulator/consumer.h> 23#include <sound/pcm.h> 24#include <sound/pcm_params.h> 25#include <sound/soc.h> 26#include <sound/soc-dapm.h> 27#include <sound/initval.h> 28#include <sound/tlv.h> 29#include <asm/div64.h> 30 31#include <sound/da7219.h> 32#include "da7219.h" 33#include "da7219-aad.h" 34 35 36/* 37 * TLVs and Enums 38 */ 39 40/* Input TLVs */ 41static const DECLARE_TLV_DB_SCALE(da7219_mic_gain_tlv, -600, 600, 0); 42static const DECLARE_TLV_DB_SCALE(da7219_mixin_gain_tlv, -450, 150, 0); 43static const DECLARE_TLV_DB_SCALE(da7219_adc_dig_gain_tlv, -8325, 75, 0); 44static const DECLARE_TLV_DB_SCALE(da7219_alc_threshold_tlv, -9450, 150, 0); 45static const DECLARE_TLV_DB_SCALE(da7219_alc_gain_tlv, 0, 600, 0); 46static const DECLARE_TLV_DB_SCALE(da7219_alc_ana_gain_tlv, 0, 600, 0); 47static const DECLARE_TLV_DB_SCALE(da7219_sidetone_gain_tlv, -4200, 300, 0); 48static const DECLARE_TLV_DB_SCALE(da7219_tonegen_gain_tlv, -4500, 300, 0); 49 50/* Output TLVs */ 51static const DECLARE_TLV_DB_SCALE(da7219_dac_eq_band_tlv, -1050, 150, 0); 52 53static const DECLARE_TLV_DB_RANGE(da7219_dac_dig_gain_tlv, 54 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 55 /* -77.25dB to 12dB */ 56 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7725, 75, 0) 57); 58 59static const DECLARE_TLV_DB_SCALE(da7219_dac_ng_threshold_tlv, -10200, 600, 0); 60static const DECLARE_TLV_DB_SCALE(da7219_hp_gain_tlv, -5700, 100, 0); 61 62/* Input Enums */ 63static const char * const da7219_alc_attack_rate_txt[] = { 64 "7.33/fs", "14.66/fs", "29.32/fs", "58.64/fs", "117.3/fs", "234.6/fs", 65 "469.1/fs", "938.2/fs", "1876/fs", "3753/fs", "7506/fs", "15012/fs", 66 "30024/fs" 67}; 68 69static const struct soc_enum da7219_alc_attack_rate = 70 SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_ATTACK_SHIFT, 71 DA7219_ALC_ATTACK_MAX, da7219_alc_attack_rate_txt); 72 73static const char * const da7219_alc_release_rate_txt[] = { 74 "28.66/fs", "57.33/fs", "114.6/fs", "229.3/fs", "458.6/fs", "917.1/fs", 75 "1834/fs", "3668/fs", "7337/fs", "14674/fs", "29348/fs" 76}; 77 78static const struct soc_enum da7219_alc_release_rate = 79 SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_RELEASE_SHIFT, 80 DA7219_ALC_RELEASE_MAX, da7219_alc_release_rate_txt); 81 82static const char * const da7219_alc_hold_time_txt[] = { 83 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs", 84 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs", 85 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs" 86}; 87 88static const struct soc_enum da7219_alc_hold_time = 89 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_HOLD_SHIFT, 90 DA7219_ALC_HOLD_MAX, da7219_alc_hold_time_txt); 91 92static const char * const da7219_alc_env_rate_txt[] = { 93 "1/4", "1/16", "1/256", "1/65536" 94}; 95 96static const struct soc_enum da7219_alc_env_attack_rate = 97 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_ATTACK_SHIFT, 98 DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt); 99 100static const struct soc_enum da7219_alc_env_release_rate = 101 SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_RELEASE_SHIFT, 102 DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt); 103 104static const char * const da7219_alc_anticlip_step_txt[] = { 105 "0.034dB/fs", "0.068dB/fs", "0.136dB/fs", "0.272dB/fs" 106}; 107 108static const struct soc_enum da7219_alc_anticlip_step = 109 SOC_ENUM_SINGLE(DA7219_ALC_ANTICLIP_CTRL, 110 DA7219_ALC_ANTICLIP_STEP_SHIFT, 111 DA7219_ALC_ANTICLIP_STEP_MAX, 112 da7219_alc_anticlip_step_txt); 113 114/* Input/Output Enums */ 115static const char * const da7219_gain_ramp_rate_txt[] = { 116 "Nominal Rate * 8", "Nominal Rate", "Nominal Rate / 8", 117 "Nominal Rate / 16" 118}; 119 120static const struct soc_enum da7219_gain_ramp_rate = 121 SOC_ENUM_SINGLE(DA7219_GAIN_RAMP_CTRL, DA7219_GAIN_RAMP_RATE_SHIFT, 122 DA7219_GAIN_RAMP_RATE_MAX, da7219_gain_ramp_rate_txt); 123 124static const char * const da7219_hpf_mode_txt[] = { 125 "Disabled", "Audio", "Voice" 126}; 127 128static const unsigned int da7219_hpf_mode_val[] = { 129 DA7219_HPF_DISABLED, DA7219_HPF_AUDIO_EN, DA7219_HPF_VOICE_EN, 130}; 131 132static const struct soc_enum da7219_adc_hpf_mode = 133 SOC_VALUE_ENUM_SINGLE(DA7219_ADC_FILTERS1, DA7219_HPF_MODE_SHIFT, 134 DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX, 135 da7219_hpf_mode_txt, da7219_hpf_mode_val); 136 137static const struct soc_enum da7219_dac_hpf_mode = 138 SOC_VALUE_ENUM_SINGLE(DA7219_DAC_FILTERS1, DA7219_HPF_MODE_SHIFT, 139 DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX, 140 da7219_hpf_mode_txt, da7219_hpf_mode_val); 141 142static const char * const da7219_audio_hpf_corner_txt[] = { 143 "2Hz", "4Hz", "8Hz", "16Hz" 144}; 145 146static const struct soc_enum da7219_adc_audio_hpf_corner = 147 SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1, 148 DA7219_ADC_AUDIO_HPF_CORNER_SHIFT, 149 DA7219_AUDIO_HPF_CORNER_MAX, 150 da7219_audio_hpf_corner_txt); 151 152static const struct soc_enum da7219_dac_audio_hpf_corner = 153 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1, 154 DA7219_DAC_AUDIO_HPF_CORNER_SHIFT, 155 DA7219_AUDIO_HPF_CORNER_MAX, 156 da7219_audio_hpf_corner_txt); 157 158static const char * const da7219_voice_hpf_corner_txt[] = { 159 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" 160}; 161 162static const struct soc_enum da7219_adc_voice_hpf_corner = 163 SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1, 164 DA7219_ADC_VOICE_HPF_CORNER_SHIFT, 165 DA7219_VOICE_HPF_CORNER_MAX, 166 da7219_voice_hpf_corner_txt); 167 168static const struct soc_enum da7219_dac_voice_hpf_corner = 169 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1, 170 DA7219_DAC_VOICE_HPF_CORNER_SHIFT, 171 DA7219_VOICE_HPF_CORNER_MAX, 172 da7219_voice_hpf_corner_txt); 173 174static const char * const da7219_tonegen_dtmf_key_txt[] = { 175 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D", 176 "*", "#" 177}; 178 179static const struct soc_enum da7219_tonegen_dtmf_key = 180 SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG1, DA7219_DTMF_REG_SHIFT, 181 DA7219_DTMF_REG_MAX, da7219_tonegen_dtmf_key_txt); 182 183static const char * const da7219_tonegen_swg_sel_txt[] = { 184 "Sum", "SWG1", "SWG2", "SWG1_1-Cos" 185}; 186 187static const struct soc_enum da7219_tonegen_swg_sel = 188 SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG2, DA7219_SWG_SEL_SHIFT, 189 DA7219_SWG_SEL_MAX, da7219_tonegen_swg_sel_txt); 190 191/* Output Enums */ 192static const char * const da7219_dac_softmute_rate_txt[] = { 193 "1 Sample", "2 Samples", "4 Samples", "8 Samples", "16 Samples", 194 "32 Samples", "64 Samples" 195}; 196 197static const struct soc_enum da7219_dac_softmute_rate = 198 SOC_ENUM_SINGLE(DA7219_DAC_FILTERS5, DA7219_DAC_SOFTMUTE_RATE_SHIFT, 199 DA7219_DAC_SOFTMUTE_RATE_MAX, 200 da7219_dac_softmute_rate_txt); 201 202static const char * const da7219_dac_ng_setup_time_txt[] = { 203 "256 Samples", "512 Samples", "1024 Samples", "2048 Samples" 204}; 205 206static const struct soc_enum da7219_dac_ng_setup_time = 207 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME, 208 DA7219_DAC_NG_SETUP_TIME_SHIFT, 209 DA7219_DAC_NG_SETUP_TIME_MAX, 210 da7219_dac_ng_setup_time_txt); 211 212static const char * const da7219_dac_ng_rampup_txt[] = { 213 "0.22ms/dB", "0.0138ms/dB" 214}; 215 216static const struct soc_enum da7219_dac_ng_rampup_rate = 217 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME, 218 DA7219_DAC_NG_RAMPUP_RATE_SHIFT, 219 DA7219_DAC_NG_RAMP_RATE_MAX, 220 da7219_dac_ng_rampup_txt); 221 222static const char * const da7219_dac_ng_rampdown_txt[] = { 223 "0.88ms/dB", "14.08ms/dB" 224}; 225 226static const struct soc_enum da7219_dac_ng_rampdown_rate = 227 SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME, 228 DA7219_DAC_NG_RAMPDN_RATE_SHIFT, 229 DA7219_DAC_NG_RAMP_RATE_MAX, 230 da7219_dac_ng_rampdown_txt); 231 232 233static const char * const da7219_cp_track_mode_txt[] = { 234 "Largest Volume", "DAC Volume", "Signal Magnitude" 235}; 236 237static const unsigned int da7219_cp_track_mode_val[] = { 238 DA7219_CP_MCHANGE_LARGEST_VOL, DA7219_CP_MCHANGE_DAC_VOL, 239 DA7219_CP_MCHANGE_SIG_MAG 240}; 241 242static const struct soc_enum da7219_cp_track_mode = 243 SOC_VALUE_ENUM_SINGLE(DA7219_CP_CTRL, DA7219_CP_MCHANGE_SHIFT, 244 DA7219_CP_MCHANGE_REL_MASK, DA7219_CP_MCHANGE_MAX, 245 da7219_cp_track_mode_txt, 246 da7219_cp_track_mode_val); 247 248 249/* 250 * Control Functions 251 */ 252 253/* Locked Kcontrol calls */ 254static int da7219_volsw_locked_get(struct snd_kcontrol *kcontrol, 255 struct snd_ctl_elem_value *ucontrol) 256{ 257 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 258 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 259 int ret; 260 261 mutex_lock(&da7219->ctrl_lock); 262 ret = snd_soc_get_volsw(kcontrol, ucontrol); 263 mutex_unlock(&da7219->ctrl_lock); 264 265 return ret; 266} 267 268static int da7219_volsw_locked_put(struct snd_kcontrol *kcontrol, 269 struct snd_ctl_elem_value *ucontrol) 270{ 271 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 272 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 273 int ret; 274 275 mutex_lock(&da7219->ctrl_lock); 276 ret = snd_soc_put_volsw(kcontrol, ucontrol); 277 mutex_unlock(&da7219->ctrl_lock); 278 279 return ret; 280} 281 282static int da7219_enum_locked_get(struct snd_kcontrol *kcontrol, 283 struct snd_ctl_elem_value *ucontrol) 284{ 285 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 286 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 287 int ret; 288 289 mutex_lock(&da7219->ctrl_lock); 290 ret = snd_soc_get_enum_double(kcontrol, ucontrol); 291 mutex_unlock(&da7219->ctrl_lock); 292 293 return ret; 294} 295 296static int da7219_enum_locked_put(struct snd_kcontrol *kcontrol, 297 struct snd_ctl_elem_value *ucontrol) 298{ 299 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 300 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 301 int ret; 302 303 mutex_lock(&da7219->ctrl_lock); 304 ret = snd_soc_put_enum_double(kcontrol, ucontrol); 305 mutex_unlock(&da7219->ctrl_lock); 306 307 return ret; 308} 309 310/* ALC */ 311static void da7219_alc_calib(struct snd_soc_component *component) 312{ 313 u8 mic_ctrl, mixin_ctrl, adc_ctrl, calib_ctrl; 314 315 /* Save current state of mic control register */ 316 mic_ctrl = snd_soc_component_read(component, DA7219_MIC_1_CTRL); 317 318 /* Save current state of input mixer control register */ 319 mixin_ctrl = snd_soc_component_read(component, DA7219_MIXIN_L_CTRL); 320 321 /* Save current state of input ADC control register */ 322 adc_ctrl = snd_soc_component_read(component, DA7219_ADC_L_CTRL); 323 324 /* Enable then Mute MIC PGAs */ 325 snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, DA7219_MIC_1_AMP_EN_MASK, 326 DA7219_MIC_1_AMP_EN_MASK); 327 snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, 328 DA7219_MIC_1_AMP_MUTE_EN_MASK, 329 DA7219_MIC_1_AMP_MUTE_EN_MASK); 330 331 /* Enable input mixers unmuted */ 332 snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL, 333 DA7219_MIXIN_L_AMP_EN_MASK | 334 DA7219_MIXIN_L_AMP_MUTE_EN_MASK, 335 DA7219_MIXIN_L_AMP_EN_MASK); 336 337 /* Enable input filters unmuted */ 338 snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL, 339 DA7219_ADC_L_MUTE_EN_MASK | DA7219_ADC_L_EN_MASK, 340 DA7219_ADC_L_EN_MASK); 341 342 /* Perform auto calibration */ 343 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1, 344 DA7219_ALC_AUTO_CALIB_EN_MASK, 345 DA7219_ALC_AUTO_CALIB_EN_MASK); 346 do { 347 calib_ctrl = snd_soc_component_read(component, DA7219_ALC_CTRL1); 348 } while (calib_ctrl & DA7219_ALC_AUTO_CALIB_EN_MASK); 349 350 /* If auto calibration fails, disable DC offset, hybrid ALC */ 351 if (calib_ctrl & DA7219_ALC_CALIB_OVERFLOW_MASK) { 352 dev_warn(component->dev, 353 "ALC auto calibration failed with overflow\n"); 354 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1, 355 DA7219_ALC_OFFSET_EN_MASK | 356 DA7219_ALC_SYNC_MODE_MASK, 0); 357 } else { 358 /* Enable DC offset cancellation, hybrid mode */ 359 snd_soc_component_update_bits(component, DA7219_ALC_CTRL1, 360 DA7219_ALC_OFFSET_EN_MASK | 361 DA7219_ALC_SYNC_MODE_MASK, 362 DA7219_ALC_OFFSET_EN_MASK | 363 DA7219_ALC_SYNC_MODE_MASK); 364 } 365 366 /* Restore input filter control register to original state */ 367 snd_soc_component_write(component, DA7219_ADC_L_CTRL, adc_ctrl); 368 369 /* Restore input mixer control registers to original state */ 370 snd_soc_component_write(component, DA7219_MIXIN_L_CTRL, mixin_ctrl); 371 372 /* Restore MIC control registers to original states */ 373 snd_soc_component_write(component, DA7219_MIC_1_CTRL, mic_ctrl); 374} 375 376static int da7219_mixin_gain_put(struct snd_kcontrol *kcontrol, 377 struct snd_ctl_elem_value *ucontrol) 378{ 379 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 380 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 381 int ret; 382 383 ret = snd_soc_put_volsw(kcontrol, ucontrol); 384 385 /* 386 * If ALC in operation and value of control has been updated, 387 * make sure calibrated offsets are updated. 388 */ 389 if ((ret == 1) && (da7219->alc_en)) 390 da7219_alc_calib(component); 391 392 return ret; 393} 394 395static int da7219_alc_sw_put(struct snd_kcontrol *kcontrol, 396 struct snd_ctl_elem_value *ucontrol) 397{ 398 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 399 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 400 401 402 /* Force ALC offset calibration if enabling ALC */ 403 if ((ucontrol->value.integer.value[0]) && (!da7219->alc_en)) { 404 da7219_alc_calib(component); 405 da7219->alc_en = true; 406 } else { 407 da7219->alc_en = false; 408 } 409 410 return snd_soc_put_volsw(kcontrol, ucontrol); 411} 412 413/* ToneGen */ 414static int da7219_tonegen_freq_get(struct snd_kcontrol *kcontrol, 415 struct snd_ctl_elem_value *ucontrol) 416{ 417 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 418 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 419 struct soc_mixer_control *mixer_ctrl = 420 (struct soc_mixer_control *) kcontrol->private_value; 421 unsigned int reg = mixer_ctrl->reg; 422 __le16 val; 423 int ret; 424 425 mutex_lock(&da7219->ctrl_lock); 426 ret = regmap_raw_read(da7219->regmap, reg, &val, sizeof(val)); 427 mutex_unlock(&da7219->ctrl_lock); 428 429 if (ret) 430 return ret; 431 432 /* 433 * Frequency value spans two 8-bit registers, lower then upper byte. 434 * Therefore we need to convert to host endianness here. 435 */ 436 ucontrol->value.integer.value[0] = le16_to_cpu(val); 437 438 return 0; 439} 440 441static int da7219_tonegen_freq_put(struct snd_kcontrol *kcontrol, 442 struct snd_ctl_elem_value *ucontrol) 443{ 444 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 445 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 446 struct soc_mixer_control *mixer_ctrl = 447 (struct soc_mixer_control *) kcontrol->private_value; 448 unsigned int reg = mixer_ctrl->reg; 449 __le16 val_new, val_old; 450 int ret; 451 452 /* 453 * Frequency value spans two 8-bit registers, lower then upper byte. 454 * Therefore we need to convert to little endian here to align with 455 * HW registers. 456 */ 457 val_new = cpu_to_le16(ucontrol->value.integer.value[0]); 458 459 mutex_lock(&da7219->ctrl_lock); 460 ret = regmap_raw_read(da7219->regmap, reg, &val_old, sizeof(val_old)); 461 if (ret == 0 && (val_old != val_new)) 462 ret = regmap_raw_write(da7219->regmap, reg, 463 &val_new, sizeof(val_new)); 464 mutex_unlock(&da7219->ctrl_lock); 465 466 if (ret < 0) 467 return ret; 468 469 return val_old != val_new; 470} 471 472 473/* 474 * KControls 475 */ 476 477static const struct snd_kcontrol_new da7219_snd_controls[] = { 478 /* Mics */ 479 SOC_SINGLE_TLV("Mic Volume", DA7219_MIC_1_GAIN, 480 DA7219_MIC_1_AMP_GAIN_SHIFT, DA7219_MIC_1_AMP_GAIN_MAX, 481 DA7219_NO_INVERT, da7219_mic_gain_tlv), 482 SOC_SINGLE("Mic Switch", DA7219_MIC_1_CTRL, 483 DA7219_MIC_1_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 484 DA7219_INVERT), 485 486 /* Mixer Input */ 487 SOC_SINGLE_EXT_TLV("Mixin Volume", DA7219_MIXIN_L_GAIN, 488 DA7219_MIXIN_L_AMP_GAIN_SHIFT, 489 DA7219_MIXIN_L_AMP_GAIN_MAX, DA7219_NO_INVERT, 490 snd_soc_get_volsw, da7219_mixin_gain_put, 491 da7219_mixin_gain_tlv), 492 SOC_SINGLE("Mixin Switch", DA7219_MIXIN_L_CTRL, 493 DA7219_MIXIN_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 494 DA7219_INVERT), 495 SOC_SINGLE("Mixin Gain Ramp Switch", DA7219_MIXIN_L_CTRL, 496 DA7219_MIXIN_L_AMP_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX, 497 DA7219_NO_INVERT), 498 SOC_SINGLE("Mixin ZC Gain Switch", DA7219_MIXIN_L_CTRL, 499 DA7219_MIXIN_L_AMP_ZC_EN_SHIFT, DA7219_SWITCH_EN_MAX, 500 DA7219_NO_INVERT), 501 502 /* ADC */ 503 SOC_SINGLE_TLV("Capture Digital Volume", DA7219_ADC_L_GAIN, 504 DA7219_ADC_L_DIGITAL_GAIN_SHIFT, 505 DA7219_ADC_L_DIGITAL_GAIN_MAX, DA7219_NO_INVERT, 506 da7219_adc_dig_gain_tlv), 507 SOC_SINGLE("Capture Digital Switch", DA7219_ADC_L_CTRL, 508 DA7219_ADC_L_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 509 DA7219_INVERT), 510 SOC_SINGLE("Capture Digital Gain Ramp Switch", DA7219_ADC_L_CTRL, 511 DA7219_ADC_L_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX, 512 DA7219_NO_INVERT), 513 514 /* ALC */ 515 SOC_ENUM("ALC Attack Rate", da7219_alc_attack_rate), 516 SOC_ENUM("ALC Release Rate", da7219_alc_release_rate), 517 SOC_ENUM("ALC Hold Time", da7219_alc_hold_time), 518 SOC_ENUM("ALC Envelope Attack Rate", da7219_alc_env_attack_rate), 519 SOC_ENUM("ALC Envelope Release Rate", da7219_alc_env_release_rate), 520 SOC_SINGLE_TLV("ALC Noise Threshold", DA7219_ALC_NOISE, 521 DA7219_ALC_NOISE_SHIFT, DA7219_ALC_THRESHOLD_MAX, 522 DA7219_INVERT, da7219_alc_threshold_tlv), 523 SOC_SINGLE_TLV("ALC Min Threshold", DA7219_ALC_TARGET_MIN, 524 DA7219_ALC_THRESHOLD_MIN_SHIFT, DA7219_ALC_THRESHOLD_MAX, 525 DA7219_INVERT, da7219_alc_threshold_tlv), 526 SOC_SINGLE_TLV("ALC Max Threshold", DA7219_ALC_TARGET_MAX, 527 DA7219_ALC_THRESHOLD_MAX_SHIFT, DA7219_ALC_THRESHOLD_MAX, 528 DA7219_INVERT, da7219_alc_threshold_tlv), 529 SOC_SINGLE_TLV("ALC Max Attenuation", DA7219_ALC_GAIN_LIMITS, 530 DA7219_ALC_ATTEN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX, 531 DA7219_NO_INVERT, da7219_alc_gain_tlv), 532 SOC_SINGLE_TLV("ALC Max Volume", DA7219_ALC_GAIN_LIMITS, 533 DA7219_ALC_GAIN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX, 534 DA7219_NO_INVERT, da7219_alc_gain_tlv), 535 SOC_SINGLE_RANGE_TLV("ALC Min Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS, 536 DA7219_ALC_ANA_GAIN_MIN_SHIFT, 537 DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX, 538 DA7219_NO_INVERT, da7219_alc_ana_gain_tlv), 539 SOC_SINGLE_RANGE_TLV("ALC Max Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS, 540 DA7219_ALC_ANA_GAIN_MAX_SHIFT, 541 DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX, 542 DA7219_NO_INVERT, da7219_alc_ana_gain_tlv), 543 SOC_ENUM("ALC Anticlip Step", da7219_alc_anticlip_step), 544 SOC_SINGLE("ALC Anticlip Switch", DA7219_ALC_ANTICLIP_CTRL, 545 DA7219_ALC_ANTIPCLIP_EN_SHIFT, DA7219_SWITCH_EN_MAX, 546 DA7219_NO_INVERT), 547 SOC_SINGLE_EXT("ALC Switch", DA7219_ALC_CTRL1, DA7219_ALC_EN_SHIFT, 548 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT, 549 snd_soc_get_volsw, da7219_alc_sw_put), 550 551 /* Input High-Pass Filters */ 552 SOC_ENUM("ADC HPF Mode", da7219_adc_hpf_mode), 553 SOC_ENUM("ADC HPF Corner Audio", da7219_adc_audio_hpf_corner), 554 SOC_ENUM("ADC HPF Corner Voice", da7219_adc_voice_hpf_corner), 555 556 /* Sidetone Filter */ 557 SOC_SINGLE_TLV("Sidetone Volume", DA7219_SIDETONE_GAIN, 558 DA7219_SIDETONE_GAIN_SHIFT, DA7219_SIDETONE_GAIN_MAX, 559 DA7219_NO_INVERT, da7219_sidetone_gain_tlv), 560 SOC_SINGLE("Sidetone Switch", DA7219_SIDETONE_CTRL, 561 DA7219_SIDETONE_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 562 DA7219_INVERT), 563 564 /* Tone Generator */ 565 SOC_SINGLE_EXT_TLV("ToneGen Volume", DA7219_TONE_GEN_CFG2, 566 DA7219_TONE_GEN_GAIN_SHIFT, DA7219_TONE_GEN_GAIN_MAX, 567 DA7219_NO_INVERT, da7219_volsw_locked_get, 568 da7219_volsw_locked_put, da7219_tonegen_gain_tlv), 569 SOC_ENUM_EXT("ToneGen DTMF Key", da7219_tonegen_dtmf_key, 570 da7219_enum_locked_get, da7219_enum_locked_put), 571 SOC_SINGLE_EXT("ToneGen DTMF Switch", DA7219_TONE_GEN_CFG1, 572 DA7219_DTMF_EN_SHIFT, DA7219_SWITCH_EN_MAX, 573 DA7219_NO_INVERT, da7219_volsw_locked_get, 574 da7219_volsw_locked_put), 575 SOC_ENUM_EXT("ToneGen Sinewave Gen Type", da7219_tonegen_swg_sel, 576 da7219_enum_locked_get, da7219_enum_locked_put), 577 SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7219_TONE_GEN_FREQ1_L, 578 DA7219_FREQ1_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT, 579 da7219_tonegen_freq_get, da7219_tonegen_freq_put), 580 SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7219_TONE_GEN_FREQ2_L, 581 DA7219_FREQ2_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT, 582 da7219_tonegen_freq_get, da7219_tonegen_freq_put), 583 SOC_SINGLE_EXT("ToneGen On Time", DA7219_TONE_GEN_ON_PER, 584 DA7219_BEEP_ON_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX, 585 DA7219_NO_INVERT, da7219_volsw_locked_get, 586 da7219_volsw_locked_put), 587 SOC_SINGLE("ToneGen Off Time", DA7219_TONE_GEN_OFF_PER, 588 DA7219_BEEP_OFF_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX, 589 DA7219_NO_INVERT), 590 591 /* Gain ramping */ 592 SOC_ENUM("Gain Ramp Rate", da7219_gain_ramp_rate), 593 594 /* DAC High-Pass Filter */ 595 SOC_ENUM_EXT("DAC HPF Mode", da7219_dac_hpf_mode, 596 da7219_enum_locked_get, da7219_enum_locked_put), 597 SOC_ENUM("DAC HPF Corner Audio", da7219_dac_audio_hpf_corner), 598 SOC_ENUM("DAC HPF Corner Voice", da7219_dac_voice_hpf_corner), 599 600 /* DAC 5-Band Equaliser */ 601 SOC_SINGLE_TLV("DAC EQ Band1 Volume", DA7219_DAC_FILTERS2, 602 DA7219_DAC_EQ_BAND1_SHIFT, DA7219_DAC_EQ_BAND_MAX, 603 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 604 SOC_SINGLE_TLV("DAC EQ Band2 Volume", DA7219_DAC_FILTERS2, 605 DA7219_DAC_EQ_BAND2_SHIFT, DA7219_DAC_EQ_BAND_MAX, 606 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 607 SOC_SINGLE_TLV("DAC EQ Band3 Volume", DA7219_DAC_FILTERS3, 608 DA7219_DAC_EQ_BAND3_SHIFT, DA7219_DAC_EQ_BAND_MAX, 609 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 610 SOC_SINGLE_TLV("DAC EQ Band4 Volume", DA7219_DAC_FILTERS3, 611 DA7219_DAC_EQ_BAND4_SHIFT, DA7219_DAC_EQ_BAND_MAX, 612 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 613 SOC_SINGLE_TLV("DAC EQ Band5 Volume", DA7219_DAC_FILTERS4, 614 DA7219_DAC_EQ_BAND5_SHIFT, DA7219_DAC_EQ_BAND_MAX, 615 DA7219_NO_INVERT, da7219_dac_eq_band_tlv), 616 SOC_SINGLE_EXT("DAC EQ Switch", DA7219_DAC_FILTERS4, 617 DA7219_DAC_EQ_EN_SHIFT, DA7219_SWITCH_EN_MAX, 618 DA7219_NO_INVERT, da7219_volsw_locked_get, 619 da7219_volsw_locked_put), 620 621 /* DAC Softmute */ 622 SOC_ENUM("DAC Soft Mute Rate", da7219_dac_softmute_rate), 623 SOC_SINGLE_EXT("DAC Soft Mute Switch", DA7219_DAC_FILTERS5, 624 DA7219_DAC_SOFTMUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 625 DA7219_NO_INVERT, da7219_volsw_locked_get, 626 da7219_volsw_locked_put), 627 628 /* DAC Noise Gate */ 629 SOC_ENUM("DAC NG Setup Time", da7219_dac_ng_setup_time), 630 SOC_ENUM("DAC NG Rampup Rate", da7219_dac_ng_rampup_rate), 631 SOC_ENUM("DAC NG Rampdown Rate", da7219_dac_ng_rampdown_rate), 632 SOC_SINGLE_TLV("DAC NG Off Threshold", DA7219_DAC_NG_OFF_THRESH, 633 DA7219_DAC_NG_OFF_THRESHOLD_SHIFT, 634 DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT, 635 da7219_dac_ng_threshold_tlv), 636 SOC_SINGLE_TLV("DAC NG On Threshold", DA7219_DAC_NG_ON_THRESH, 637 DA7219_DAC_NG_ON_THRESHOLD_SHIFT, 638 DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT, 639 da7219_dac_ng_threshold_tlv), 640 SOC_SINGLE("DAC NG Switch", DA7219_DAC_NG_CTRL, DA7219_DAC_NG_EN_SHIFT, 641 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 642 643 /* DACs */ 644 SOC_DOUBLE_R_EXT_TLV("Playback Digital Volume", DA7219_DAC_L_GAIN, 645 DA7219_DAC_R_GAIN, DA7219_DAC_L_DIGITAL_GAIN_SHIFT, 646 DA7219_DAC_DIGITAL_GAIN_MAX, DA7219_NO_INVERT, 647 da7219_volsw_locked_get, da7219_volsw_locked_put, 648 da7219_dac_dig_gain_tlv), 649 SOC_DOUBLE_R_EXT("Playback Digital Switch", DA7219_DAC_L_CTRL, 650 DA7219_DAC_R_CTRL, DA7219_DAC_L_MUTE_EN_SHIFT, 651 DA7219_SWITCH_EN_MAX, DA7219_INVERT, 652 da7219_volsw_locked_get, da7219_volsw_locked_put), 653 SOC_DOUBLE_R("Playback Digital Gain Ramp Switch", DA7219_DAC_L_CTRL, 654 DA7219_DAC_R_CTRL, DA7219_DAC_L_RAMP_EN_SHIFT, 655 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 656 657 /* CP */ 658 SOC_ENUM("Charge Pump Track Mode", da7219_cp_track_mode), 659 SOC_SINGLE("Charge Pump Threshold", DA7219_CP_VOL_THRESHOLD1, 660 DA7219_CP_THRESH_VDD2_SHIFT, DA7219_CP_THRESH_VDD2_MAX, 661 DA7219_NO_INVERT), 662 663 /* Headphones */ 664 SOC_DOUBLE_R_EXT_TLV("Headphone Volume", DA7219_HP_L_GAIN, 665 DA7219_HP_R_GAIN, DA7219_HP_L_AMP_GAIN_SHIFT, 666 DA7219_HP_AMP_GAIN_MAX, DA7219_NO_INVERT, 667 da7219_volsw_locked_get, da7219_volsw_locked_put, 668 da7219_hp_gain_tlv), 669 SOC_DOUBLE_R_EXT("Headphone Switch", DA7219_HP_L_CTRL, DA7219_HP_R_CTRL, 670 DA7219_HP_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX, 671 DA7219_INVERT, da7219_volsw_locked_get, 672 da7219_volsw_locked_put), 673 SOC_DOUBLE_R("Headphone Gain Ramp Switch", DA7219_HP_L_CTRL, 674 DA7219_HP_R_CTRL, DA7219_HP_L_AMP_RAMP_EN_SHIFT, 675 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 676 SOC_DOUBLE_R("Headphone ZC Gain Switch", DA7219_HP_L_CTRL, 677 DA7219_HP_R_CTRL, DA7219_HP_L_AMP_ZC_EN_SHIFT, 678 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 679}; 680 681 682/* 683 * DAPM Mux Controls 684 */ 685 686static const char * const da7219_out_sel_txt[] = { 687 "ADC", "Tone Generator", "DAIL", "DAIR" 688}; 689 690static const struct soc_enum da7219_out_dail_sel = 691 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI, 692 DA7219_DAI_L_SRC_SHIFT, 693 DA7219_OUT_SRC_MAX, 694 da7219_out_sel_txt); 695 696static const struct snd_kcontrol_new da7219_out_dail_sel_mux = 697 SOC_DAPM_ENUM("Out DAIL Mux", da7219_out_dail_sel); 698 699static const struct soc_enum da7219_out_dair_sel = 700 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI, 701 DA7219_DAI_R_SRC_SHIFT, 702 DA7219_OUT_SRC_MAX, 703 da7219_out_sel_txt); 704 705static const struct snd_kcontrol_new da7219_out_dair_sel_mux = 706 SOC_DAPM_ENUM("Out DAIR Mux", da7219_out_dair_sel); 707 708static const struct soc_enum da7219_out_dacl_sel = 709 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC, 710 DA7219_DAC_L_SRC_SHIFT, 711 DA7219_OUT_SRC_MAX, 712 da7219_out_sel_txt); 713 714static const struct snd_kcontrol_new da7219_out_dacl_sel_mux = 715 SOC_DAPM_ENUM("Out DACL Mux", da7219_out_dacl_sel); 716 717static const struct soc_enum da7219_out_dacr_sel = 718 SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC, 719 DA7219_DAC_R_SRC_SHIFT, 720 DA7219_OUT_SRC_MAX, 721 da7219_out_sel_txt); 722 723static const struct snd_kcontrol_new da7219_out_dacr_sel_mux = 724 SOC_DAPM_ENUM("Out DACR Mux", da7219_out_dacr_sel); 725 726 727/* 728 * DAPM Mixer Controls 729 */ 730 731static const struct snd_kcontrol_new da7219_mixin_controls[] = { 732 SOC_DAPM_SINGLE("Mic Switch", DA7219_MIXIN_L_SELECT, 733 DA7219_MIXIN_L_MIX_SELECT_SHIFT, 734 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 735}; 736 737static const struct snd_kcontrol_new da7219_mixout_l_controls[] = { 738 SOC_DAPM_SINGLE("DACL Switch", DA7219_MIXOUT_L_SELECT, 739 DA7219_MIXOUT_L_MIX_SELECT_SHIFT, 740 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 741}; 742 743static const struct snd_kcontrol_new da7219_mixout_r_controls[] = { 744 SOC_DAPM_SINGLE("DACR Switch", DA7219_MIXOUT_R_SELECT, 745 DA7219_MIXOUT_R_MIX_SELECT_SHIFT, 746 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), 747}; 748 749#define DA7219_DMIX_ST_CTRLS(reg) \ 750 SOC_DAPM_SINGLE("Out FilterL Switch", reg, \ 751 DA7219_DMIX_ST_SRC_OUTFILT1L_SHIFT, \ 752 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), \ 753 SOC_DAPM_SINGLE("Out FilterR Switch", reg, \ 754 DA7219_DMIX_ST_SRC_OUTFILT1R_SHIFT, \ 755 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT), \ 756 SOC_DAPM_SINGLE("Sidetone Switch", reg, \ 757 DA7219_DMIX_ST_SRC_SIDETONE_SHIFT, \ 758 DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT) \ 759 760static const struct snd_kcontrol_new da7219_st_out_filtl_mix_controls[] = { 761 DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1L), 762}; 763 764static const struct snd_kcontrol_new da7219_st_out_filtr_mix_controls[] = { 765 DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1R), 766}; 767 768 769/* 770 * DAPM Events 771 */ 772 773static int da7219_mic_pga_event(struct snd_soc_dapm_widget *w, 774 struct snd_kcontrol *kcontrol, int event) 775{ 776 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 777 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 778 779 switch (event) { 780 case SND_SOC_DAPM_POST_PMU: 781 if (da7219->micbias_on_event) { 782 /* 783 * Delay only for first capture after bias enabled to 784 * avoid possible DC offset related noise. 785 */ 786 da7219->micbias_on_event = false; 787 msleep(da7219->mic_pga_delay); 788 } 789 break; 790 default: 791 break; 792 } 793 794 return 0; 795} 796 797static int da7219_dai_event(struct snd_soc_dapm_widget *w, 798 struct snd_kcontrol *kcontrol, int event) 799{ 800 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 801 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 802 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX]; 803 u8 pll_ctrl, pll_status; 804 int i = 0, ret; 805 bool srm_lock = false; 806 807 switch (event) { 808 case SND_SOC_DAPM_PRE_PMU: 809 if (da7219->master) { 810 /* Enable DAI clks for master mode */ 811 if (bclk) { 812 ret = clk_prepare_enable(bclk); 813 if (ret) { 814 dev_err(component->dev, 815 "Failed to enable DAI clks\n"); 816 return ret; 817 } 818 } else { 819 snd_soc_component_update_bits(component, 820 DA7219_DAI_CLK_MODE, 821 DA7219_DAI_CLK_EN_MASK, 822 DA7219_DAI_CLK_EN_MASK); 823 } 824 } 825 826 /* PC synchronised to DAI */ 827 snd_soc_component_update_bits(component, DA7219_PC_COUNT, 828 DA7219_PC_FREERUN_MASK, 0); 829 830 /* Slave mode, if SRM not enabled no need for status checks */ 831 pll_ctrl = snd_soc_component_read(component, DA7219_PLL_CTRL); 832 if ((pll_ctrl & DA7219_PLL_MODE_MASK) != DA7219_PLL_MODE_SRM) 833 return 0; 834 835 /* Check SRM has locked */ 836 do { 837 pll_status = snd_soc_component_read(component, DA7219_PLL_SRM_STS); 838 if (pll_status & DA7219_PLL_SRM_STS_SRM_LOCK) { 839 srm_lock = true; 840 } else { 841 ++i; 842 msleep(50); 843 } 844 } while ((i < DA7219_SRM_CHECK_RETRIES) && (!srm_lock)); 845 846 if (!srm_lock) 847 dev_warn(component->dev, "SRM failed to lock\n"); 848 849 return 0; 850 case SND_SOC_DAPM_POST_PMD: 851 /* PC free-running */ 852 snd_soc_component_update_bits(component, DA7219_PC_COUNT, 853 DA7219_PC_FREERUN_MASK, 854 DA7219_PC_FREERUN_MASK); 855 856 /* Disable DAI clks if in master mode */ 857 if (da7219->master) { 858 if (bclk) 859 clk_disable_unprepare(bclk); 860 else 861 snd_soc_component_update_bits(component, 862 DA7219_DAI_CLK_MODE, 863 DA7219_DAI_CLK_EN_MASK, 864 0); 865 } 866 867 return 0; 868 default: 869 return -EINVAL; 870 } 871} 872 873static int da7219_settling_event(struct snd_soc_dapm_widget *w, 874 struct snd_kcontrol *kcontrol, int event) 875{ 876 switch (event) { 877 case SND_SOC_DAPM_POST_PMU: 878 case SND_SOC_DAPM_POST_PMD: 879 msleep(DA7219_SETTLING_DELAY); 880 break; 881 default: 882 break; 883 } 884 885 return 0; 886} 887 888static int da7219_mixout_event(struct snd_soc_dapm_widget *w, 889 struct snd_kcontrol *kcontrol, int event) 890{ 891 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 892 u8 hp_ctrl, min_gain_mask; 893 894 switch (w->reg) { 895 case DA7219_MIXOUT_L_CTRL: 896 hp_ctrl = DA7219_HP_L_CTRL; 897 min_gain_mask = DA7219_HP_L_AMP_MIN_GAIN_EN_MASK; 898 break; 899 case DA7219_MIXOUT_R_CTRL: 900 hp_ctrl = DA7219_HP_R_CTRL; 901 min_gain_mask = DA7219_HP_R_AMP_MIN_GAIN_EN_MASK; 902 break; 903 default: 904 return -EINVAL; 905 } 906 907 switch (event) { 908 case SND_SOC_DAPM_PRE_PMD: 909 /* Enable minimum gain on HP to avoid pops */ 910 snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask, 911 min_gain_mask); 912 913 msleep(DA7219_MIN_GAIN_DELAY); 914 915 break; 916 case SND_SOC_DAPM_POST_PMU: 917 /* Remove minimum gain on HP */ 918 snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask, 0); 919 920 break; 921 } 922 923 return 0; 924} 925 926static int da7219_gain_ramp_event(struct snd_soc_dapm_widget *w, 927 struct snd_kcontrol *kcontrol, int event) 928{ 929 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 930 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 931 932 switch (event) { 933 case SND_SOC_DAPM_PRE_PMU: 934 case SND_SOC_DAPM_PRE_PMD: 935 /* Ensure nominal gain ramping for DAPM sequence */ 936 da7219->gain_ramp_ctrl = 937 snd_soc_component_read(component, DA7219_GAIN_RAMP_CTRL); 938 snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL, 939 DA7219_GAIN_RAMP_RATE_NOMINAL); 940 break; 941 case SND_SOC_DAPM_POST_PMU: 942 case SND_SOC_DAPM_POST_PMD: 943 /* Restore previous gain ramp settings */ 944 snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL, 945 da7219->gain_ramp_ctrl); 946 break; 947 } 948 949 return 0; 950} 951 952 953/* 954 * DAPM Widgets 955 */ 956 957static const struct snd_soc_dapm_widget da7219_dapm_widgets[] = { 958 /* Input Supplies */ 959 SND_SOC_DAPM_SUPPLY("Mic Bias", DA7219_MICBIAS_CTRL, 960 DA7219_MICBIAS1_EN_SHIFT, DA7219_NO_INVERT, 961 NULL, 0), 962 963 /* Inputs */ 964 SND_SOC_DAPM_INPUT("MIC"), 965 966 /* Input PGAs */ 967 SND_SOC_DAPM_PGA_E("Mic PGA", DA7219_MIC_1_CTRL, 968 DA7219_MIC_1_AMP_EN_SHIFT, DA7219_NO_INVERT, 969 NULL, 0, da7219_mic_pga_event, SND_SOC_DAPM_POST_PMU), 970 SND_SOC_DAPM_PGA_E("Mixin PGA", DA7219_MIXIN_L_CTRL, 971 DA7219_MIXIN_L_AMP_EN_SHIFT, DA7219_NO_INVERT, 972 NULL, 0, da7219_settling_event, SND_SOC_DAPM_POST_PMU), 973 974 /* Input Filters */ 975 SND_SOC_DAPM_ADC("ADC", NULL, DA7219_ADC_L_CTRL, DA7219_ADC_L_EN_SHIFT, 976 DA7219_NO_INVERT), 977 978 /* Tone Generator */ 979 SND_SOC_DAPM_SIGGEN("TONE"), 980 SND_SOC_DAPM_PGA("Tone Generator", DA7219_TONE_GEN_CFG1, 981 DA7219_START_STOPN_SHIFT, DA7219_NO_INVERT, NULL, 0), 982 983 /* Sidetone Input */ 984 SND_SOC_DAPM_ADC("Sidetone Filter", NULL, DA7219_SIDETONE_CTRL, 985 DA7219_SIDETONE_EN_SHIFT, DA7219_NO_INVERT), 986 987 /* Input Mixer Supply */ 988 SND_SOC_DAPM_SUPPLY("Mixer In Supply", DA7219_MIXIN_L_CTRL, 989 DA7219_MIXIN_L_MIX_EN_SHIFT, DA7219_NO_INVERT, 990 NULL, 0), 991 992 /* Input Mixer */ 993 SND_SOC_DAPM_MIXER("Mixer In", SND_SOC_NOPM, 0, 0, 994 da7219_mixin_controls, 995 ARRAY_SIZE(da7219_mixin_controls)), 996 997 /* Input Muxes */ 998 SND_SOC_DAPM_MUX("Out DAIL Mux", SND_SOC_NOPM, 0, 0, 999 &da7219_out_dail_sel_mux), 1000 SND_SOC_DAPM_MUX("Out DAIR Mux", SND_SOC_NOPM, 0, 0, 1001 &da7219_out_dair_sel_mux), 1002 1003 /* DAI Supply */ 1004 SND_SOC_DAPM_SUPPLY("DAI", DA7219_DAI_CTRL, DA7219_DAI_EN_SHIFT, 1005 DA7219_NO_INVERT, da7219_dai_event, 1006 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 1007 1008 /* DAI */ 1009 SND_SOC_DAPM_AIF_OUT("DAIOUT", "Capture", 0, DA7219_DAI_TDM_CTRL, 1010 DA7219_DAI_OE_SHIFT, DA7219_NO_INVERT), 1011 SND_SOC_DAPM_AIF_IN("DAIIN", "Playback", 0, SND_SOC_NOPM, 0, 0), 1012 1013 /* Output Muxes */ 1014 SND_SOC_DAPM_MUX("Out DACL Mux", SND_SOC_NOPM, 0, 0, 1015 &da7219_out_dacl_sel_mux), 1016 SND_SOC_DAPM_MUX("Out DACR Mux", SND_SOC_NOPM, 0, 0, 1017 &da7219_out_dacr_sel_mux), 1018 1019 /* Output Mixers */ 1020 SND_SOC_DAPM_MIXER("Mixer Out FilterL", SND_SOC_NOPM, 0, 0, 1021 da7219_mixout_l_controls, 1022 ARRAY_SIZE(da7219_mixout_l_controls)), 1023 SND_SOC_DAPM_MIXER("Mixer Out FilterR", SND_SOC_NOPM, 0, 0, 1024 da7219_mixout_r_controls, 1025 ARRAY_SIZE(da7219_mixout_r_controls)), 1026 1027 /* Sidetone Mixers */ 1028 SND_SOC_DAPM_MIXER("ST Mixer Out FilterL", SND_SOC_NOPM, 0, 0, 1029 da7219_st_out_filtl_mix_controls, 1030 ARRAY_SIZE(da7219_st_out_filtl_mix_controls)), 1031 SND_SOC_DAPM_MIXER("ST Mixer Out FilterR", SND_SOC_NOPM, 0, 1032 0, da7219_st_out_filtr_mix_controls, 1033 ARRAY_SIZE(da7219_st_out_filtr_mix_controls)), 1034 1035 /* DACs */ 1036 SND_SOC_DAPM_DAC_E("DACL", NULL, DA7219_DAC_L_CTRL, 1037 DA7219_DAC_L_EN_SHIFT, DA7219_NO_INVERT, 1038 da7219_settling_event, 1039 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1040 SND_SOC_DAPM_DAC_E("DACR", NULL, DA7219_DAC_R_CTRL, 1041 DA7219_DAC_R_EN_SHIFT, DA7219_NO_INVERT, 1042 da7219_settling_event, 1043 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1044 1045 /* Output PGAs */ 1046 SND_SOC_DAPM_PGA_E("Mixout Left PGA", DA7219_MIXOUT_L_CTRL, 1047 DA7219_MIXOUT_L_AMP_EN_SHIFT, DA7219_NO_INVERT, 1048 NULL, 0, da7219_mixout_event, 1049 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1050 SND_SOC_DAPM_PGA_E("Mixout Right PGA", DA7219_MIXOUT_R_CTRL, 1051 DA7219_MIXOUT_R_AMP_EN_SHIFT, DA7219_NO_INVERT, 1052 NULL, 0, da7219_mixout_event, 1053 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1054 SND_SOC_DAPM_SUPPLY_S("Headphone Left PGA", 1, DA7219_HP_L_CTRL, 1055 DA7219_HP_L_AMP_EN_SHIFT, DA7219_NO_INVERT, 1056 da7219_settling_event, 1057 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1058 SND_SOC_DAPM_SUPPLY_S("Headphone Right PGA", 1, DA7219_HP_R_CTRL, 1059 DA7219_HP_R_AMP_EN_SHIFT, DA7219_NO_INVERT, 1060 da7219_settling_event, 1061 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 1062 1063 /* Output Supplies */ 1064 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 0, DA7219_CP_CTRL, 1065 DA7219_CP_EN_SHIFT, DA7219_NO_INVERT, 1066 da7219_settling_event, 1067 SND_SOC_DAPM_POST_PMU), 1068 1069 /* Outputs */ 1070 SND_SOC_DAPM_OUTPUT("HPL"), 1071 SND_SOC_DAPM_OUTPUT("HPR"), 1072 1073 /* Pre/Post Power */ 1074 SND_SOC_DAPM_PRE("Pre Power Gain Ramp", da7219_gain_ramp_event), 1075 SND_SOC_DAPM_POST("Post Power Gain Ramp", da7219_gain_ramp_event), 1076}; 1077 1078 1079/* 1080 * DAPM Mux Routes 1081 */ 1082 1083#define DA7219_OUT_DAI_MUX_ROUTES(name) \ 1084 {name, "ADC", "Mixer In"}, \ 1085 {name, "Tone Generator", "Tone Generator"}, \ 1086 {name, "DAIL", "DAIOUT"}, \ 1087 {name, "DAIR", "DAIOUT"} 1088 1089#define DA7219_OUT_DAC_MUX_ROUTES(name) \ 1090 {name, "ADC", "Mixer In"}, \ 1091 {name, "Tone Generator", "Tone Generator"}, \ 1092 {name, "DAIL", "DAIIN"}, \ 1093 {name, "DAIR", "DAIIN"} 1094 1095/* 1096 * DAPM Mixer Routes 1097 */ 1098 1099#define DA7219_DMIX_ST_ROUTES(name) \ 1100 {name, "Out FilterL Switch", "Mixer Out FilterL"}, \ 1101 {name, "Out FilterR Switch", "Mixer Out FilterR"}, \ 1102 {name, "Sidetone Switch", "Sidetone Filter"} 1103 1104 1105/* 1106 * DAPM audio route definition 1107 */ 1108 1109static const struct snd_soc_dapm_route da7219_audio_map[] = { 1110 /* Input paths */ 1111 {"MIC", NULL, "Mic Bias"}, 1112 {"Mic PGA", NULL, "MIC"}, 1113 {"Mixin PGA", NULL, "Mic PGA"}, 1114 {"ADC", NULL, "Mixin PGA"}, 1115 1116 {"Mixer In", NULL, "Mixer In Supply"}, 1117 {"Mixer In", "Mic Switch", "ADC"}, 1118 1119 {"Sidetone Filter", NULL, "Mixer In"}, 1120 1121 {"Tone Generator", NULL, "TONE"}, 1122 1123 DA7219_OUT_DAI_MUX_ROUTES("Out DAIL Mux"), 1124 DA7219_OUT_DAI_MUX_ROUTES("Out DAIR Mux"), 1125 1126 {"DAIOUT", NULL, "Out DAIL Mux"}, 1127 {"DAIOUT", NULL, "Out DAIR Mux"}, 1128 {"DAIOUT", NULL, "DAI"}, 1129 1130 /* Output paths */ 1131 {"DAIIN", NULL, "DAI"}, 1132 1133 DA7219_OUT_DAC_MUX_ROUTES("Out DACL Mux"), 1134 DA7219_OUT_DAC_MUX_ROUTES("Out DACR Mux"), 1135 1136 {"Mixer Out FilterL", "DACL Switch", "Out DACL Mux"}, 1137 {"Mixer Out FilterR", "DACR Switch", "Out DACR Mux"}, 1138 1139 DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterL"), 1140 DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterR"), 1141 1142 {"DACL", NULL, "ST Mixer Out FilterL"}, 1143 {"DACR", NULL, "ST Mixer Out FilterR"}, 1144 1145 {"Mixout Left PGA", NULL, "DACL"}, 1146 {"Mixout Right PGA", NULL, "DACR"}, 1147 1148 {"HPL", NULL, "Mixout Left PGA"}, 1149 {"HPR", NULL, "Mixout Right PGA"}, 1150 1151 {"HPL", NULL, "Headphone Left PGA"}, 1152 {"HPR", NULL, "Headphone Right PGA"}, 1153 1154 {"HPL", NULL, "Charge Pump"}, 1155 {"HPR", NULL, "Charge Pump"}, 1156}; 1157 1158 1159/* 1160 * DAI operations 1161 */ 1162 1163static int da7219_set_dai_sysclk(struct snd_soc_dai *codec_dai, 1164 int clk_id, unsigned int freq, int dir) 1165{ 1166 struct snd_soc_component *component = codec_dai->component; 1167 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1168 int ret = 0; 1169 1170 if ((da7219->clk_src == clk_id) && (da7219->mclk_rate == freq)) 1171 return 0; 1172 1173 if ((freq < 2000000) || (freq > 54000000)) { 1174 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n", 1175 freq); 1176 return -EINVAL; 1177 } 1178 1179 mutex_lock(&da7219->pll_lock); 1180 1181 switch (clk_id) { 1182 case DA7219_CLKSRC_MCLK_SQR: 1183 snd_soc_component_update_bits(component, DA7219_PLL_CTRL, 1184 DA7219_PLL_MCLK_SQR_EN_MASK, 1185 DA7219_PLL_MCLK_SQR_EN_MASK); 1186 break; 1187 case DA7219_CLKSRC_MCLK: 1188 snd_soc_component_update_bits(component, DA7219_PLL_CTRL, 1189 DA7219_PLL_MCLK_SQR_EN_MASK, 0); 1190 break; 1191 default: 1192 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id); 1193 mutex_unlock(&da7219->pll_lock); 1194 return -EINVAL; 1195 } 1196 1197 da7219->clk_src = clk_id; 1198 1199 if (da7219->mclk) { 1200 freq = clk_round_rate(da7219->mclk, freq); 1201 ret = clk_set_rate(da7219->mclk, freq); 1202 if (ret) { 1203 dev_err(codec_dai->dev, "Failed to set clock rate %d\n", 1204 freq); 1205 mutex_unlock(&da7219->pll_lock); 1206 return ret; 1207 } 1208 } 1209 1210 da7219->mclk_rate = freq; 1211 1212 mutex_unlock(&da7219->pll_lock); 1213 1214 return 0; 1215} 1216 1217int da7219_set_pll(struct snd_soc_component *component, int source, unsigned int fout) 1218{ 1219 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1220 1221 u8 pll_ctrl, indiv_bits, indiv; 1222 u8 pll_frac_top, pll_frac_bot, pll_integer; 1223 u32 freq_ref; 1224 u64 frac_div; 1225 1226 /* Verify 2MHz - 54MHz MCLK provided, and set input divider */ 1227 if (da7219->mclk_rate < 2000000) { 1228 dev_err(component->dev, "PLL input clock %d below valid range\n", 1229 da7219->mclk_rate); 1230 return -EINVAL; 1231 } else if (da7219->mclk_rate <= 4500000) { 1232 indiv_bits = DA7219_PLL_INDIV_2_TO_4_5_MHZ; 1233 indiv = DA7219_PLL_INDIV_2_TO_4_5_MHZ_VAL; 1234 } else if (da7219->mclk_rate <= 9000000) { 1235 indiv_bits = DA7219_PLL_INDIV_4_5_TO_9_MHZ; 1236 indiv = DA7219_PLL_INDIV_4_5_TO_9_MHZ_VAL; 1237 } else if (da7219->mclk_rate <= 18000000) { 1238 indiv_bits = DA7219_PLL_INDIV_9_TO_18_MHZ; 1239 indiv = DA7219_PLL_INDIV_9_TO_18_MHZ_VAL; 1240 } else if (da7219->mclk_rate <= 36000000) { 1241 indiv_bits = DA7219_PLL_INDIV_18_TO_36_MHZ; 1242 indiv = DA7219_PLL_INDIV_18_TO_36_MHZ_VAL; 1243 } else if (da7219->mclk_rate <= 54000000) { 1244 indiv_bits = DA7219_PLL_INDIV_36_TO_54_MHZ; 1245 indiv = DA7219_PLL_INDIV_36_TO_54_MHZ_VAL; 1246 } else { 1247 dev_err(component->dev, "PLL input clock %d above valid range\n", 1248 da7219->mclk_rate); 1249 return -EINVAL; 1250 } 1251 freq_ref = (da7219->mclk_rate / indiv); 1252 pll_ctrl = indiv_bits; 1253 1254 /* Configure PLL */ 1255 switch (source) { 1256 case DA7219_SYSCLK_MCLK: 1257 pll_ctrl |= DA7219_PLL_MODE_BYPASS; 1258 snd_soc_component_update_bits(component, DA7219_PLL_CTRL, 1259 DA7219_PLL_INDIV_MASK | 1260 DA7219_PLL_MODE_MASK, pll_ctrl); 1261 return 0; 1262 case DA7219_SYSCLK_PLL: 1263 pll_ctrl |= DA7219_PLL_MODE_NORMAL; 1264 break; 1265 case DA7219_SYSCLK_PLL_SRM: 1266 pll_ctrl |= DA7219_PLL_MODE_SRM; 1267 break; 1268 default: 1269 dev_err(component->dev, "Invalid PLL config\n"); 1270 return -EINVAL; 1271 } 1272 1273 /* Calculate dividers for PLL */ 1274 pll_integer = fout / freq_ref; 1275 frac_div = (u64)(fout % freq_ref) * 8192ULL; 1276 do_div(frac_div, freq_ref); 1277 pll_frac_top = (frac_div >> DA7219_BYTE_SHIFT) & DA7219_BYTE_MASK; 1278 pll_frac_bot = (frac_div) & DA7219_BYTE_MASK; 1279 1280 /* Write PLL config & dividers */ 1281 snd_soc_component_write(component, DA7219_PLL_FRAC_TOP, pll_frac_top); 1282 snd_soc_component_write(component, DA7219_PLL_FRAC_BOT, pll_frac_bot); 1283 snd_soc_component_write(component, DA7219_PLL_INTEGER, pll_integer); 1284 snd_soc_component_update_bits(component, DA7219_PLL_CTRL, 1285 DA7219_PLL_INDIV_MASK | DA7219_PLL_MODE_MASK, 1286 pll_ctrl); 1287 1288 return 0; 1289} 1290 1291static int da7219_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 1292 int source, unsigned int fref, unsigned int fout) 1293{ 1294 struct snd_soc_component *component = codec_dai->component; 1295 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1296 int ret; 1297 1298 mutex_lock(&da7219->pll_lock); 1299 ret = da7219_set_pll(component, source, fout); 1300 mutex_unlock(&da7219->pll_lock); 1301 1302 return ret; 1303} 1304 1305static int da7219_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 1306{ 1307 struct snd_soc_component *component = codec_dai->component; 1308 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1309 u8 dai_clk_mode = 0, dai_ctrl = 0; 1310 1311 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1312 case SND_SOC_DAIFMT_CBM_CFM: 1313 da7219->master = true; 1314 break; 1315 case SND_SOC_DAIFMT_CBS_CFS: 1316 da7219->master = false; 1317 break; 1318 default: 1319 return -EINVAL; 1320 } 1321 1322 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1323 case SND_SOC_DAIFMT_I2S: 1324 case SND_SOC_DAIFMT_LEFT_J: 1325 case SND_SOC_DAIFMT_RIGHT_J: 1326 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1327 case SND_SOC_DAIFMT_NB_NF: 1328 break; 1329 case SND_SOC_DAIFMT_NB_IF: 1330 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; 1331 break; 1332 case SND_SOC_DAIFMT_IB_NF: 1333 dai_clk_mode |= DA7219_DAI_CLK_POL_INV; 1334 break; 1335 case SND_SOC_DAIFMT_IB_IF: 1336 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | 1337 DA7219_DAI_CLK_POL_INV; 1338 break; 1339 default: 1340 return -EINVAL; 1341 } 1342 break; 1343 case SND_SOC_DAIFMT_DSP_B: 1344 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1345 case SND_SOC_DAIFMT_NB_NF: 1346 dai_clk_mode |= DA7219_DAI_CLK_POL_INV; 1347 break; 1348 case SND_SOC_DAIFMT_NB_IF: 1349 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | 1350 DA7219_DAI_CLK_POL_INV; 1351 break; 1352 case SND_SOC_DAIFMT_IB_NF: 1353 break; 1354 case SND_SOC_DAIFMT_IB_IF: 1355 dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; 1356 break; 1357 default: 1358 return -EINVAL; 1359 } 1360 break; 1361 default: 1362 return -EINVAL; 1363 } 1364 1365 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1366 case SND_SOC_DAIFMT_I2S: 1367 dai_ctrl |= DA7219_DAI_FORMAT_I2S; 1368 break; 1369 case SND_SOC_DAIFMT_LEFT_J: 1370 dai_ctrl |= DA7219_DAI_FORMAT_LEFT_J; 1371 break; 1372 case SND_SOC_DAIFMT_RIGHT_J: 1373 dai_ctrl |= DA7219_DAI_FORMAT_RIGHT_J; 1374 break; 1375 case SND_SOC_DAIFMT_DSP_B: 1376 dai_ctrl |= DA7219_DAI_FORMAT_DSP; 1377 break; 1378 default: 1379 return -EINVAL; 1380 } 1381 1382 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE, 1383 DA7219_DAI_CLK_POL_MASK | DA7219_DAI_WCLK_POL_MASK, 1384 dai_clk_mode); 1385 snd_soc_component_update_bits(component, DA7219_DAI_CTRL, DA7219_DAI_FORMAT_MASK, 1386 dai_ctrl); 1387 1388 return 0; 1389} 1390 1391static int da7219_set_bclks_per_wclk(struct snd_soc_component *component, 1392 unsigned long factor) 1393{ 1394 u8 bclks_per_wclk; 1395 1396 switch (factor) { 1397 case 32: 1398 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_32; 1399 break; 1400 case 64: 1401 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_64; 1402 break; 1403 case 128: 1404 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_128; 1405 break; 1406 case 256: 1407 bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_256; 1408 break; 1409 default: 1410 return -EINVAL; 1411 } 1412 1413 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE, 1414 DA7219_DAI_BCLKS_PER_WCLK_MASK, 1415 bclks_per_wclk); 1416 1417 return 0; 1418} 1419 1420static int da7219_set_dai_tdm_slot(struct snd_soc_dai *dai, 1421 unsigned int tx_mask, unsigned int rx_mask, 1422 int slots, int slot_width) 1423{ 1424 struct snd_soc_component *component = dai->component; 1425 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1426 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX]; 1427 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX]; 1428 unsigned int ch_mask; 1429 unsigned long sr, bclk_rate; 1430 u8 slot_offset; 1431 u16 offset; 1432 __le16 dai_offset; 1433 u32 frame_size; 1434 int ret; 1435 1436 /* No channels enabled so disable TDM */ 1437 if (!tx_mask) { 1438 snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL, 1439 DA7219_DAI_TDM_CH_EN_MASK | 1440 DA7219_DAI_TDM_MODE_EN_MASK, 0); 1441 da7219->tdm_en = false; 1442 return 0; 1443 } 1444 1445 /* Check we have valid slots */ 1446 slot_offset = ffs(tx_mask) - 1; 1447 ch_mask = (tx_mask >> slot_offset); 1448 if (fls(ch_mask) > DA7219_DAI_TDM_MAX_SLOTS) { 1449 dev_err(component->dev, 1450 "Invalid number of slots, max = %d\n", 1451 DA7219_DAI_TDM_MAX_SLOTS); 1452 return -EINVAL; 1453 } 1454 1455 /* 1456 * Ensure we have a valid offset into the frame, based on slot width 1457 * and slot offset of first slot we're interested in. 1458 */ 1459 offset = slot_offset * slot_width; 1460 if (offset > DA7219_DAI_OFFSET_MAX) { 1461 dev_err(component->dev, "Invalid frame offset %d\n", offset); 1462 return -EINVAL; 1463 } 1464 1465 /* 1466 * If we're master, calculate & validate frame size based on slot info 1467 * provided as we have a limited set of rates available. 1468 */ 1469 if (da7219->master) { 1470 frame_size = slots * slot_width; 1471 1472 if (bclk) { 1473 sr = clk_get_rate(wclk); 1474 bclk_rate = sr * frame_size; 1475 ret = clk_set_rate(bclk, bclk_rate); 1476 if (ret) { 1477 dev_err(component->dev, 1478 "Failed to set TDM BCLK rate %lu: %d\n", 1479 bclk_rate, ret); 1480 return ret; 1481 } 1482 } else { 1483 ret = da7219_set_bclks_per_wclk(component, frame_size); 1484 if (ret) { 1485 dev_err(component->dev, 1486 "Failed to set TDM BCLKs per WCLK %d: %d\n", 1487 frame_size, ret); 1488 return ret; 1489 } 1490 } 1491 } 1492 1493 dai_offset = cpu_to_le16(offset); 1494 regmap_bulk_write(da7219->regmap, DA7219_DAI_OFFSET_LOWER, 1495 &dai_offset, sizeof(dai_offset)); 1496 1497 snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL, 1498 DA7219_DAI_TDM_CH_EN_MASK | 1499 DA7219_DAI_TDM_MODE_EN_MASK, 1500 (ch_mask << DA7219_DAI_TDM_CH_EN_SHIFT) | 1501 DA7219_DAI_TDM_MODE_EN_MASK); 1502 1503 da7219->tdm_en = true; 1504 1505 return 0; 1506} 1507 1508static int da7219_set_sr(struct snd_soc_component *component, 1509 unsigned long rate) 1510{ 1511 u8 fs; 1512 1513 switch (rate) { 1514 case 8000: 1515 fs = DA7219_SR_8000; 1516 break; 1517 case 11025: 1518 fs = DA7219_SR_11025; 1519 break; 1520 case 12000: 1521 fs = DA7219_SR_12000; 1522 break; 1523 case 16000: 1524 fs = DA7219_SR_16000; 1525 break; 1526 case 22050: 1527 fs = DA7219_SR_22050; 1528 break; 1529 case 24000: 1530 fs = DA7219_SR_24000; 1531 break; 1532 case 32000: 1533 fs = DA7219_SR_32000; 1534 break; 1535 case 44100: 1536 fs = DA7219_SR_44100; 1537 break; 1538 case 48000: 1539 fs = DA7219_SR_48000; 1540 break; 1541 case 88200: 1542 fs = DA7219_SR_88200; 1543 break; 1544 case 96000: 1545 fs = DA7219_SR_96000; 1546 break; 1547 default: 1548 return -EINVAL; 1549 } 1550 1551 snd_soc_component_write(component, DA7219_SR, fs); 1552 1553 return 0; 1554} 1555 1556static int da7219_hw_params(struct snd_pcm_substream *substream, 1557 struct snd_pcm_hw_params *params, 1558 struct snd_soc_dai *dai) 1559{ 1560 struct snd_soc_component *component = dai->component; 1561 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1562 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX]; 1563 struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX]; 1564 u8 dai_ctrl = 0; 1565 unsigned int channels; 1566 unsigned long sr, bclk_rate; 1567 int word_len = params_width(params); 1568 int frame_size, ret; 1569 1570 switch (word_len) { 1571 case 16: 1572 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S16_LE; 1573 break; 1574 case 20: 1575 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S20_LE; 1576 break; 1577 case 24: 1578 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S24_LE; 1579 break; 1580 case 32: 1581 dai_ctrl |= DA7219_DAI_WORD_LENGTH_S32_LE; 1582 break; 1583 default: 1584 return -EINVAL; 1585 } 1586 1587 channels = params_channels(params); 1588 if ((channels < 1) || (channels > DA7219_DAI_CH_NUM_MAX)) { 1589 dev_err(component->dev, 1590 "Invalid number of channels, only 1 to %d supported\n", 1591 DA7219_DAI_CH_NUM_MAX); 1592 return -EINVAL; 1593 } 1594 dai_ctrl |= channels << DA7219_DAI_CH_NUM_SHIFT; 1595 1596 sr = params_rate(params); 1597 if (da7219->master && wclk) { 1598 ret = clk_set_rate(wclk, sr); 1599 if (ret) { 1600 dev_err(component->dev, 1601 "Failed to set WCLK SR %lu: %d\n", sr, ret); 1602 return ret; 1603 } 1604 } else { 1605 ret = da7219_set_sr(component, sr); 1606 if (ret) { 1607 dev_err(component->dev, 1608 "Failed to set SR %lu: %d\n", sr, ret); 1609 return ret; 1610 } 1611 } 1612 1613 /* 1614 * If we're master, then we have a limited set of BCLK rates we 1615 * support. For slave mode this isn't the case and the codec can detect 1616 * the BCLK rate automatically. 1617 */ 1618 if (da7219->master && !da7219->tdm_en) { 1619 if ((word_len * DA7219_DAI_CH_NUM_MAX) <= 32) 1620 frame_size = 32; 1621 else 1622 frame_size = 64; 1623 1624 if (bclk) { 1625 bclk_rate = frame_size * sr; 1626 /* 1627 * Rounding the rate here avoids failure trying to set a 1628 * new rate on an already enabled bclk. In that 1629 * instance this will just set the same rate as is 1630 * currently in use, and so should continue without 1631 * problem, as long as the BCLK rate is suitable for the 1632 * desired frame size. 1633 */ 1634 bclk_rate = clk_round_rate(bclk, bclk_rate); 1635 if ((bclk_rate / sr) < frame_size) { 1636 dev_err(component->dev, 1637 "BCLK rate mismatch against frame size"); 1638 return -EINVAL; 1639 } 1640 1641 ret = clk_set_rate(bclk, bclk_rate); 1642 if (ret) { 1643 dev_err(component->dev, 1644 "Failed to set BCLK rate %lu: %d\n", 1645 bclk_rate, ret); 1646 return ret; 1647 } 1648 } else { 1649 ret = da7219_set_bclks_per_wclk(component, frame_size); 1650 if (ret) { 1651 dev_err(component->dev, 1652 "Failed to set BCLKs per WCLK %d: %d\n", 1653 frame_size, ret); 1654 return ret; 1655 } 1656 } 1657 } 1658 1659 snd_soc_component_update_bits(component, DA7219_DAI_CTRL, 1660 DA7219_DAI_WORD_LENGTH_MASK | 1661 DA7219_DAI_CH_NUM_MASK, 1662 dai_ctrl); 1663 1664 return 0; 1665} 1666 1667static const struct snd_soc_dai_ops da7219_dai_ops = { 1668 .hw_params = da7219_hw_params, 1669 .set_sysclk = da7219_set_dai_sysclk, 1670 .set_pll = da7219_set_dai_pll, 1671 .set_fmt = da7219_set_dai_fmt, 1672 .set_tdm_slot = da7219_set_dai_tdm_slot, 1673}; 1674 1675#define DA7219_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1676 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1677 1678#define DA7219_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 1679 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ 1680 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ 1681 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\ 1682 SNDRV_PCM_RATE_96000) 1683 1684static struct snd_soc_dai_driver da7219_dai = { 1685 .name = "da7219-hifi", 1686 .playback = { 1687 .stream_name = "Playback", 1688 .channels_min = 1, 1689 .channels_max = DA7219_DAI_CH_NUM_MAX, 1690 .rates = DA7219_RATES, 1691 .formats = DA7219_FORMATS, 1692 }, 1693 .capture = { 1694 .stream_name = "Capture", 1695 .channels_min = 1, 1696 .channels_max = DA7219_DAI_CH_NUM_MAX, 1697 .rates = DA7219_RATES, 1698 .formats = DA7219_FORMATS, 1699 }, 1700 .ops = &da7219_dai_ops, 1701 .symmetric_rate = 1, 1702 .symmetric_channels = 1, 1703 .symmetric_sample_bits = 1, 1704}; 1705 1706 1707/* 1708 * DT/ACPI 1709 */ 1710 1711#ifdef CONFIG_OF 1712static const struct of_device_id da7219_of_match[] = { 1713 { .compatible = "dlg,da7219", }, 1714 { } 1715}; 1716MODULE_DEVICE_TABLE(of, da7219_of_match); 1717#endif 1718 1719#ifdef CONFIG_ACPI 1720static const struct acpi_device_id da7219_acpi_match[] = { 1721 { .id = "DLGS7219", }, 1722 { } 1723}; 1724MODULE_DEVICE_TABLE(acpi, da7219_acpi_match); 1725#endif 1726 1727static enum da7219_micbias_voltage 1728 da7219_fw_micbias_lvl(struct device *dev, u32 val) 1729{ 1730 switch (val) { 1731 case 1600: 1732 return DA7219_MICBIAS_1_6V; 1733 case 1800: 1734 return DA7219_MICBIAS_1_8V; 1735 case 2000: 1736 return DA7219_MICBIAS_2_0V; 1737 case 2200: 1738 return DA7219_MICBIAS_2_2V; 1739 case 2400: 1740 return DA7219_MICBIAS_2_4V; 1741 case 2600: 1742 return DA7219_MICBIAS_2_6V; 1743 default: 1744 dev_warn(dev, "Invalid micbias level"); 1745 return DA7219_MICBIAS_2_2V; 1746 } 1747} 1748 1749static enum da7219_mic_amp_in_sel 1750 da7219_fw_mic_amp_in_sel(struct device *dev, const char *str) 1751{ 1752 if (!strcmp(str, "diff")) { 1753 return DA7219_MIC_AMP_IN_SEL_DIFF; 1754 } else if (!strcmp(str, "se_p")) { 1755 return DA7219_MIC_AMP_IN_SEL_SE_P; 1756 } else if (!strcmp(str, "se_n")) { 1757 return DA7219_MIC_AMP_IN_SEL_SE_N; 1758 } else { 1759 dev_warn(dev, "Invalid mic input type selection"); 1760 return DA7219_MIC_AMP_IN_SEL_DIFF; 1761 } 1762} 1763 1764static struct da7219_pdata *da7219_fw_to_pdata(struct device *dev) 1765{ 1766 struct da7219_pdata *pdata; 1767 const char *of_str; 1768 u32 of_val32; 1769 1770 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 1771 if (!pdata) 1772 return NULL; 1773 1774 pdata->wakeup_source = device_property_read_bool(dev, "wakeup-source"); 1775 1776 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX] = "da7219-dai-wclk"; 1777 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX] = "da7219-dai-bclk"; 1778 if (device_property_read_string_array(dev, "clock-output-names", 1779 pdata->dai_clk_names, 1780 DA7219_DAI_NUM_CLKS) < 0) 1781 dev_warn(dev, "Using default DAI clk names: %s, %s\n", 1782 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX], 1783 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX]); 1784 1785 if (device_property_read_u32(dev, "dlg,micbias-lvl", &of_val32) >= 0) 1786 pdata->micbias_lvl = da7219_fw_micbias_lvl(dev, of_val32); 1787 else 1788 pdata->micbias_lvl = DA7219_MICBIAS_2_2V; 1789 1790 if (!device_property_read_string(dev, "dlg,mic-amp-in-sel", &of_str)) 1791 pdata->mic_amp_in_sel = da7219_fw_mic_amp_in_sel(dev, of_str); 1792 else 1793 pdata->mic_amp_in_sel = DA7219_MIC_AMP_IN_SEL_DIFF; 1794 1795 return pdata; 1796} 1797 1798 1799/* 1800 * Codec driver functions 1801 */ 1802 1803static int da7219_set_bias_level(struct snd_soc_component *component, 1804 enum snd_soc_bias_level level) 1805{ 1806 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1807 int ret; 1808 1809 switch (level) { 1810 case SND_SOC_BIAS_ON: 1811 break; 1812 case SND_SOC_BIAS_PREPARE: 1813 /* Enable MCLK for transition to ON state */ 1814 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) { 1815 if (da7219->mclk) { 1816 ret = clk_prepare_enable(da7219->mclk); 1817 if (ret) { 1818 dev_err(component->dev, 1819 "Failed to enable mclk\n"); 1820 return ret; 1821 } 1822 } 1823 } 1824 1825 break; 1826 case SND_SOC_BIAS_STANDBY: 1827 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) 1828 /* Master bias */ 1829 snd_soc_component_update_bits(component, DA7219_REFERENCES, 1830 DA7219_BIAS_EN_MASK, 1831 DA7219_BIAS_EN_MASK); 1832 1833 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE) { 1834 /* Remove MCLK */ 1835 if (da7219->mclk) 1836 clk_disable_unprepare(da7219->mclk); 1837 } 1838 break; 1839 case SND_SOC_BIAS_OFF: 1840 /* Only disable master bias if we're not a wake-up source */ 1841 if (!da7219->wakeup_source) 1842 snd_soc_component_update_bits(component, DA7219_REFERENCES, 1843 DA7219_BIAS_EN_MASK, 0); 1844 1845 break; 1846 } 1847 1848 return 0; 1849} 1850 1851static const char *da7219_supply_names[DA7219_NUM_SUPPLIES] = { 1852 [DA7219_SUPPLY_VDD] = "VDD", 1853 [DA7219_SUPPLY_VDDMIC] = "VDDMIC", 1854 [DA7219_SUPPLY_VDDIO] = "VDDIO", 1855}; 1856 1857static int da7219_handle_supplies(struct snd_soc_component *component, 1858 u8 *io_voltage_lvl) 1859{ 1860 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 1861 struct regulator *vddio; 1862 int i, ret; 1863 1864 /* Get required supplies */ 1865 for (i = 0; i < DA7219_NUM_SUPPLIES; ++i) 1866 da7219->supplies[i].supply = da7219_supply_names[i]; 1867 1868 ret = regulator_bulk_get(component->dev, DA7219_NUM_SUPPLIES, 1869 da7219->supplies); 1870 if (ret) { 1871 dev_err(component->dev, "Failed to get supplies"); 1872 return ret; 1873 } 1874 1875 /* Default to upper range */ 1876 *io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_2_5V_3_6V; 1877 1878 /* Determine VDDIO voltage provided */ 1879 vddio = da7219->supplies[DA7219_SUPPLY_VDDIO].consumer; 1880 ret = regulator_get_voltage(vddio); 1881 if (ret < 1200000) 1882 dev_warn(component->dev, "Invalid VDDIO voltage\n"); 1883 else if (ret < 2800000) 1884 *io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_1_2V_2_8V; 1885 1886 /* Enable main supplies */ 1887 ret = regulator_bulk_enable(DA7219_NUM_SUPPLIES, da7219->supplies); 1888 if (ret) { 1889 dev_err(component->dev, "Failed to enable supplies"); 1890 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies); 1891 return ret; 1892 } 1893 1894 return 0; 1895} 1896 1897#ifdef CONFIG_COMMON_CLK 1898static int da7219_wclk_prepare(struct clk_hw *hw) 1899{ 1900 struct da7219_priv *da7219 = 1901 container_of(hw, struct da7219_priv, 1902 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1903 struct snd_soc_component *component = da7219->component; 1904 1905 if (!da7219->master) 1906 return -EINVAL; 1907 1908 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE, 1909 DA7219_DAI_CLK_EN_MASK, 1910 DA7219_DAI_CLK_EN_MASK); 1911 1912 return 0; 1913} 1914 1915static void da7219_wclk_unprepare(struct clk_hw *hw) 1916{ 1917 struct da7219_priv *da7219 = 1918 container_of(hw, struct da7219_priv, 1919 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1920 struct snd_soc_component *component = da7219->component; 1921 1922 if (!da7219->master) 1923 return; 1924 1925 snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE, 1926 DA7219_DAI_CLK_EN_MASK, 0); 1927} 1928 1929static int da7219_wclk_is_prepared(struct clk_hw *hw) 1930{ 1931 struct da7219_priv *da7219 = 1932 container_of(hw, struct da7219_priv, 1933 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1934 struct snd_soc_component *component = da7219->component; 1935 u8 clk_reg; 1936 1937 if (!da7219->master) 1938 return -EINVAL; 1939 1940 clk_reg = snd_soc_component_read(component, DA7219_DAI_CLK_MODE); 1941 1942 return !!(clk_reg & DA7219_DAI_CLK_EN_MASK); 1943} 1944 1945static unsigned long da7219_wclk_recalc_rate(struct clk_hw *hw, 1946 unsigned long parent_rate) 1947{ 1948 struct da7219_priv *da7219 = 1949 container_of(hw, struct da7219_priv, 1950 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1951 struct snd_soc_component *component = da7219->component; 1952 u8 fs = snd_soc_component_read(component, DA7219_SR); 1953 1954 switch (fs & DA7219_SR_MASK) { 1955 case DA7219_SR_8000: 1956 return 8000; 1957 case DA7219_SR_11025: 1958 return 11025; 1959 case DA7219_SR_12000: 1960 return 12000; 1961 case DA7219_SR_16000: 1962 return 16000; 1963 case DA7219_SR_22050: 1964 return 22050; 1965 case DA7219_SR_24000: 1966 return 24000; 1967 case DA7219_SR_32000: 1968 return 32000; 1969 case DA7219_SR_44100: 1970 return 44100; 1971 case DA7219_SR_48000: 1972 return 48000; 1973 case DA7219_SR_88200: 1974 return 88200; 1975 case DA7219_SR_96000: 1976 return 96000; 1977 default: 1978 return 0; 1979 } 1980} 1981 1982static long da7219_wclk_round_rate(struct clk_hw *hw, unsigned long rate, 1983 unsigned long *parent_rate) 1984{ 1985 struct da7219_priv *da7219 = 1986 container_of(hw, struct da7219_priv, 1987 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 1988 1989 if (!da7219->master) 1990 return -EINVAL; 1991 1992 if (rate < 11025) 1993 return 8000; 1994 else if (rate < 12000) 1995 return 11025; 1996 else if (rate < 16000) 1997 return 12000; 1998 else if (rate < 22050) 1999 return 16000; 2000 else if (rate < 24000) 2001 return 22050; 2002 else if (rate < 32000) 2003 return 24000; 2004 else if (rate < 44100) 2005 return 32000; 2006 else if (rate < 48000) 2007 return 44100; 2008 else if (rate < 88200) 2009 return 48000; 2010 else if (rate < 96000) 2011 return 88200; 2012 else 2013 return 96000; 2014} 2015 2016static int da7219_wclk_set_rate(struct clk_hw *hw, unsigned long rate, 2017 unsigned long parent_rate) 2018{ 2019 struct da7219_priv *da7219 = 2020 container_of(hw, struct da7219_priv, 2021 dai_clks_hw[DA7219_DAI_WCLK_IDX]); 2022 struct snd_soc_component *component = da7219->component; 2023 2024 if (!da7219->master) 2025 return -EINVAL; 2026 2027 return da7219_set_sr(component, rate); 2028} 2029 2030static unsigned long da7219_bclk_recalc_rate(struct clk_hw *hw, 2031 unsigned long parent_rate) 2032{ 2033 struct da7219_priv *da7219 = 2034 container_of(hw, struct da7219_priv, 2035 dai_clks_hw[DA7219_DAI_BCLK_IDX]); 2036 struct snd_soc_component *component = da7219->component; 2037 u8 bclks_per_wclk = snd_soc_component_read(component, 2038 DA7219_DAI_CLK_MODE); 2039 2040 switch (bclks_per_wclk & DA7219_DAI_BCLKS_PER_WCLK_MASK) { 2041 case DA7219_DAI_BCLKS_PER_WCLK_32: 2042 return parent_rate * 32; 2043 case DA7219_DAI_BCLKS_PER_WCLK_64: 2044 return parent_rate * 64; 2045 case DA7219_DAI_BCLKS_PER_WCLK_128: 2046 return parent_rate * 128; 2047 case DA7219_DAI_BCLKS_PER_WCLK_256: 2048 return parent_rate * 256; 2049 default: 2050 return 0; 2051 } 2052} 2053 2054static unsigned long da7219_bclk_get_factor(unsigned long rate, 2055 unsigned long parent_rate) 2056{ 2057 unsigned long factor; 2058 2059 factor = rate / parent_rate; 2060 if (factor < 64) 2061 return 32; 2062 else if (factor < 128) 2063 return 64; 2064 else if (factor < 256) 2065 return 128; 2066 else 2067 return 256; 2068} 2069 2070static long da7219_bclk_round_rate(struct clk_hw *hw, unsigned long rate, 2071 unsigned long *parent_rate) 2072{ 2073 struct da7219_priv *da7219 = 2074 container_of(hw, struct da7219_priv, 2075 dai_clks_hw[DA7219_DAI_BCLK_IDX]); 2076 unsigned long factor; 2077 2078 if (!*parent_rate || !da7219->master) 2079 return -EINVAL; 2080 2081 /* 2082 * We don't allow changing the parent rate as some BCLK rates can be 2083 * derived from multiple parent WCLK rates (BCLK rates are set as a 2084 * multiplier of WCLK in HW). We just do some rounding down based on the 2085 * parent WCLK rate set and find the appropriate multiplier of BCLK to 2086 * get the rounded down BCLK value. 2087 */ 2088 factor = da7219_bclk_get_factor(rate, *parent_rate); 2089 2090 return *parent_rate * factor; 2091} 2092 2093static int da7219_bclk_set_rate(struct clk_hw *hw, unsigned long rate, 2094 unsigned long parent_rate) 2095{ 2096 struct da7219_priv *da7219 = 2097 container_of(hw, struct da7219_priv, 2098 dai_clks_hw[DA7219_DAI_BCLK_IDX]); 2099 struct snd_soc_component *component = da7219->component; 2100 unsigned long factor; 2101 2102 if (!da7219->master) 2103 return -EINVAL; 2104 2105 factor = da7219_bclk_get_factor(rate, parent_rate); 2106 2107 return da7219_set_bclks_per_wclk(component, factor); 2108} 2109 2110static const struct clk_ops da7219_dai_clk_ops[DA7219_DAI_NUM_CLKS] = { 2111 [DA7219_DAI_WCLK_IDX] = { 2112 .prepare = da7219_wclk_prepare, 2113 .unprepare = da7219_wclk_unprepare, 2114 .is_prepared = da7219_wclk_is_prepared, 2115 .recalc_rate = da7219_wclk_recalc_rate, 2116 .round_rate = da7219_wclk_round_rate, 2117 .set_rate = da7219_wclk_set_rate, 2118 }, 2119 [DA7219_DAI_BCLK_IDX] = { 2120 .recalc_rate = da7219_bclk_recalc_rate, 2121 .round_rate = da7219_bclk_round_rate, 2122 .set_rate = da7219_bclk_set_rate, 2123 }, 2124}; 2125 2126static int da7219_register_dai_clks(struct snd_soc_component *component) 2127{ 2128 struct device *dev = component->dev; 2129 struct device_node *np = dev->of_node; 2130 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2131 struct da7219_pdata *pdata = da7219->pdata; 2132 const char *parent_name; 2133 struct clk_hw_onecell_data *clk_data; 2134 int i, ret; 2135 2136 /* For DT platforms allocate onecell data for clock registration */ 2137 if (np) { 2138 clk_data = kzalloc(struct_size(clk_data, hws, DA7219_DAI_NUM_CLKS), 2139 GFP_KERNEL); 2140 if (!clk_data) 2141 return -ENOMEM; 2142 2143 clk_data->num = DA7219_DAI_NUM_CLKS; 2144 da7219->clk_hw_data = clk_data; 2145 } 2146 2147 for (i = 0; i < DA7219_DAI_NUM_CLKS; ++i) { 2148 struct clk_init_data init = {}; 2149 struct clk_lookup *dai_clk_lookup; 2150 struct clk_hw *dai_clk_hw = &da7219->dai_clks_hw[i]; 2151 2152 switch (i) { 2153 case DA7219_DAI_WCLK_IDX: 2154 /* 2155 * If we can, make MCLK the parent of WCLK to ensure 2156 * it's enabled as required. 2157 */ 2158 if (da7219->mclk) { 2159 parent_name = __clk_get_name(da7219->mclk); 2160 init.parent_names = &parent_name; 2161 init.num_parents = 1; 2162 } else { 2163 init.parent_names = NULL; 2164 init.num_parents = 0; 2165 } 2166 break; 2167 case DA7219_DAI_BCLK_IDX: 2168 /* Make WCLK the parent of BCLK */ 2169 parent_name = __clk_get_name(da7219->dai_clks[DA7219_DAI_WCLK_IDX]); 2170 init.parent_names = &parent_name; 2171 init.num_parents = 1; 2172 break; 2173 default: 2174 dev_err(dev, "Invalid clock index\n"); 2175 ret = -EINVAL; 2176 goto err; 2177 } 2178 2179 init.name = pdata->dai_clk_names[i]; 2180 init.ops = &da7219_dai_clk_ops[i]; 2181 init.flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_GATE; 2182 dai_clk_hw->init = &init; 2183 2184 ret = clk_hw_register(dev, dai_clk_hw); 2185 if (ret) { 2186 dev_warn(dev, "Failed to register %s: %d\n", init.name, 2187 ret); 2188 goto err; 2189 } 2190 da7219->dai_clks[i] = dai_clk_hw->clk; 2191 2192 /* For DT setup onecell data, otherwise create lookup */ 2193 if (np) { 2194 da7219->clk_hw_data->hws[i] = dai_clk_hw; 2195 } else { 2196 dai_clk_lookup = clkdev_hw_create(dai_clk_hw, init.name, 2197 "%s", dev_name(dev)); 2198 if (!dai_clk_lookup) { 2199 clk_hw_unregister(dai_clk_hw); 2200 ret = -ENOMEM; 2201 goto err; 2202 } else { 2203 da7219->dai_clks_lookup[i] = dai_clk_lookup; 2204 } 2205 } 2206 } 2207 2208 /* If we're using DT, then register as provider accordingly */ 2209 if (np) { 2210 ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, 2211 da7219->clk_hw_data); 2212 if (ret) { 2213 dev_err(dev, "Failed to register clock provider\n"); 2214 goto err; 2215 } 2216 } 2217 2218 return 0; 2219 2220err: 2221 while (--i >= 0) { 2222 if (da7219->dai_clks_lookup[i]) 2223 clkdev_drop(da7219->dai_clks_lookup[i]); 2224 2225 clk_hw_unregister(&da7219->dai_clks_hw[i]); 2226 } 2227 2228 if (np) 2229 kfree(da7219->clk_hw_data); 2230 2231 return ret; 2232} 2233 2234static void da7219_free_dai_clks(struct snd_soc_component *component) 2235{ 2236 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2237 struct device_node *np = component->dev->of_node; 2238 int i; 2239 2240 if (np) 2241 of_clk_del_provider(np); 2242 2243 for (i = DA7219_DAI_NUM_CLKS - 1; i >= 0; --i) { 2244 if (da7219->dai_clks_lookup[i]) 2245 clkdev_drop(da7219->dai_clks_lookup[i]); 2246 2247 clk_hw_unregister(&da7219->dai_clks_hw[i]); 2248 } 2249 2250 if (np) 2251 kfree(da7219->clk_hw_data); 2252} 2253#else 2254static inline int da7219_register_dai_clks(struct snd_soc_component *component) 2255{ 2256 return 0; 2257} 2258 2259static void da7219_free_dai_clks(struct snd_soc_component *component) {} 2260#endif /* CONFIG_COMMON_CLK */ 2261 2262static void da7219_handle_pdata(struct snd_soc_component *component) 2263{ 2264 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2265 struct da7219_pdata *pdata = da7219->pdata; 2266 2267 if (pdata) { 2268 u8 micbias_lvl = 0; 2269 2270 da7219->wakeup_source = pdata->wakeup_source; 2271 2272 /* Mic Bias voltages */ 2273 switch (pdata->micbias_lvl) { 2274 case DA7219_MICBIAS_1_6V: 2275 case DA7219_MICBIAS_1_8V: 2276 case DA7219_MICBIAS_2_0V: 2277 case DA7219_MICBIAS_2_2V: 2278 case DA7219_MICBIAS_2_4V: 2279 case DA7219_MICBIAS_2_6V: 2280 micbias_lvl |= (pdata->micbias_lvl << 2281 DA7219_MICBIAS1_LEVEL_SHIFT); 2282 break; 2283 } 2284 2285 snd_soc_component_write(component, DA7219_MICBIAS_CTRL, micbias_lvl); 2286 2287 /* 2288 * Calculate delay required to compensate for DC offset in 2289 * Mic PGA, based on Mic Bias voltage. 2290 */ 2291 da7219->mic_pga_delay = DA7219_MIC_PGA_BASE_DELAY + 2292 (pdata->micbias_lvl * 2293 DA7219_MIC_PGA_OFFSET_DELAY); 2294 2295 /* Mic */ 2296 switch (pdata->mic_amp_in_sel) { 2297 case DA7219_MIC_AMP_IN_SEL_DIFF: 2298 case DA7219_MIC_AMP_IN_SEL_SE_P: 2299 case DA7219_MIC_AMP_IN_SEL_SE_N: 2300 snd_soc_component_write(component, DA7219_MIC_1_SELECT, 2301 pdata->mic_amp_in_sel); 2302 break; 2303 } 2304 } 2305} 2306 2307 2308/* 2309 * Regmap configs 2310 */ 2311 2312static struct reg_default da7219_reg_defaults[] = { 2313 { DA7219_MIC_1_SELECT, 0x00 }, 2314 { DA7219_CIF_TIMEOUT_CTRL, 0x01 }, 2315 { DA7219_SR_24_48, 0x00 }, 2316 { DA7219_SR, 0x0A }, 2317 { DA7219_CIF_I2C_ADDR_CFG, 0x02 }, 2318 { DA7219_PLL_CTRL, 0x10 }, 2319 { DA7219_PLL_FRAC_TOP, 0x00 }, 2320 { DA7219_PLL_FRAC_BOT, 0x00 }, 2321 { DA7219_PLL_INTEGER, 0x20 }, 2322 { DA7219_DIG_ROUTING_DAI, 0x10 }, 2323 { DA7219_DAI_CLK_MODE, 0x01 }, 2324 { DA7219_DAI_CTRL, 0x28 }, 2325 { DA7219_DAI_TDM_CTRL, 0x40 }, 2326 { DA7219_DIG_ROUTING_DAC, 0x32 }, 2327 { DA7219_DAI_OFFSET_LOWER, 0x00 }, 2328 { DA7219_DAI_OFFSET_UPPER, 0x00 }, 2329 { DA7219_REFERENCES, 0x08 }, 2330 { DA7219_MIXIN_L_SELECT, 0x00 }, 2331 { DA7219_MIXIN_L_GAIN, 0x03 }, 2332 { DA7219_ADC_L_GAIN, 0x6F }, 2333 { DA7219_ADC_FILTERS1, 0x80 }, 2334 { DA7219_MIC_1_GAIN, 0x01 }, 2335 { DA7219_SIDETONE_CTRL, 0x40 }, 2336 { DA7219_SIDETONE_GAIN, 0x0E }, 2337 { DA7219_DROUTING_ST_OUTFILT_1L, 0x01 }, 2338 { DA7219_DROUTING_ST_OUTFILT_1R, 0x02 }, 2339 { DA7219_DAC_FILTERS5, 0x00 }, 2340 { DA7219_DAC_FILTERS2, 0x88 }, 2341 { DA7219_DAC_FILTERS3, 0x88 }, 2342 { DA7219_DAC_FILTERS4, 0x08 }, 2343 { DA7219_DAC_FILTERS1, 0x80 }, 2344 { DA7219_DAC_L_GAIN, 0x6F }, 2345 { DA7219_DAC_R_GAIN, 0x6F }, 2346 { DA7219_CP_CTRL, 0x20 }, 2347 { DA7219_HP_L_GAIN, 0x39 }, 2348 { DA7219_HP_R_GAIN, 0x39 }, 2349 { DA7219_MIXOUT_L_SELECT, 0x00 }, 2350 { DA7219_MIXOUT_R_SELECT, 0x00 }, 2351 { DA7219_MICBIAS_CTRL, 0x03 }, 2352 { DA7219_MIC_1_CTRL, 0x40 }, 2353 { DA7219_MIXIN_L_CTRL, 0x40 }, 2354 { DA7219_ADC_L_CTRL, 0x40 }, 2355 { DA7219_DAC_L_CTRL, 0x40 }, 2356 { DA7219_DAC_R_CTRL, 0x40 }, 2357 { DA7219_HP_L_CTRL, 0x40 }, 2358 { DA7219_HP_R_CTRL, 0x40 }, 2359 { DA7219_MIXOUT_L_CTRL, 0x10 }, 2360 { DA7219_MIXOUT_R_CTRL, 0x10 }, 2361 { DA7219_CHIP_ID1, 0x23 }, 2362 { DA7219_CHIP_ID2, 0x93 }, 2363 { DA7219_IO_CTRL, 0x00 }, 2364 { DA7219_GAIN_RAMP_CTRL, 0x00 }, 2365 { DA7219_PC_COUNT, 0x02 }, 2366 { DA7219_CP_VOL_THRESHOLD1, 0x0E }, 2367 { DA7219_DIG_CTRL, 0x00 }, 2368 { DA7219_ALC_CTRL2, 0x00 }, 2369 { DA7219_ALC_CTRL3, 0x00 }, 2370 { DA7219_ALC_NOISE, 0x3F }, 2371 { DA7219_ALC_TARGET_MIN, 0x3F }, 2372 { DA7219_ALC_TARGET_MAX, 0x00 }, 2373 { DA7219_ALC_GAIN_LIMITS, 0xFF }, 2374 { DA7219_ALC_ANA_GAIN_LIMITS, 0x71 }, 2375 { DA7219_ALC_ANTICLIP_CTRL, 0x00 }, 2376 { DA7219_ALC_ANTICLIP_LEVEL, 0x00 }, 2377 { DA7219_DAC_NG_SETUP_TIME, 0x00 }, 2378 { DA7219_DAC_NG_OFF_THRESH, 0x00 }, 2379 { DA7219_DAC_NG_ON_THRESH, 0x00 }, 2380 { DA7219_DAC_NG_CTRL, 0x00 }, 2381 { DA7219_TONE_GEN_CFG1, 0x00 }, 2382 { DA7219_TONE_GEN_CFG2, 0x00 }, 2383 { DA7219_TONE_GEN_CYCLES, 0x00 }, 2384 { DA7219_TONE_GEN_FREQ1_L, 0x55 }, 2385 { DA7219_TONE_GEN_FREQ1_U, 0x15 }, 2386 { DA7219_TONE_GEN_FREQ2_L, 0x00 }, 2387 { DA7219_TONE_GEN_FREQ2_U, 0x40 }, 2388 { DA7219_TONE_GEN_ON_PER, 0x02 }, 2389 { DA7219_TONE_GEN_OFF_PER, 0x01 }, 2390 { DA7219_ACCDET_IRQ_MASK_A, 0x00 }, 2391 { DA7219_ACCDET_IRQ_MASK_B, 0x00 }, 2392 { DA7219_ACCDET_CONFIG_1, 0xD6 }, 2393 { DA7219_ACCDET_CONFIG_2, 0x34 }, 2394 { DA7219_ACCDET_CONFIG_3, 0x0A }, 2395 { DA7219_ACCDET_CONFIG_4, 0x16 }, 2396 { DA7219_ACCDET_CONFIG_5, 0x21 }, 2397 { DA7219_ACCDET_CONFIG_6, 0x3E }, 2398 { DA7219_ACCDET_CONFIG_7, 0x01 }, 2399 { DA7219_SYSTEM_ACTIVE, 0x00 }, 2400}; 2401 2402static bool da7219_volatile_register(struct device *dev, unsigned int reg) 2403{ 2404 switch (reg) { 2405 case DA7219_MIC_1_GAIN_STATUS: 2406 case DA7219_MIXIN_L_GAIN_STATUS: 2407 case DA7219_ADC_L_GAIN_STATUS: 2408 case DA7219_DAC_L_GAIN_STATUS: 2409 case DA7219_DAC_R_GAIN_STATUS: 2410 case DA7219_HP_L_GAIN_STATUS: 2411 case DA7219_HP_R_GAIN_STATUS: 2412 case DA7219_CIF_CTRL: 2413 case DA7219_PLL_SRM_STS: 2414 case DA7219_ALC_CTRL1: 2415 case DA7219_SYSTEM_MODES_INPUT: 2416 case DA7219_SYSTEM_MODES_OUTPUT: 2417 case DA7219_ALC_OFFSET_AUTO_M_L: 2418 case DA7219_ALC_OFFSET_AUTO_U_L: 2419 case DA7219_TONE_GEN_CFG1: 2420 case DA7219_ACCDET_STATUS_A: 2421 case DA7219_ACCDET_STATUS_B: 2422 case DA7219_ACCDET_IRQ_EVENT_A: 2423 case DA7219_ACCDET_IRQ_EVENT_B: 2424 case DA7219_ACCDET_CONFIG_8: 2425 case DA7219_SYSTEM_STATUS: 2426 return true; 2427 default: 2428 return false; 2429 } 2430} 2431 2432static const struct regmap_config da7219_regmap_config = { 2433 .reg_bits = 8, 2434 .val_bits = 8, 2435 2436 .max_register = DA7219_SYSTEM_ACTIVE, 2437 .reg_defaults = da7219_reg_defaults, 2438 .num_reg_defaults = ARRAY_SIZE(da7219_reg_defaults), 2439 .volatile_reg = da7219_volatile_register, 2440 .cache_type = REGCACHE_RBTREE, 2441}; 2442 2443static struct reg_sequence da7219_rev_aa_patch[] = { 2444 { DA7219_REFERENCES, 0x08 }, 2445}; 2446 2447static int da7219_probe(struct snd_soc_component *component) 2448{ 2449 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2450 unsigned int system_active, system_status, rev; 2451 u8 io_voltage_lvl; 2452 int i, ret; 2453 2454 da7219->component = component; 2455 mutex_init(&da7219->ctrl_lock); 2456 mutex_init(&da7219->pll_lock); 2457 2458 /* Regulator configuration */ 2459 ret = da7219_handle_supplies(component, &io_voltage_lvl); 2460 if (ret) 2461 return ret; 2462 2463 regcache_cache_bypass(da7219->regmap, true); 2464 2465 /* Disable audio paths if still active from previous start */ 2466 regmap_read(da7219->regmap, DA7219_SYSTEM_ACTIVE, &system_active); 2467 if (system_active) { 2468 regmap_write(da7219->regmap, DA7219_GAIN_RAMP_CTRL, 2469 DA7219_GAIN_RAMP_RATE_NOMINAL); 2470 regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_INPUT, 0x00); 2471 regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_OUTPUT, 0x01); 2472 2473 for (i = 0; i < DA7219_SYS_STAT_CHECK_RETRIES; ++i) { 2474 regmap_read(da7219->regmap, DA7219_SYSTEM_STATUS, 2475 &system_status); 2476 if (!system_status) 2477 break; 2478 2479 msleep(DA7219_SYS_STAT_CHECK_DELAY); 2480 } 2481 } 2482 2483 /* Soft reset component */ 2484 regmap_write_bits(da7219->regmap, DA7219_ACCDET_CONFIG_1, 2485 DA7219_ACCDET_EN_MASK, 0); 2486 regmap_write_bits(da7219->regmap, DA7219_CIF_CTRL, 2487 DA7219_CIF_REG_SOFT_RESET_MASK, 2488 DA7219_CIF_REG_SOFT_RESET_MASK); 2489 regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE, 2490 DA7219_SYSTEM_ACTIVE_MASK, 0); 2491 regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE, 2492 DA7219_SYSTEM_ACTIVE_MASK, 1); 2493 2494 regcache_cache_bypass(da7219->regmap, false); 2495 regmap_reinit_cache(da7219->regmap, &da7219_regmap_config); 2496 2497 /* Update IO voltage level range based on supply level */ 2498 snd_soc_component_write(component, DA7219_IO_CTRL, io_voltage_lvl); 2499 2500 ret = regmap_read(da7219->regmap, DA7219_CHIP_REVISION, &rev); 2501 if (ret) { 2502 dev_err(component->dev, "Failed to read chip revision: %d\n", ret); 2503 goto err_disable_reg; 2504 } 2505 2506 switch (rev & DA7219_CHIP_MINOR_MASK) { 2507 case 0: 2508 ret = regmap_register_patch(da7219->regmap, da7219_rev_aa_patch, 2509 ARRAY_SIZE(da7219_rev_aa_patch)); 2510 if (ret) { 2511 dev_err(component->dev, "Failed to register AA patch: %d\n", 2512 ret); 2513 goto err_disable_reg; 2514 } 2515 break; 2516 default: 2517 break; 2518 } 2519 2520 /* Handle DT/ACPI/Platform data */ 2521 da7219_handle_pdata(component); 2522 2523 /* Check if MCLK provided */ 2524 da7219->mclk = clk_get(component->dev, "mclk"); 2525 if (IS_ERR(da7219->mclk)) { 2526 if (PTR_ERR(da7219->mclk) != -ENOENT) { 2527 ret = PTR_ERR(da7219->mclk); 2528 goto err_disable_reg; 2529 } else { 2530 da7219->mclk = NULL; 2531 } 2532 } 2533 2534 /* Register CCF DAI clock control */ 2535 ret = da7219_register_dai_clks(component); 2536 if (ret) 2537 goto err_put_clk; 2538 2539 /* Default PC counter to free-running */ 2540 snd_soc_component_update_bits(component, DA7219_PC_COUNT, DA7219_PC_FREERUN_MASK, 2541 DA7219_PC_FREERUN_MASK); 2542 2543 /* Default gain ramping */ 2544 snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL, 2545 DA7219_MIXIN_L_AMP_RAMP_EN_MASK, 2546 DA7219_MIXIN_L_AMP_RAMP_EN_MASK); 2547 snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL, DA7219_ADC_L_RAMP_EN_MASK, 2548 DA7219_ADC_L_RAMP_EN_MASK); 2549 snd_soc_component_update_bits(component, DA7219_DAC_L_CTRL, DA7219_DAC_L_RAMP_EN_MASK, 2550 DA7219_DAC_L_RAMP_EN_MASK); 2551 snd_soc_component_update_bits(component, DA7219_DAC_R_CTRL, DA7219_DAC_R_RAMP_EN_MASK, 2552 DA7219_DAC_R_RAMP_EN_MASK); 2553 snd_soc_component_update_bits(component, DA7219_HP_L_CTRL, 2554 DA7219_HP_L_AMP_RAMP_EN_MASK, 2555 DA7219_HP_L_AMP_RAMP_EN_MASK); 2556 snd_soc_component_update_bits(component, DA7219_HP_R_CTRL, 2557 DA7219_HP_R_AMP_RAMP_EN_MASK, 2558 DA7219_HP_R_AMP_RAMP_EN_MASK); 2559 2560 /* Default minimum gain on HP to avoid pops during DAPM sequencing */ 2561 snd_soc_component_update_bits(component, DA7219_HP_L_CTRL, 2562 DA7219_HP_L_AMP_MIN_GAIN_EN_MASK, 2563 DA7219_HP_L_AMP_MIN_GAIN_EN_MASK); 2564 snd_soc_component_update_bits(component, DA7219_HP_R_CTRL, 2565 DA7219_HP_R_AMP_MIN_GAIN_EN_MASK, 2566 DA7219_HP_R_AMP_MIN_GAIN_EN_MASK); 2567 2568 /* Default infinite tone gen, start/stop by Kcontrol */ 2569 snd_soc_component_write(component, DA7219_TONE_GEN_CYCLES, DA7219_BEEP_CYCLES_MASK); 2570 2571 /* Initialise AAD block */ 2572 ret = da7219_aad_init(component); 2573 if (ret) 2574 goto err_free_dai_clks; 2575 2576 return 0; 2577 2578err_free_dai_clks: 2579 da7219_free_dai_clks(component); 2580 2581err_put_clk: 2582 clk_put(da7219->mclk); 2583 2584err_disable_reg: 2585 regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies); 2586 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies); 2587 2588 return ret; 2589} 2590 2591static void da7219_remove(struct snd_soc_component *component) 2592{ 2593 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2594 2595 da7219_aad_exit(component); 2596 2597 da7219_free_dai_clks(component); 2598 clk_put(da7219->mclk); 2599 2600 /* Supplies */ 2601 regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies); 2602 regulator_bulk_free(DA7219_NUM_SUPPLIES, da7219->supplies); 2603} 2604 2605#ifdef CONFIG_PM 2606static int da7219_suspend(struct snd_soc_component *component) 2607{ 2608 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2609 2610 /* Suspend AAD if we're not a wake-up source */ 2611 if (!da7219->wakeup_source) 2612 da7219_aad_suspend(component); 2613 2614 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF); 2615 2616 return 0; 2617} 2618 2619static int da7219_resume(struct snd_soc_component *component) 2620{ 2621 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 2622 2623 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY); 2624 2625 /* Resume AAD if previously suspended */ 2626 if (!da7219->wakeup_source) 2627 da7219_aad_resume(component); 2628 2629 return 0; 2630} 2631#else 2632#define da7219_suspend NULL 2633#define da7219_resume NULL 2634#endif 2635 2636static int da7219_set_jack(struct snd_soc_component *component, struct snd_soc_jack *jack, 2637 void *data) 2638{ 2639 da7219_aad_jack_det(component, jack); 2640 2641 return 0; 2642} 2643 2644static const struct snd_soc_component_driver soc_component_dev_da7219 = { 2645 .probe = da7219_probe, 2646 .remove = da7219_remove, 2647 .suspend = da7219_suspend, 2648 .resume = da7219_resume, 2649 .set_jack = da7219_set_jack, 2650 .set_bias_level = da7219_set_bias_level, 2651 .controls = da7219_snd_controls, 2652 .num_controls = ARRAY_SIZE(da7219_snd_controls), 2653 .dapm_widgets = da7219_dapm_widgets, 2654 .num_dapm_widgets = ARRAY_SIZE(da7219_dapm_widgets), 2655 .dapm_routes = da7219_audio_map, 2656 .num_dapm_routes = ARRAY_SIZE(da7219_audio_map), 2657 .idle_bias_on = 1, 2658 .use_pmdown_time = 1, 2659 .endianness = 1, 2660}; 2661 2662 2663/* 2664 * I2C layer 2665 */ 2666 2667static int da7219_i2c_probe(struct i2c_client *i2c) 2668{ 2669 struct device *dev = &i2c->dev; 2670 struct da7219_priv *da7219; 2671 int ret; 2672 2673 da7219 = devm_kzalloc(dev, sizeof(struct da7219_priv), 2674 GFP_KERNEL); 2675 if (!da7219) 2676 return -ENOMEM; 2677 2678 i2c_set_clientdata(i2c, da7219); 2679 2680 da7219->regmap = devm_regmap_init_i2c(i2c, &da7219_regmap_config); 2681 if (IS_ERR(da7219->regmap)) { 2682 ret = PTR_ERR(da7219->regmap); 2683 dev_err(dev, "regmap_init() failed: %d\n", ret); 2684 return ret; 2685 } 2686 2687 /* Retrieve DT/ACPI/Platform data */ 2688 da7219->pdata = dev_get_platdata(dev); 2689 if (!da7219->pdata) 2690 da7219->pdata = da7219_fw_to_pdata(dev); 2691 2692 /* AAD */ 2693 ret = da7219_aad_probe(i2c); 2694 if (ret) 2695 return ret; 2696 2697 ret = devm_snd_soc_register_component(dev, &soc_component_dev_da7219, 2698 &da7219_dai, 1); 2699 if (ret < 0) { 2700 dev_err(dev, "Failed to register da7219 component: %d\n", ret); 2701 } 2702 return ret; 2703} 2704 2705static const struct i2c_device_id da7219_i2c_id[] = { 2706 { "da7219", }, 2707 { } 2708}; 2709MODULE_DEVICE_TABLE(i2c, da7219_i2c_id); 2710 2711static struct i2c_driver da7219_i2c_driver = { 2712 .driver = { 2713 .name = "da7219", 2714 .of_match_table = of_match_ptr(da7219_of_match), 2715 .acpi_match_table = ACPI_PTR(da7219_acpi_match), 2716 }, 2717 .probe = da7219_i2c_probe, 2718 .id_table = da7219_i2c_id, 2719}; 2720 2721module_i2c_driver(da7219_i2c_driver); 2722 2723MODULE_DESCRIPTION("ASoC DA7219 Codec Driver"); 2724MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>"); 2725MODULE_LICENSE("GPL"); 2726