/freebsd-11.0-release/sys/dev/bwi/ |
H A D | bwimac.c | 125 CSR_WRITE_4(sc, BWI_MAC_TMPLT_CTRL, ofs); 126 CSR_WRITE_4(sc, BWI_MAC_TMPLT_DATA, val); 173 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs)); 187 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs)); 191 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, 197 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs)); 216 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs)); 229 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs)); 232 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, 236 CSR_WRITE_4(s [all...] |
H A D | if_bwi.c | 977 CSR_WRITE_4(sc, BWI_BUS_ADDR, BWI_BUS_ADDR_MAGIC); 979 CSR_WRITE_4(sc, BWI_BUS_DATA, 0); 1149 CSR_WRITE_4(sc, BWI_CLOCK_CTRL, clk_ctrl); 1173 CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC0); 1175 CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC1); 1185 CSR_WRITE_4(sc, BWI_PLL_ON_DELAY, 1187 CSR_WRITE_4(sc, BWI_FREQ_SEL_DELAY, 1569 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, intr_status); 1572 CSR_WRITE_4(sc, BWI_TXRX_INTR_STATUS(i), txrx_intr_status[i]); 2361 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/arm/amlogic/aml8726/ |
H A D | aml8726_usb_phy-m6.c | 100 #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) macro 249 CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); 273 CSR_WRITE_4(sc, AML_USB_PHY_CTRL_REG, value); 285 CSR_WRITE_4(sc, AML_USB_PHY_CTRL_REG, value); 307 CSR_WRITE_4(sc, AML_USB_PHY_ADP_BC_REG, value); 382 CSR_WRITE_4(sc, AML_USB_PHY_CTRL_REG, value);
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H A D | aml8726_clkmsr.c | 105 #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) macro 123 CSR_WRITE_4(sc, AML_CLKMSR_0_REG, 0); 131 CSR_WRITE_4(sc, AML_CLKMSR_0_REG, value); 139 CSR_WRITE_4(sc, AML_CLKMSR_0_REG, value);
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H A D | aml8726_i2c.c | 86 #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) macro 193 CSR_WRITE_4(sc, AML_I2C_CTRL_REG, 228 CSR_WRITE_4(sc, AML_I2C_CTRL_REG, ((CSR_READ_4(sc, AML_I2C_CTRL_REG) & 242 CSR_WRITE_4(sc, AML_I2C_CTRL_REG, ((CSR_READ_4(sc, AML_I2C_CTRL_REG) &
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H A D | aml8726_mmc.c | 102 #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) macro 212 CSR_WRITE_4(sc, AML_MMC_IRQ_CONFIG_REG, icr); 344 CSR_WRITE_4(sc, AML_MMC_CMD_ARGUMENT_REG, cmd->arg); 345 CSR_WRITE_4(sc, AML_MMC_MULT_CONFIG_REG, mcfgr); 346 CSR_WRITE_4(sc, AML_MMC_EXTENSION_REG, extr); 347 CSR_WRITE_4(sc, AML_MMC_DMA_ADDR_REG, (uint32_t)baddr); 349 CSR_WRITE_4(sc, AML_MMC_CMD_SEND_REG, cmdr); 366 CSR_WRITE_4(sc, AML_MMC_IRQ_STATUS_REG, AML_MMC_IRQ_STATUS_CLEAR_IRQ); 478 CSR_WRITE_4(sc, AML_MMC_IRQ_STATUS_REG, 488 CSR_WRITE_4(s [all...] |
H A D | aml8726_ccm.c | 75 #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) macro 138 CSR_WRITE_4(sc, g->addr, value);
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/freebsd-11.0-release/sys/arm/xscale/ixp425/ |
H A D | ixp425_pci_space.c | 66 #define CSR_WRITE_4(x, v) *(volatile uint32_t *) \ macro 259 CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3); 260 CSR_WRITE_4(PCI_NP_CBE, be | COMMAND_NP_IO_READ); 263 CSR_WRITE_4(PCI_ISR, ISR_PFE); 340 CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3); 341 CSR_WRITE_4(PCI_NP_CBE, be | COMMAND_NP_IO_WRITE); 342 CSR_WRITE_4(PCI_NP_WDATA, data); 344 CSR_WRITE_4(PCI_ISR, ISR_PFE);
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/freebsd-11.0-release/sys/dev/age/ |
H A D | if_age.c | 218 CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ | 247 CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE | 347 CSR_WRITE_4(sc, AGE_SPI_CTRL, reg); 355 CSR_WRITE_4(sc, AGE_TWSI_CTRL, CSR_READ_4(sc, AGE_TWSI_CTRL) | 389 CSR_WRITE_4(sc, AGE_GPHY_CTRL, GPHY_CTRL_RST); 391 CSR_WRITE_4(sc, AGE_GPHY_CTRL, GPHY_CTRL_CLR); 1332 CSR_WRITE_4(sc, AGE_WOL_CFG, 0); 1425 CSR_WRITE_4(sc, AGE_WOL_CFG, pmcs); 1433 CSR_WRITE_4(sc, AGE_MAC_CFG, reg); 1888 CSR_WRITE_4(s [all...] |
H A D | if_agevar.h | 237 #define CSR_WRITE_4(_sc, reg, val) \ macro 253 CSR_WRITE_4(_sc, AGE_MBOX, \
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/freebsd-11.0-release/sys/dev/ale/ |
H A D | if_ale.c | 210 CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ | 236 CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE | 293 CSR_WRITE_4(sc, ALE_MAC_CFG, reg); 367 CSR_WRITE_4(sc, ALE_SPI_CTRL, reg); 375 CSR_WRITE_4(sc, ALE_TWSI_CTRL, CSR_READ_4(sc, ALE_TWSI_CTRL) | 1503 CSR_WRITE_4(sc, ALE_WOL_CFG, 0); 1506 CSR_WRITE_4(sc, ALE_PCIE_PHYMISC, reg); 1525 CSR_WRITE_4(sc, ALE_WOL_CFG, pmcs); 1533 CSR_WRITE_4(sc, ALE_MAC_CFG, reg); 1539 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/dev/vx/ |
H A D | if_vxvar.h | 60 #define CSR_WRITE_4(sc, reg, val) \ macro
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/freebsd-11.0-release/sys/mips/idt/ |
H A D | if_kr.c | 260 CSR_WRITE_4(sc, KR_ETHMCP, (165000000 / (1250000 + 1)) & ~1); 262 CSR_WRITE_4(sc, KR_MIIMCFG, KR_MIIMCFG_R); 264 CSR_WRITE_4(sc, KR_MIIMCFG, 0); 421 CSR_WRITE_4(sc, KR_MIIMADDR, (phy << 8) | reg); 430 CSR_WRITE_4(sc, KR_MIIMCMD, KR_MIIMCMD_RD); 445 CSR_WRITE_4(sc, KR_MIIMCMD, 0); 463 CSR_WRITE_4(sc, KR_MIIMADDR, (phy << 8) | reg); 472 CSR_WRITE_4(sc, KR_MIIMWTD, data); 526 CSR_WRITE_4(sc, KR_ETHINTFC, 0); 561 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/dev/iwi/ |
H A D | if_iwireg.h | 590 #define CSR_WRITE_4(sc, reg, val) \ macro 601 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 606 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 611 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 612 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 616 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
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H A D | if_iwi.c | 242 CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr); 249 CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr); 1239 CSR_WRITE_4(sc, data->reg, data->physaddr); 1595 CSR_WRITE_4(sc, IWI_CSR_RX_WIDX, hw); 1662 CSR_WRITE_4(sc, IWI_CSR_INTR, r); 1736 CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.cur); 1918 CSR_WRITE_4(sc, txq->csr_widx, txq->cur); 2075 CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0); 2077 CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_STOP_MASTER); 2087 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/dev/stge/ |
H A D | if_stge.c | 997 CSR_WRITE_4(sc, STGE_AsicCtrl, 1214 CSR_WRITE_4(sc, STGE_DMACtrl, DMAC_TxDMAPollNow); 1392 CSR_WRITE_4(sc, STGE_MACCtrl, v); 1397 CSR_WRITE_4(sc, STGE_AsicCtrl, ac); 1437 CSR_WRITE_4(sc, STGE_MACCtrl, 1489 CSR_WRITE_4(sc, STGE_DMACtrl, 1932 CSR_WRITE_4(sc, STGE_AsicCtrl, ac); 1955 CSR_WRITE_4(sc, STGE_AsicCtrl, ac); 2026 CSR_WRITE_4(sc, STGE_RMONStatisticsMask, 0xffffffff); 2027 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/dev/rl/ |
H A D | if_rl.c | 556 CSR_WRITE_4(sc, RL_MAR0, hashes[0]); 557 CSR_WRITE_4(sc, RL_MAR4, hashes[1]); 558 CSR_WRITE_4(sc, RL_RXCFG, rxfilt); 1069 CSR_WRITE_4(sc, 1279 CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG); 1330 CSR_WRITE_4(sc, RL_NWAYTST, RL_NWAYTST_CBL_TEST); 1331 CSR_WRITE_4(sc, RL_PARA78, RL_PARA78_DEF); 1332 CSR_WRITE_4(sc, RL_PARA7C, RL_PARA7C_DEF); 1355 CSR_WRITE_4(sc, RL_NWAYTST, RL_NWAYTST_RESET); 1356 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/dev/ipw/ |
H A D | if_ipw.c | 1295 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur); 1388 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0); 1391 CSR_WRITE_4(sc, IPW_CSR_INTR, r); 1408 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK); 1532 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 1687 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 1802 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0); 1804 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER); 1814 CSR_WRITE_4(sc, IPW_CSR_RST, tmp | IPW_RST_PRINCETON_RESET); 1830 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/dev/vge/ |
H A D | if_vgevar.h | 217 #define CSR_WRITE_4(sc, reg, val) \ macro 236 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x)) 243 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
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H A D | if_vge.c | 604 CSR_WRITE_4(sc, VGE_MAR0, hashes[0]); 605 CSR_WRITE_4(sc, VGE_MAR1, hashes[1]); 1719 CSR_WRITE_4(sc, VGE_ISR, status); 1763 CSR_WRITE_4(sc, VGE_ISR, status); 1774 CSR_WRITE_4(sc, VGE_ISR, status | VGE_ISR_HOLDOFF_RELOAD); 2080 CSR_WRITE_4(sc, VGE_TXDESC_HIADDR, 2082 CSR_WRITE_4(sc, VGE_TXDESC_ADDR_LO0, 2086 CSR_WRITE_4(sc, VGE_RXDESC_ADDR_LO, 2132 CSR_WRITE_4(sc, VGE_IMR, VGE_INTRS_POLLING); 2139 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/dev/bm/ |
H A D | if_bmreg.h | 155 #define CSR_WRITE_4(sc, reg, val) \ macro
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/freebsd-11.0-release/sys/dev/tl/ |
H A D | if_tlreg.h | 464 #define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->tl_res, reg, val) macro 475 #define CMD_PUT(sc, x) CSR_WRITE_4(sc, TL_HOSTCMD, x) 477 CSR_WRITE_4(sc, TL_HOSTCMD, CSR_READ_4(sc, TL_HOSTCMD) | (x)) 479 CSR_WRITE_4(sc, TL_HOSTCMD, CSR_READ_4(sc, TL_HOSTCMD) & ~(x))
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/freebsd-11.0-release/sys/dev/tx/ |
H A D | if_txvar.h | 130 #define CSR_WRITE_4(sc, reg, val) \ macro
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/freebsd-11.0-release/sys/dev/re/ |
H A D | if_re.c | 453 CSR_WRITE_4(sc, RL_PHYAR, reg << 16); 484 CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) | 714 CSR_WRITE_4(sc, RL_MAR0, hashes[0]); 715 CSR_WRITE_4(sc, RL_MAR4, hashes[1]); 716 CSR_WRITE_4(sc, RL_RXCFG, rxfilt); 2458 CSR_WRITE_4(sc, RL_TIMERCNT, 1); 2673 CSR_WRITE_4(sc, RL_TIMERCNT, 1); 2935 CSR_WRITE_4(sc, RL_TIMERCNT, 1); 2973 CSR_WRITE_4(sc, RL_TIMERCNT, 1); 2995 CSR_WRITE_4(s [all...] |
/freebsd-11.0-release/sys/dev/pcn/ |
H A D | if_pcn.c | 213 CSR_WRITE_4(sc, PCN_IO32_RAP, reg); 232 CSR_WRITE_4(sc, PCN_IO32_RAP, reg); 233 CSR_WRITE_4(sc, PCN_IO32_RDP, val); 242 CSR_WRITE_4(sc, PCN_IO32_RAP, reg); 261 CSR_WRITE_4(sc, PCN_IO32_RAP, reg); 262 CSR_WRITE_4(sc, PCN_IO32_BDP, val); 407 CSR_WRITE_4(sc, PCN_IO32_RDP, 0); 1007 CSR_WRITE_4(sc, PCN_IO32_RAP, PCN_CSR_CSR); 1010 CSR_WRITE_4(sc, PCN_IO32_RDP, status);
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