| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | LiveIntervalUnion.cpp | 151 LiveInterval *VReg = LiveUnionI.value(); local
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| H A D | LiveIntervalUnion.h | 120 Query(LiveInterval *VReg, LiveIntervalUnion *LIU): argument
136 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) { argument
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| H A D | LiveRangeEdit.cpp | 35 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); local
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| H A D | TailDuplication.cpp | 231 unsigned VReg = SSAUpdateVRs[i]; local
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| H A D | MachineFunction.cpp | 409 unsigned VReg = MRI.getLiveInVirtReg(PReg); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 271 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); local
302 unsigned VReg = getVR(Op, VRBaseMap); local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 338 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 211 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); local
323 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 848 unsigned VReg = local
853 unsigned VReg = local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1130 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); local
1180 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/ |
| H A D | SPUISelLowering.cpp | 638 unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass); local
833 unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass); local
1187 unsigned VReg = RegInfo.createVirtualRegister(ArgRegClass); local
1235 unsigned VReg local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 888 unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); local
3230 unsigned VReg = AddLiveIn(MF, *Reg, &Mips::CPU64RegsRegClass); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 1905 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(GPArgRegs[GPRIndex]); local
1924 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(FPArgRegs[FPRIndex]); local
2098 unsigned VReg; local
2123 unsigned VReg; local
2159 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); local
2173 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); local
2208 unsigned VReg; local
2231 unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); local
2306 unsigned VReg; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2578 unsigned VReg = MF.addLiveIn(GPRArgRegs[firstRegToSaveIndex], RC); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2055 unsigned VReg = MF.addLiveIn(GPR64ArgRegs[NumIntRegs], local
2082 unsigned VReg = MF.addLiveIn(XMMArgRegs64Bit[NumXMMRegs], local
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