/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 418 unsigned SrcReg = MI.getOperand(0).getReg(); local
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H A D | PPCFrameLowering.cpp | 132 unsigned SrcReg = MI->getOperand(1).getReg(); local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
H A D | MachineCSE.cpp | 134 unsigned SrcReg = DefMI->getOperand(1).getReg(); local
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H A D | StrongPHIElimination.cpp | 249 unsigned SrcReg = SrcMO.getReg(); local 291 unsigned SrcReg = BBI->getOperand(i).getReg(); local 308 unsigned SrcReg = PHI->getOperand(1).getReg(); local 322 unsigned SrcReg = PHI->getOperand(i).getReg(); local 371 unsigned SrcReg = I->second; local 662 unsigned SrcReg = SrcMO.getReg(); local [all...] |
H A D | TailDuplication.cpp | 248 unsigned SrcReg = LI->second[j].second; local 361 unsigned SrcReg = MI.getOperand(i).getReg(); local 395 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg(); local 505 unsigned SrcReg = LI->second[j].second; local [all...] |
H A D | TwoAddressInstructionPass.cpp | 382 unsigned SrcReg, DstReg; local 424 unsigned SrcReg; local 332 isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII, unsigned &SrcReg, unsigned &DstReg, bool &IsSrcPhys, bool &IsDstPhys) argument 698 unsigned SrcReg, DstReg; local 1214 unsigned SrcReg = SrcMO.getReg(); local 1426 unsigned SrcReg = mi->getOperand(SrcIdx).getReg(); local 1475 UpdateRegSequenceSrcs(unsigned SrcReg, unsigned DstReg, unsigned SubIdx, MachineRegisterInfo *MRI, const TargetRegisterInfo &TRI) argument 1531 unsigned SrcReg = Srcs[i]; local 1680 unsigned SrcReg = MI->getOperand(i).getReg(); local 1746 unsigned SrcReg = MI->getOperand(i).getReg(); local [all...] |
H A D | RegisterCoalescer.cpp | 854 updateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx) argument [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
H A D | MipsISelDAGToDAG.cpp | 554 unsigned RdhwrOpc, SrcReg, DestReg; local
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H A D | MipsISelLowering.cpp | 3192 unsigned SrcReg = O32IntRegs[CurWord]; local
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCCodeEmitter.cpp | 69 unsigned SrcReg = MI.getOperand(OpNum).getReg(); local
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/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Target/ |
H A D | TargetInstrInfo.h | 113 isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const argument 469 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 481 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 726 analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const argument 735 optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const argument
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
H A D | ARMExpandPseudoInsts.cpp | 463 unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); local 593 unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); local 982 unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); local 1011 unsigned SrcReg = MI.getOperand(1).getReg(); local [all...] |
H A D | ARMAsmPrinter.cpp | 1130 unsigned SrcReg, DstReg; local 1764 unsigned SrcReg = MI->getOperand(0).getReg(); local 1848 unsigned SrcReg = MI->getOperand(0).getReg(); local 1921 unsigned SrcReg = MI->getOperand(0).getReg(); local 1973 unsigned SrcReg = MI->getOperand(0).getReg(); local [all...] |
H A D | ARMFastISel.cpp | 489 unsigned ARMFastISel::ARMMoveToFPReg(EVT VT, unsigned SrcReg) { argument 499 unsigned ARMFastISel::ARMMoveToIntReg(EVT VT, unsigned SrcReg) { argument 1124 bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr, argument 1216 unsigned SrcReg = 0; local 1596 unsigned SrcReg = getRegForValue(Src); local 2124 unsigned SrcReg = Reg + VA.getValNo(); local 2474 unsigned SrcReg = FramePtr; local 2561 unsigned SrcReg = getRegForValue(Op); local 2570 ARMEmitIntExt(EVT SrcVT, unsigned SrcReg, EVT DestVT, bool isZExt) argument 2627 unsigned SrcReg = getRegForValue(Src); local [all...] |
H A D | ARMISelDAGToDAG.cpp | 1779 SDValue SrcReg; local
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H A D | ARMBaseInstrInfo.cpp | 651 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 760 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 2003 isRedundantFlagInstr(MachineInstr *CmpI, unsigned SrcReg, unsigned SrcReg2, int ImmValue, MachineInstr *OI) argument 2034 optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const argument 3795 unsigned DstReg, SrcReg, DReg; local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.cpp | 307 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 352 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 387 storeRegToAddr( MachineFunction &MF, unsigned SrcReg, bool isKill, SmallVectorImpl<MachineOperand> &Addr, const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr*> &NewMIs) const argument [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 1084 unsigned SrcReg = MI->getOperand(1).getReg(); local
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
H A D | X86FastISel.cpp | 775 unsigned SrcReg = Reg + VA.getValNo(); local
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H A D | X86ISelDAGToDAG.cpp | 2217 unsigned SrcReg, LoReg, HiReg; local
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H A D | X86InstrInfo.cpp | 2758 static unsigned CopyToFromAsymmetricReg(unsigned DestReg, unsigned SrcReg, argument 1344 isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const argument 2795 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 2934 getStoreRegOpcode(unsigned SrcReg, const TargetRegisterClass *RC, bool isStackAligned, TargetMachine &TM) argument 2949 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 2966 storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, SmallVectorImpl<MachineOperand> &Addr, const TargetRegisterClass *RC, MachineInstr::mmo_iterator MMOBegin, MachineInstr::mmo_iterator MMOEnd, SmallVectorImpl<MachineInstr*> &NewMIs) const argument 3020 analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const argument 3097 isRedundantFlagInstr(MachineInstr *FlagI, unsigned SrcReg, unsigned SrcReg2, int ImmValue, MachineInstr *OI) argument 3180 optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const argument [all...] |
H A D | X86ISelLowering.cpp | 12103 unsigned DstReg, SrcReg; local
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/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 388 unsigned SrcReg; member in struct:__anon10340::ARMOperand::__anon10341::__anon10357 394 unsigned SrcReg; member in struct:__anon10340::ARMOperand::__anon10341::__anon10358 2131 CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, unsigned ShiftReg, unsigned ShiftImm, SMLoc S, SMLoc E) argument 2146 CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, unsigned ShiftImm, SMLoc S, SMLoc E) argument 2542 int SrcReg = PrevOp->getReg(); local [all...] |