Lines Matching defs:SrcReg
309 unsigned DestReg, unsigned SrcReg,
311 if (Hexagon::IntRegsRegClass.contains(SrcReg, DestReg)) {
312 BuildMI(MBB, I, DL, get(Hexagon::TFR), DestReg).addReg(SrcReg);
315 if (Hexagon::DoubleRegsRegClass.contains(SrcReg, DestReg)) {
316 BuildMI(MBB, I, DL, get(Hexagon::TFR_64), DestReg).addReg(SrcReg);
319 if (Hexagon::PredRegsRegClass.contains(SrcReg, DestReg)) {
322 DestReg).addReg(SrcReg).addReg(SrcReg);
326 Hexagon::IntRegsRegClass.contains(SrcReg)) {
328 if(SrcReg == RI.getSubReg(DestReg, Hexagon::subreg_loreg)) {
335 Hexagon::subreg_loreg))).addReg(SrcReg);
342 Hexagon::IntRegsRegClass.contains(SrcReg)) {
343 BuildMI(MBB, I, DL, get(Hexagon::TFCR), DestReg).addReg(SrcReg);
353 unsigned SrcReg, bool isKill, int FI,
372 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
376 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
380 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
388 MachineFunction &MF, unsigned SrcReg,