| /freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CodeGenFunction.h | 3526 Expr *Cond = nullptr; member in struct:clang::CodeGen::CodeGenFunction::OMPLoopArguments
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| H A D | CGExpr.cpp | 3157 llvm::Value *&Cond = local
3395 llvm::Value *Cond = local
3251 EmitCfiSlowPathCheck( SanitizerMask Kind, llvm::Value *Cond, llvm::ConstantInt *TypeId, llvm::Value *Ptr, ArrayRef<llvm::Constant *> StaticArgs) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Demangle/ |
| H A D | ItaniumDemangle.h | 1620 const Node *Cond; member in class:ConditionalExpr
4761 Node *Cond = getDerived().parseExpr(); local
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| /freebsd-13-stable/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaStmt.cpp | 578 ActOnIfStmt(SourceLocation IfLoc, bool IsConstexpr, Stmt *InitStmt, ConditionResult Cond, Stmt *thenStmt, SourceLocation ElseLoc, Stmt *elseStmt) argument
604 BuildIfStmt(SourceLocation IfLoc, bool IsConstexpr, Stmt *InitStmt, ConditionResult Cond, Stmt *thenStmt, SourceLocation ElseLoc, Stmt *elseStmt) argument
677 CheckSwitchCondition(SourceLocation SwitchLoc, Expr *Cond) argument
679 Expr *Cond; member in class:SwitchConvertDiagnoser
682 SwitchConvertDiagnoser(Expr *Cond) argument
741 ActOnStartOfSwitchStmt(SourceLocation SwitchLoc, Stmt *InitStmt, ConditionResult Cond) argument
835 checkEnumTypesInSwitchStmt(Sema &S, const Expr *Cond, const Expr *Case) argument
1331 ActOnWhileStmt(SourceLocation WhileLoc, SourceLocation LParenLoc, ConditionResult Cond, SourceLocation RParenLoc, Stmt *Body) argument
1352 ActOnDoStmt(SourceLocation DoLoc, Stmt *Body, SourceLocation WhileLoc, SourceLocation CondLParen, Expr *Cond, SourceLocation CondRParen) argument
2365 BuildCXXForRangeStmt(SourceLocation ForLoc, SourceLocation CoawaitLoc, Stmt *InitStmt, SourceLocation ColonLoc, Stmt *RangeDecl, Stmt *Begin, Stmt *End, Expr *Cond, Expr *Inc, Stmt *LoopVarDecl, SourceLocation RParenLoc, BuildForRangeKind Kind) argument
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| H A D | SemaDeclAttr.cpp | 993 Expr *Cond; local
962 checkFunctionConditionAttr(Sema &S, Decl *D, const ParsedAttr &AL, Expr *&Cond, StringRef &Msg) argument
1048 Expr *Cond; local
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| H A D | SemaTemplate.cpp | 3396 static Expr *lookThroughRangesV3Condition(Preprocessor &PP, Expr *Cond) { argument
3460 Sema::findFailedBooleanCondition(Expr *Cond) { argument
10301 isEnableIf(NestedNameSpecifierLoc NNS, const IdentifierInfo &II, SourceRange &CondRange, Expr *&Cond) argument
10422 Expr *Cond = nullptr; local
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| /freebsd-13-stable/contrib/llvm-project/clang/include/clang/AST/ |
| H A D | Stmt.h | 1949 void setCond(Expr *Cond) { argument
2143 void setCond(Expr *Cond) { argument
2319 setCond(Expr *Cond) argument
2402 DoStmt(Stmt *Body, Expr *Cond, SourceLocation DL, SourceLocation WL, SourceLocation RP) argument
2418 setCond(Expr *Cond) argument
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| /freebsd-13-stable/contrib/llvm-project/clang/lib/Analysis/ |
| H A D | CFG.cpp | 3042 BinaryOperator *Cond = local
5945 const Stmt *Cond = StmtElem->getStmt(); local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1534 SDValue Cond = PromoteTargetBoolean(N->getOperand(1), MVT::Other); local
1619 SDValue Cond = N->getOperand(0); local
2553 ISD::CondCode Cond; local
4148 SDValue Cond = N->getOperand(3); local
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| H A D | LegalizeVectorTypes.cpp | 418 SDValue Cond = N->getOperand(0); local
3962 SDValue Cond = N->getOperand(0); local
4790 SDValue Cond = GetWidenedVector(N->getOperand(0)); local
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| H A D | TargetLowering.cpp | 3079 foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, DAGCombinerInfo &DCI) const argument
3148 optimizeSetCCOfSignedTruncationCheck( EVT SCCVT, SDValue N0, SDValue N1, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL) const argument
3237 optimizeSetCCByHoistingAndByConstFromLogicalShift( EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL) const argument
3310 foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, DAGCombinerInfo &DCI) const argument
3352 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, const SDLoc &dl) const argument
5197 buildUREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL) const argument
5214 prepareUREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL, SmallVectorImpl<SDNode *> &Created) const argument
5431 buildSREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL) const argument
5449 prepareSREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL, SmallVectorImpl<SDNode *> &Created) const argument
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| H A D | SelectionDAGBuilder.cpp | 2054 SelectionDAGBuilder::EmitBranchForMergedCondition(const Value *Cond, argument
2101 void SelectionDAGBuilder::FindMergedConditions(const Value *Cond, argument
2349 SDValue Cond; local
3154 hasOnlySelectUsers(const Value *Cond) argument
3168 SDValue Cond = getValue(I.getOperand(0)); local
10119 lowerWorkItem(SwitchWorkListItem W, Value *Cond, MachineBasicBlock *SwitchMBB, MachineBasicBlock *DefaultMBB) argument
10157 SDValue Cond = DAG.getSetCC( local
10367 splitWorkItem(SwitchWorkList &WorkList, const SwitchWorkListItem &W, Value *Cond, MachineBasicBlock *SwitchMBB) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 804 transformToIndexedCompare(GEPOperator *GEPLHS, Value *RHS, ICmpInst::Predicate Cond, const DataLayout &DL) argument
844 foldGEPICmp(GEPOperator *GEPLHS, Value *RHS, ICmpInst::Predicate Cond, Instruction &I) argument
2732 Value *Cond = Builder.getFalse(); local
5536 Value *Cond, *SelectTrue, *SelectFalse; local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 2180 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) { argument
2240 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) { argument
2393 ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition()); local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 280 isProfitableToFoldUnconditional(BranchInst *SI1, BranchInst *SI2, Instruction *Cond, SmallVectorImpl<PHINode *> &PhiNodes) argument
484 ConstantComparesGatherer(Instruction *Cond, const DataLayout &DL) argument
701 Instruction *Cond = nullptr; local
1790 Instruction *Cond = nullptr; local
2633 Instruction *Cond = nullptr; local
3479 Value *Cond = Builder.CreateOr(PBICond, BICond, "brmerge"); local
3560 SimplifyTerminatorOnSelect(Instruction *OldTerm, Value *Cond, BasicBlock *TrueBB, BasicBlock *FalseBB, uint32_t TrueWeight, uint32_t FalseWeight) argument
3800 Instruction *Cond = dyn_cast<Instruction>(BI->getCondition()); local
4344 Value* Cond = BI->getCondition(); local
4571 Value *Cond = SI->getCondition(); local
5002 Value *const Cond = SI->getCondition(); local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 666 static SDValue createCMovFP(SelectionDAG &DAG, SDValue Cond, SDValue True, argument
2055 SDValue Cond = createFPCmp(DAG, Op.getOperand(0)); local
2067 SDValue Cond = createFPCmp(DAG, Op); local
2599 SDValue Cond local
2638 SDValue Cond = DAG.getNode(ISD::AND, DL, MVT::i32, Shamt, local
4024 bool Cond = !Subtarget.isABI_O32() && VT.getSizeInBits() == 32; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 5659 SDValue Cond = N->getOperand(0); local
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 4156 Value *TrueVal, *FalseVal, *Cond; local
4171 Value *TrueVal, *FalseVal, *Cond; local
4319 Value *Cond = getValue(Record, 2, NextValueNo, local
4443 Value *Cond = getValue(Record, 2, NextValueNo, OpTy); local
4499 Value *Cond = getValue(Record, 1, NextValueNo, OpTy); local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 2690 AArch64CC::CondCode AArch64AsmParser::parseCondCodeString(StringRef Cond) { argument
2738 StringRef Cond = Tok.getString(); local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2002 SDValue Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); local
2205 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT); local
3454 SDValue AMDGPUTargetLowering::performCtlz_CttzCombine(const SDLoc &SL, SDValue Cond, argument
3489 distributeOpThroughSelect(TargetLowering::DAGCombinerInfo &DCI, unsigned Op, const SDLoc &SL, SDValue Cond, SDValue N1, SDValue N2) argument
3514 SDValue Cond = N.getOperand(0); local
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| H A D | SIInstrInfo.cpp | 924 insertVectorSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DstReg, ArrayRef<MachineOperand> Cond, Register TrueReg, Register FalseReg) const argument
2075 getBranchOpcode(SIInstrInfo::BranchPredicate Cond) argument
2113 analyzeBranchImpl(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
2156 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
2257 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument
2330 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Cond, Register DstReg, Register TrueReg, Register FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument
2370 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DstReg, ArrayRef<MachineOperand> Cond, Register TrueReg, Register FalseReg) const argument
5555 MachineOperand &Cond = Inst.getOperand(3); local
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| H A D | SIISelLowering.cpp | 7974 SDValue Cond = Op.getOperand(0); local
10082 auto Cond = RHS.getOperand(0); local
10123 auto Cond = RHS.getOperand(0); local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2521 getIntrinsicCmp(SelectionDAG &DAG, unsigned Opcode, SDValue Call, unsigned CCValid, uint64_t CC, ISD::CondCode Cond) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 270 ARMCC::CondCodes Cond; // Condition for IT block. member in struct:__anon4036::ARMAsmParser::__anon4037
387 void extendImplicitITBlock(ARMCC::CondCodes Cond) { argument
416 startExplicitITBlock(ARMCC::CondCodes Cond, unsigned Mask) argument
5664 unsigned Cond = static_cast<ARMOperand &>(*Operands[CondOp]).getCondCode(); local
7581 unsigned Cond = Inst.getOperand(0).getImm(); local
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 6720 Value *Cond = SI->getCondition(); local
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