- Copy stable/10@296371 to releng/10.3 in preparation for 10.3-RC1
builds.
- Update newvers.sh to reflect RC1.
- Update __FreeBSD_version to reflect 10.3.
- Update default pkg(8) configuration to use the quarterly branch.

Approved by: re (implicit)

MFC: r273264, r274409, r278212, r278213:

Add a workaround needed to fix a bug of Arasan Host Controller where it may
lose the contents of consecutive writes (that happens within two SD card
clock cycles).

This fixes the causes of instability during the SD card detection and
identification on Raspberry Pi (which happens at 400 kHz and so was much
more vulnerable to this issue).

Remove the previous workaround which clearly can't provide the same effect.

Remove stale comments about the issues with HS mode.

Remove a previous workaround to limit the minimum sdhci frequency that
isn't needed anymore.

Remove some duplicate calls to bus_release_resource() and destroy the mutex
on error cases.

While here remove unnecessary includes.

MFC r277306, r277307, r277346:

Add defines for SDHCI 3.0 controllers.

Add a new SDHCI quirk, SDHCI_QUIRK_DONT_SET_HISPD_BIT.

Save the command-and-flags value into shadow register when it is written.

MFC r277028, r277038:

Check for and handle failures of bus_dmamap_load().
Handle dma mappings with more than one segment for rpi sdhci.

MFC r276985:

Store the shadow command/mode register in the softc, not a local static var.

MFC: r270885, r270948

- Nuke unused sdhci_softc.
- Static'ize sdhci_debug local to sdhci.c.
- Const'ify PCI device description strings.
- Nuke redundant resource ID members from sdhci_pci_softc.
- Nuke unused hw.sdhci_pci.debug tunable.
- Add support for using MSI instead of INTx, controllable via the tunable
hw.sdhci.enable_msi (defaulting to on) and tested with a RICOH R5CE823 SD
controller.
- Use NULL instead of 0 for pointers.

MFC r261410

Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

MFC r257199, r257200, r257217:

Remove all #include <machine/pmap.h> from arm code. It's already
included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h
so there's no reason to ever include it directly.

Remove #include <machine/frame.h> from all the arm code that doesn't
really need it. That would be almost everywhere it was included. Add
it in a couple files that really do need it and were previously getting
it by accident via another header.

Remove the last dregs of trapframe_t. It turns out only arm was using
this type, so remove it to make arm code more consistant with other
platforms.

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Disable debugging.

Eliminate an intermediate buffer and some memcpy() operations, and do
DMA directly to/from the buffers passed in from higher layer drivers.

Reviewed by: gonzo

Add a macro that gets the physical address of a memory mapped device
register from a bus space resource.

Note that this macro is just for ARM, and is intended to have a short
lifespan. The DMA engines in some SoCs need the physical address of a
memory-mapped device register as one of the arguments for the transfer.
Several scattered ad-hoc solutions have been converted to use this macro,
which now also serves to mark the places where a more complete fix needs
to be applied (after that fix has been designed).

Add platform DMA support to SDHCI driver for BCM2835

Submitted by: Daisuke Aoyama <aoyama at peach.ne.jp>
Reviewed by: ian@

Spelling fixes

Spotted by: N. J. Mann

Roll back change of frequency for initialization sequence since it
seems to cause more problems then previous behavior: it either breaks
initilization sequence in other places or uncovers problems with
high-speed mode timing for SDHCI 3.0

- Add hw.bcm2835.sdhci.hs tunable to enable/disable highspeed mode in
SDHCI driver
Suggested by: Daisuke Aoyama

- Set initilization sequence frequency to 8MHz. It should fix Data CRC
errors. Standard requires initialization sequence to be executed
at 400KHz but on this hardware low frequncies seems to cause
Data CRC errors.

Value was derived from analyzing hardware signals after
Raspberry Pi is powered up. Before any data is read though DATA line
adapter's clock frequency is changed to 8MHz.

Modern cards should function fine at 8MHz but for older MMC cards it
can be overriden by setting hw.bcm2835.sdhci.min_freq tunable.

Get frequency from "clock-frequency" property of "/axi/sdhci" FDT node

Add BCM2835 SDHCI driver and enable it in Raspberry Pi config