Searched refs:findRegisterDefOperandIdx (Results 1 - 13 of 13) sorted by relevance
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MachineInstr.h | 1307 return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1; 1314 return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1; 1322 return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1; 1356 int findRegisterDefOperandIdx(Register Reg, 1360 /// Wrapper for findRegisterDefOperandIdx, it returns 1366 int Idx = findRegisterDefOperandIdx(Reg, isDead, Overlap, TRI);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MachineCombiner.cpp | 194 int DefIdx = DefInstr->findRegisterDefOperandIdx(MO.getReg()); 203 DefInstr, DefInstr->findRegisterDefOperandIdx(MO.getReg()), 247 NewRoot, NewRoot->findRegisterDefOperandIdx(MO.getReg()), UseMO,
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H A D | AggressiveAntiDepBreaker.cpp | 701 int Idx = UseMI->findRegisterDefOperandIdx(NewReg, false, true, TRI);
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H A D | ModuloSchedule.cpp | 1665 assert(Def->findRegisterDefOperandIdx(MI.getOperand(1).getReg()) != -1); 1891 unsigned OpIdx = MI->findRegisterDefOperandIdx(Reg);
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H A D | TwoAddressInstructionPass.cpp | 1234 unsigned NewDstIdx = NewMIs[1]->findRegisterDefOperandIdx(regA);
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H A D | MachineInstr.cpp | 1023 /// findRegisterDefOperandIdx() - Returns the operand index that is a def of 1028 MachineInstr::findRegisterDefOperandIdx(Register Reg, bool isDead, bool Overlap, function in class:MachineInstr
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H A D | RegisterCoalescer.cpp | 820 int DefIdx = DefMI->findRegisterDefOperandIdx(IntA.reg);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 473 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) 501 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) == -1) 1229 int DeadNZCVIdx = CmpInstr.findRegisterDefOperandIdx(AArch64::NZCV, true); 3979 int Cmp_NZCV = Root.findRegisterDefOperandIdx(AArch64::NZCV, true); 5577 if (DefMI->findRegisterDefOperandIdx(AArch64::NZCV, true) != -1)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMLowOverheadLoops.cpp | 966 assert(MI->findRegisterDefOperandIdx(ARM::VPR) != -1 &&
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H A D | ARMBaseInstrInfo.cpp | 1672 int ImpDefIdx = MI.findRegisterDefOperandIdx(DstRegD); 4086 Idx = II->findRegisterDefOperandIdx(Reg, false, true, TRI);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600InstrInfo.cpp | 235 return MI.findRegisterDefOperandIdx(R600::AR_X, false, false, &RI) != -1;
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H A D | SIInstrInfo.cpp | 5563 if (CandI.findRegisterDefOperandIdx(AMDGPU::SCC, false, false, &RI) != 6241 if (MI.findRegisterDefOperandIdx(AMDGPU::SCC, false, false, &RI) != -1)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.cpp | 4230 int Idx = DefMI.findRegisterDefOperandIdx(*SR, false, false, &HRI);
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