Searched refs:t1 (Results 1 - 25 of 45) sorted by relevance

12

/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91125pcix/src/
H A Dbcm91125pcix_init.S110 li t1,GPIO_OUTPUT_MASK
111 sd t1,0(t0)
114 li t1,GPIO_INTERRUPT_MASK
115 sd t1,0(t0)
123 li t1,LEDS_PHYS >> S_IO_ADDRBASE
124 sd t1,R_IO_EXT_START_ADDR(t0)
126 li t1,LEDS_SIZE-1 /* Needs to be 1 smaller, se UM for details */
127 sd t1,R_IO_EXT_MULT_SIZE(t0)
129 li t1,LEDS_TIMING0
130 sd t1,R_IO_EXT_TIME_CFG
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm1250cpci/src/
H A Dbcm1250cpci_init.S112 li t1,GPIO_OUTPUT_MASK
113 sd t1,0(t0)
116 li t1,GPIO_INTERRUPT_MASK
117 sd t1,0(t0)
126 li t1,ALT_BOOTROM_PHYS >> S_IO_ADDRBASE
127 sd t1,R_IO_EXT_START_ADDR(t0)
129 li t1,ALT_BOOTROM_SIZE-1
130 sd t1,R_IO_EXT_MULT_SIZE(t0)
132 li t1,ALT_BOOTROM_TIMING0
133 sd t1,R_IO_EXT_TIME_CFG
[all...]
H A Dcpu1test.S79 * t0,t1,t2,t3
93 and t1,a0,0xFF
94 sb t1,LED_CHAR0(t0)
97 and t1,a0,0xFF
98 sb t1,LED_CHAR1(t0)
101 and t1,a0,0xFF
102 sb t1,LED_CHAR2(t0)
105 and t1,a0,0xFF
106 sb t1,LED_CHAR3(t0)
150 mfc0 t1,C0_COUN
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91480b/src/
H A Dbcm91480b_init.S121 li t1,GPIO_OUTPUT_MASK
122 sd t1,0(t0)
125 li t1,GPIO_INTERRUPT_MASK
126 sd t1,0(t0)
133 li t1,(M_GPIO_PCMCIA_MODE0 | M_GPIO_PCMCIA_MODE1 | M_GPIO_PCMCIA_MODE2)
134 sd t1,0(t0)
137 li t1,BCM91480_PCMCIA_MODE
138 sd t1,0(t0)
145 ld t1,0(t0)
147 and t1,t
[all...]
H A Dcpu1test.S82 * t0,t1,t2,t3
96 and t1,a0,0xFF
97 sb t1,LED_CHAR0(t0)
100 and t1,a0,0xFF
101 sb t1,LED_CHAR1(t0)
104 and t1,a0,0xFF
105 sb t1,LED_CHAR2(t0)
108 and t1,a0,0xFF
109 sb t1,LED_CHAR3(t0)
138 mfc0 t1,C0_COUN
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91125e/src/
H A Dbcm91125e_init.S111 li t1,GPIO_OUTPUT_MASK
112 sd t1,0(t0)
115 li t1,GPIO_INTERRUPT_MASK
116 sd t1,0(t0)
122 li t1,M_GPIO_DEBUG_LED
123 sd t1,0(t0)
130 li t1,LEDS_PHYS >> S_IO_ADDRBASE
131 sd t1,R_IO_EXT_START_ADDR(t0)
133 li t1,LEDS_SIZE-1 /* Needs to be 1 smaller, se UM for details */
134 sd t1,R_IO_EXT_MULT_SIZ
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91125f/src/
H A Dbcm91125f_init.S111 li t1,GPIO_OUTPUT_MASK
112 sd t1,0(t0)
115 li t1,GPIO_INTERRUPT_MASK
116 sd t1,0(t0)
122 li t1,M_GPIO_DEBUG_LED
123 sd t1,0(t0)
130 li t1,LEDS_PHYS >> S_IO_ADDRBASE
131 sd t1,R_IO_EXT_START_ADDR(t0)
133 li t1,LEDS_SIZE-1 /* Needs to be 1 smaller, se UM for details */
134 sd t1,R_IO_EXT_MULT_SIZ
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91480ht/src/
H A Dbcm91480ht_init.S123 li t1,GPIO_OUTPUT_MASK
124 sd t1,0(t0)
127 li t1,GPIO_INTERRUPT_MASK
128 sd t1,0(t0)
153 li t1,(M_GPIO_PCIX_FREQALL)
154 sd t1,0(t0)
157 li t1,(M_GPIO_PCIX_FREQ33)
158 sd t1,0(t0)
167 li t1,ALT_BOOTROM_PHYS >> S_IO_ADDRBASE
168 sd t1,R_IO_EXT_START_ADD
[all...]
H A Dcpu1test.S82 * t0,t1,t2,t3
95 and t1,a0,0xFF
96 sb t1,LED_CHAR0(t0)
99 and t1,a0,0xFF
100 sb t1,LED_CHAR1(t0)
103 and t1,a0,0xFF
104 sb t1,LED_CHAR2(t0)
107 and t1,a0,0xFF
108 sb t1,LED_CHAR3(t0)
137 mfc0 t1,C0_COUN
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/lausanne/src/
H A Dcpu1test.S79 * t0,t1,t2,t3
93 and t1,a0,0xFF
94 sb t1,LED_CHAR0(t0)
97 and t1,a0,0xFF
98 sb t1,LED_CHAR1(t0)
101 and t1,a0,0xFF
102 sb t1,LED_CHAR2(t0)
105 and t1,a0,0xFF
106 sb t1,LED_CHAR3(t0)
150 mfc0 t1,C0_COUN
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/swarm/src/
H A Dcpu1test.S81 * t0,t1,t2,t3
95 and t1,a0,0xFF
96 sb t1,LED_CHAR0(t0)
99 and t1,a0,0xFF
100 sb t1,LED_CHAR1(t0)
103 and t1,a0,0xFF
104 sb t1,LED_CHAR2(t0)
107 and t1,a0,0xFF
108 sb t1,LED_CHAR3(t0)
152 mfc0 t1,C0_COUN
[all...]
H A Dswarm_init.S101 * t0,t1,t2,t3,t4
114 and t1, t0, M_SYS_PART
115 dsrl t1, t1, S_SYS_PART # part number now in t1
127 andi t3, t1, 0xf # soc_type (t3) = part & 0xf;
150 and t3, t1, 0xf00
217 ld t1,0(t0)
219 and t1,t1,t
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/src/
H A Dbcmcore_l1cache.S95 * t0,t1,t2
113 li t1,64
114 sll t1,t2
129 multu t1,t2
130 mflo t1
147 multu t1,t2
156 li t1,K0BASE
158 cache Index_Store_Tag_I,0(t1)
159 add t1,t2
175 li t1,6
[all...]
H A Dbcmcore_ircpoll.S167 li t1,M_SR_IMMASK /* Mask all interrupt levels */
168 nor t1,t1,zero
169 and t0,t0,t1
203 li t1,M_SR_IMMASK|M_SR_IE
205 and v0,t0,t1 /* current mask bits */
238 li t1,M_SR_IMMASK|M_SR_IE
240 and a0,a0,t1
H A Dbcmcore_cpuinit.S106 1: lb t1,5(t0) ; \
107 and t1,0x20 ; \
108 beq t1,zero,1b ; \
115 li t1,c ; \
116 sb t1,0(t0)
196 li t1,(BCMCORE_NTLBENTRIES-1) /* index */
202 mtc0 t1,C0_INX
206 bnez t1,1b
207 subu t1,1 # BDSLOT
327 * t0,t1,t
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/sentosa/src/
H A Dsentosa_init.S106 li t1,GPIO_OUTPUT_MASK
107 sd t1,0(t0)
110 li t1,GPIO_INTERRUPT_MASK
111 sd t1,0(t0)
117 li t1,M_GPIO_DEBUG_LED
118 sd t1,0(t0)
127 li t1,ALT_BOOTROM_PHYS >> S_IO_ADDRBASE
128 sd t1,R_IO_EXT_START_ADDR(t0)
130 li t1,ALT_BOOTROM_SIZE-1
131 sd t1,R_IO_EXT_MULT_SIZ
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91280e/src/
H A Dbcm91280e_init.S123 li t1,GPIO_OUTPUT_MASK
124 sd t1,0(t0)
127 li t1,GPIO_INTERRUPT_MASK
128 sd t1,0(t0)
154 li t1,ALT_BOOTROM_PHYS >> S_IO_ADDRBASE
155 sd t1,R_IO_EXT_START_ADDR(t0)
157 li t1,ALT_BOOTROM_SIZE-1
158 sd t1,R_IO_EXT_MULT_SIZE(t0)
160 li t1,ALT_BOOTROM_TIMING0
161 sd t1,R_IO_EXT_TIME_CFG
[all...]
H A Dcpu1test.S82 * t0,t1,t2,t3
96 and t1,a0,0xFF
97 sb t1,LED_CHAR0(t0)
100 and t1,a0,0xFF
101 sb t1,LED_CHAR1(t0)
104 and t1,a0,0xFF
105 sb t1,LED_CHAR2(t0)
108 and t1,a0,0xFF
109 sb t1,LED_CHAR3(t0)
138 mfc0 t1,C0_COUN
[all...]
/broadcom-cfe-1.4.2/cfe/applets/
H A Dminicrt0.S82 la t1,_end
86 blt t0,t1,1b
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/
H A Dbcm1480_altcpu.S252 dli t1,BCM1480_IMR_REGISTER_SPACING
254 multu v0,t1
255 mflo t1
256 daddu a0,a0,t1
267 dli t1,M_BCM1480_SYS_CPU_RESET_0 # Base reset mask
268 dsll t1,t1,v0
269 not t1 # clear this bit
270 and t0,t1 # New value to write
339 la t1,PHYS_TO_K
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/common/src/
H A Dexception.S183 li t1,(K0SIZE-1)
184 and a0,a0,t1 # keep just physical part
185 li t1,K1BASE
186 or a0,a0,t1 # make into an uncached address
197 la t1,_exc_cerr_htable
198 LR t2,R_EXC_CERR_TEMPLATE_END(t1)
199 LR t1,R_EXC_CERR_TEMPLATE(t1)
201 1: lw t3,0(t1) # get a word
204 ADD t1,
[all...]
H A Dlib_physio.S90 mfc0 t1,C0_SR ; \
91 and t0,t1,M_SR_KX ; \
95 1: or t0,t1,M_SR_KX ; \
99 mtc0 t1,C0_SR ; \
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/
H A Dsb1250_altcpu.S217 dli t1,M_SYS_CPU_RESET_1 # Reset mask
218 not t1 # clear this bit
219 and t0,t1 # New value to write
285 la t1,PHYS_TO_K1(A_IMR_REGISTER(1,R_IMR_MAILBOX_SET_CPU))
287 sd t0,0(t1) # Write to mailbox register
340 la t1,cpu_startvectors
341 sd zero,8(t1) # Reset address of CPU1 (2nd entry in table)
362 dli t1,M_SYS_CPU_RESET_1 # Reset mask
363 or t0,t1 # New value to write
494 li t1,
[all...]
H A Dsb1250_l2cache.S87 * t0,t1,t2
107 or t1,t2,M_SR_KX
108 mtc0 t1,C0_SR
122 li t1,16
124 li t1,L2C_ENTRIES_PER_WAY*L2C_NUM_WAYS
137 subu t1,4
138 bne t1,0,1b
167 * t0,t1
220 * t0,t1
268 * t0, t1, t
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/include/
H A Dsb1250_wid.h210 #define WID_UNCONVOLUTE(wid,t1,t2,t3) \
211 li t1,M_WID_SWAPBITS ; \
212 and t1,t1,wid ; \
213 sll t1,t1,1 ; \
219 or wid,wid,t1 ; \

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