Searched refs:reg_width (Results 1 - 25 of 38) sorted by path

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/linux-master/arch/arm/mach-sa1100/
H A Dh3xxx.c151 .reg_width = 16,
/linux-master/arch/mips/include/asm/txx9/
H A Ddmac.h37 * @reg_width: peripheral register width
42 unsigned int reg_width; member in struct:txx9dmac_slave
/linux-master/drivers/net/wireless/broadcom/b43/
H A Dbus.c64 size_t count, u16 offset, u8 reg_width)
66 bcma_block_read(dev->bdev, buffer, count, offset, reg_width);
70 size_t count, u16 offset, u8 reg_width)
72 bcma_block_write(dev->bdev, buffer, count, offset, reg_width);
167 size_t count, u16 offset, u8 reg_width)
169 ssb_block_read(dev->sdev, buffer, count, offset, reg_width);
173 size_t count, u16 offset, u8 reg_width)
175 ssb_block_write(dev->sdev, buffer, count, offset, reg_width);
63 b43_bus_bcma_block_read(struct b43_bus_dev *dev, void *buffer, size_t count, u16 offset, u8 reg_width) argument
69 b43_bus_bcma_block_write(struct b43_bus_dev *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) argument
166 b43_bus_ssb_block_read(struct b43_bus_dev *dev, void *buffer, size_t count, u16 offset, u8 reg_width) argument
172 b43_bus_ssb_block_write(struct b43_bus_dev *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) argument
H A Dbus.h34 size_t count, u16 offset, u8 reg_width);
36 size_t count, u16 offset, u8 reg_width);
H A Db43.h1069 size_t count, u16 offset, u8 reg_width)
1071 dev->dev->block_read(dev->dev, buffer, count, offset, reg_width);
1075 size_t count, u16 offset, u8 reg_width)
1077 dev->dev->block_write(dev->dev, buffer, count, offset, reg_width);
1068 b43_block_read(struct b43_wldev *dev, void *buffer, size_t count, u16 offset, u8 reg_width) argument
1074 b43_block_write(struct b43_wldev *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) argument
/linux-master/drivers/sh/intc/
H A Dbalancing.c67 fn += (mr->reg_width >> 3) - 1;
72 (mr->reg_width - 1) - j);
H A Dhandle.c73 fn += (mr->reg_width >> 3) - 1;
78 (mr->reg_width - 1) - *fld_idx);
137 fn += (pr->reg_width >> 3) - 1;
140 BUG_ON(n * pr->field_width > pr->reg_width);
142 bit = pr->reg_width - (n * pr->field_width);
194 fn += (mr->reg_width >> 3) - 1;
199 (mr->reg_width - 1) - j);
272 fn += (sr->reg_width >> 3) - 1;
274 BUG_ON((j + 1) * sr->field_width > sr->reg_width);
276 bit = sr->reg_width
[all...]
H A Dvirq.c139 unsigned int fn = REG_FN_TEST_BASE + (subgroup->reg_width >> 3) - 1;
142 0, 1, (subgroup->reg_width - 1) - index);
/linux-master/drivers/ssb/
H A Dhost_soc.c42 size_t count, u16 offset, u8 reg_width)
50 switch (reg_width) {
115 size_t count, u16 offset, u8 reg_width)
123 switch (reg_width) {
41 ssb_host_soc_block_read(struct ssb_device *dev, void *buffer, size_t count, u16 offset, u8 reg_width) argument
114 ssb_host_soc_block_write(struct ssb_device *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) argument
/linux-master/include/linux/bcma/
H A Dbcma.h52 size_t count, u16 offset, u8 reg_width);
54 size_t count, u16 offset, u8 reg_width);
396 size_t count, u16 offset, u8 reg_width)
398 core->bus->ops->block_read(core, buffer, count, offset, reg_width);
402 u16 offset, u8 reg_width)
404 core->bus->ops->block_write(core, buffer, count, offset, reg_width);
395 bcma_block_read(struct bcma_device *core, void *buffer, size_t count, u16 offset, u8 reg_width) argument
400 bcma_block_write(struct bcma_device *core, const void *buffer, size_t count, u16 offset, u8 reg_width) argument
/linux-master/drivers/bcma/
H A Dhost_pci.c83 size_t count, u16 offset, u8 reg_width)
88 switch (reg_width) {
107 u16 offset, u8 reg_width)
112 switch (reg_width) {
82 bcma_host_pci_block_read(struct bcma_device *core, void *buffer, size_t count, u16 offset, u8 reg_width) argument
105 bcma_host_pci_block_write(struct bcma_device *core, const void *buffer, size_t count, u16 offset, u8 reg_width) argument
H A Dhost_soc.c51 size_t count, u16 offset, u8 reg_width)
55 switch (reg_width) {
95 size_t count, u16 offset, u8 reg_width)
99 switch (reg_width) {
50 bcma_host_soc_block_read(struct bcma_device *core, void *buffer, size_t count, u16 offset, u8 reg_width) argument
93 bcma_host_soc_block_write(struct bcma_device *core, const void *buffer, size_t count, u16 offset, u8 reg_width) argument
/linux-master/drivers/clk/stm32/
H A Dreset-stm32.c34 int reg_width = sizeof(u32); local
35 int bank = id / (reg_width * BITS_PER_BYTE);
36 int offset = id % (reg_width * BITS_PER_BYTE);
41 addr = data->membase + (bank * reg_width);
53 reg = readl(data->membase + (bank * reg_width));
60 writel(reg, data->membase + (bank * reg_width));
84 int reg_width = sizeof(u32); local
85 int bank = id / (reg_width * BITS_PER_BYTE);
86 int offset = id % (reg_width * BITS_PER_BYTE);
89 reg = readl(data->membase + (bank * reg_width));
[all...]
/linux-master/drivers/dma/
H A Dat_hdmac.c1261 unsigned int reg_width; local
1288 reg_width = convert_buswidth(sconfig->dst_addr_width);
1289 ctrla |= FIELD_PREP(ATC_DST_WIDTH, reg_width);
1336 reg_width = convert_buswidth(sconfig->src_addr_width);
1337 ctrla |= FIELD_PREP(ATC_SRC_WIDTH, reg_width);
1374 len >> reg_width;
1406 atc_dma_cyclic_check_values(unsigned int reg_width, dma_addr_t buf_addr, argument
1409 if (period_len > (ATC_BTSIZE_MAX << reg_width))
1411 if (unlikely(period_len & ((1 << reg_width) - 1)))
1413 if (unlikely(buf_addr & ((1 << reg_width)
1426 atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc, unsigned int i, dma_addr_t buf_addr, unsigned int reg_width, size_t period_len, enum dma_transfer_direction direction) argument
1502 unsigned int reg_width; local
[all...]
H A Dtxx9dmac.c352 sai = ds->reg_width;
356 dai = ds->reg_width;
373 sai = ds->reg_width;
377 dai = ds->reg_width;
817 BUG_ON(!ds || !ds->reg_width);
860 sai = ds->reg_width;
864 dai = ds->reg_width;
1014 TXX9_DMA_CCR_XFSZ(__ffs(ds->reg_width));
/linux-master/drivers/dma/dw-axi-dmac/
H A Ddw-axi-dmac-platform.c401 u32 reg_width, val; local
408 reg_width = __ffs(chan->config.dst_addr_width);
409 if (reg_width == DWAXIDMAC_TRANS_WIDTH_16)
653 unsigned int reg_width; local
674 reg_width = __ffs(chan->config.dst_addr_width);
676 ctllo = reg_width << CH_CTL_L_DST_WIDTH_POS |
683 reg_width = __ffs(chan->config.src_addr_width);
685 ctllo = reg_width << CH_CTL_L_SRC_WIDTH_POS |
689 block_ts = len >> reg_width;
737 u32 data_width, reg_width, mem_widt local
[all...]
/linux-master/drivers/dma/dw/
H A Dcore.c627 unsigned int reg_width; local
645 reg_width = __ffs(sconfig->dst_addr_width);
648 | DWC_CTLL_DST_WIDTH(reg_width)
695 reg_width = __ffs(sconfig->src_addr_width);
698 | DWC_CTLL_SRC_WIDTH(reg_width)
718 ctlhi = dw->bytes2block(dwc, len, reg_width, &dlen);
/linux-master/drivers/gpio/
H A Dgpio-htc-egpio.c295 if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
298 ei->reg_shift = fls(pdata->reg_width - 1);
301 ei->reg_mask = (1 << pdata->reg_width) - 1;
/linux-master/drivers/input/misc/
H A Diqs7222.c799 int reg_width; member in struct:iqs7222_prop_desc
813 .reg_width = 8,
821 .reg_width = 8,
829 .reg_width = 1,
837 .reg_width = 1,
844 .reg_width = 1,
851 .reg_width = 1,
858 .reg_width = 3,
867 .reg_width = 1,
874 .reg_width
2074 int reg_width = iqs7222_props[i].reg_width; local
[all...]
/linux-master/drivers/input/touchscreen/
H A Diqs7211.c481 int reg_width; member in struct:iqs7211_prop_desc
507 .reg_width = 5,
528 .reg_width = 4,
549 .reg_width = 5,
567 .reg_width = 8,
579 .reg_width = 8,
621 .reg_width = 8,
631 .reg_width = 8,
727 .reg_width = 8,
747 .reg_width
1652 int reg_width = iqs7211_props[i].reg_width ? : 16; local
[all...]
/linux-master/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net_debugdump.c218 u32 reg_width; local
223 reg_width = be32_to_cpu(spec_csr->register_width);
225 return reg_width == 32 || reg_width == 64;
/linux-master/drivers/pinctrl/renesas/
H A Dcore.c139 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width) argument
141 switch (reg_width) {
154 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, argument
157 switch (reg_width) {
211 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
214 *posp = crp->reg_width;
232 crp->reg, value, field, crp->reg_width, hweight32(mask));
237 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width);
242 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
254 unsigned int r_width = config_reg->reg_width;
[all...]
H A Dcore.h23 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width);
24 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,
H A Dgpio.c60 return sh_pfc_read_raw_reg(mem, dreg->reg_width);
69 sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
81 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
82 for (bit = 0; bit < dreg->reg_width; bit++) {
103 for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
111 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
155 pos = reg->info->reg_width - (bit + 1);
187 pos = reg->info->reg_width - (bit + 1);
H A Dsh_pfc.h104 u8 reg_width, field_width; member in struct:pinmux_cfg_reg
129 .reg = r, .reg_width = r_width, \
149 .reg = r, .reg_width = r_width, \
186 u8 reg_width; member in struct:pinmux_data_reg
199 .reg = r, .reg_width = r_width + \

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