1271294Sngie// SPDX-License-Identifier: GPL-2.0 2271294Sngie/* 3271294Sngie * SuperH Pin Function Controller GPIO driver. 4271294Sngie * 5271294Sngie * Copyright (C) 2008 Magnus Damm 6271294Sngie * Copyright (C) 2009 - 2012 Paul Mundt 7271294Sngie */ 8271294Sngie 9271294Sngie#include <linux/device.h> 10271294Sngie#include <linux/gpio/driver.h> 11271294Sngie#include <linux/module.h> 12271294Sngie#include <linux/pinctrl/consumer.h> 13271294Sngie#include <linux/slab.h> 14271294Sngie#include <linux/spinlock.h> 15271294Sngie 16271294Sngie#include "core.h" 17271294Sngie 18271294Sngiestruct sh_pfc_gpio_data_reg { 19271294Sngie const struct pinmux_data_reg *info; 20271294Sngie u32 shadow; 21271294Sngie}; 22271294Sngie 23271294Sngiestruct sh_pfc_gpio_pin { 24271294Sngie u8 dbit; 25271294Sngie u8 dreg; 26271294Sngie}; 27271294Sngie 28271294Sngiestruct sh_pfc_chip { 29271294Sngie struct sh_pfc *pfc; 30271294Sngie struct gpio_chip gpio_chip; 31271294Sngie 32271294Sngie struct sh_pfc_window *mem; 33271294Sngie struct sh_pfc_gpio_data_reg *regs; 34271294Sngie struct sh_pfc_gpio_pin *pins; 35271294Sngie}; 36271294Sngie 37271294Sngiestatic struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) 38271294Sngie{ 39271294Sngie struct sh_pfc_chip *chip = gpiochip_get_data(gc); 40271294Sngie return chip->pfc; 41271294Sngie} 42271294Sngie 43271294Sngiestatic void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset, 44271294Sngie struct sh_pfc_gpio_data_reg **reg, 45271294Sngie unsigned int *bit) 46271294Sngie{ 47271294Sngie int idx = sh_pfc_get_pin_index(chip->pfc, offset); 48271294Sngie struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx]; 49271294Sngie 50271294Sngie *reg = &chip->regs[gpio_pin->dreg]; 51271294Sngie *bit = gpio_pin->dbit; 52271294Sngie} 53271294Sngie 54271294Sngiestatic u32 gpio_read_data_reg(struct sh_pfc_chip *chip, 55271294Sngie const struct pinmux_data_reg *dreg) 56271294Sngie{ 57271294Sngie phys_addr_t address = dreg->reg; 58271294Sngie void __iomem *mem = address - chip->mem->phys + chip->mem->virt; 59271294Sngie 60271294Sngie return sh_pfc_read_raw_reg(mem, dreg->reg_width); 61271294Sngie} 62271294Sngie 63271294Sngiestatic void gpio_write_data_reg(struct sh_pfc_chip *chip, 64271294Sngie const struct pinmux_data_reg *dreg, u32 value) 65271294Sngie{ 66271294Sngie phys_addr_t address = dreg->reg; 67271294Sngie void __iomem *mem = address - chip->mem->phys + chip->mem->virt; 68271294Sngie 69271294Sngie sh_pfc_write_raw_reg(mem, dreg->reg_width, value); 70271294Sngie} 71271294Sngie 72271294Sngiestatic void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned idx) 73271294Sngie{ 74271294Sngie struct sh_pfc *pfc = chip->pfc; 75271294Sngie struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx]; 76271294Sngie const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; 77271294Sngie const struct pinmux_data_reg *dreg; 78271294Sngie unsigned int bit; 79271294Sngie unsigned int i; 80271294Sngie 81271294Sngie for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { 82271294Sngie for (bit = 0; bit < dreg->reg_width; bit++) { 83271294Sngie if (dreg->enum_ids[bit] == pin->enum_id) { 84271294Sngie gpio_pin->dreg = i; 85271294Sngie gpio_pin->dbit = bit; 86271294Sngie return; 87271294Sngie } 88271294Sngie } 89271294Sngie } 90271294Sngie 91271294Sngie BUG(); 92271294Sngie} 93271294Sngie 94271294Sngiestatic int gpio_setup_data_regs(struct sh_pfc_chip *chip) 95271294Sngie{ 96271294Sngie struct sh_pfc *pfc = chip->pfc; 97271294Sngie const struct pinmux_data_reg *dreg; 98271294Sngie unsigned int i; 99271294Sngie 100271294Sngie /* Count the number of data registers, allocate memory and initialize 101271294Sngie * them. 102271294Sngie */ 103271294Sngie for (i = 0; pfc->info->data_regs[i].reg_width; ++i) 104271294Sngie ; 105271294Sngie 106271294Sngie chip->regs = devm_kcalloc(pfc->dev, i, sizeof(*chip->regs), 107271294Sngie GFP_KERNEL); 108271294Sngie if (chip->regs == NULL) 109271294Sngie return -ENOMEM; 110271294Sngie 111271294Sngie for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { 112271294Sngie chip->regs[i].info = dreg; 113271294Sngie chip->regs[i].shadow = gpio_read_data_reg(chip, dreg); 114271294Sngie } 115271294Sngie 116271294Sngie for (i = 0; i < pfc->info->nr_pins; i++) { 117271294Sngie if (pfc->info->pins[i].enum_id == 0) 118271294Sngie continue; 119271294Sngie 120271294Sngie gpio_setup_data_reg(chip, i); 121271294Sngie } 122271294Sngie 123271294Sngie return 0; 124271294Sngie} 125271294Sngie 126271294Sngie/* ----------------------------------------------------------------------------- 127271294Sngie * Pin GPIOs 128271294Sngie */ 129271294Sngie 130271294Sngiestatic int gpio_pin_request(struct gpio_chip *gc, unsigned offset) 131271294Sngie{ 132271294Sngie struct sh_pfc *pfc = gpio_to_pfc(gc); 133271294Sngie int idx = sh_pfc_get_pin_index(pfc, offset); 134271294Sngie 135271294Sngie if (idx < 0 || pfc->info->pins[idx].enum_id == 0) 136271294Sngie return -EINVAL; 137271294Sngie 138271294Sngie return pinctrl_gpio_request(gc, offset); 139271294Sngie} 140271294Sngie 141271294Sngiestatic void gpio_pin_free(struct gpio_chip *gc, unsigned offset) 142271294Sngie{ 143271294Sngie return pinctrl_gpio_free(gc, offset); 144271294Sngie} 145271294Sngie 146271294Sngiestatic void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset, 147271294Sngie int value) 148271294Sngie{ 149271294Sngie struct sh_pfc_gpio_data_reg *reg; 150271294Sngie unsigned int bit; 151271294Sngie unsigned int pos; 152271294Sngie 153271294Sngie gpio_get_data_reg(chip, offset, ®, &bit); 154271294Sngie 155271294Sngie pos = reg->info->reg_width - (bit + 1); 156271294Sngie 157271294Sngie if (value) 158271294Sngie reg->shadow |= BIT(pos); 159271294Sngie else 160271294Sngie reg->shadow &= ~BIT(pos); 161271294Sngie 162271294Sngie gpio_write_data_reg(chip, reg->info, reg->shadow); 163271294Sngie} 164271294Sngie 165271294Sngiestatic int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset) 166271294Sngie{ 167271294Sngie return pinctrl_gpio_direction_input(gc, offset); 168271294Sngie} 169271294Sngie 170271294Sngiestatic int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset, 171271294Sngie int value) 172271294Sngie{ 173271294Sngie gpio_pin_set_value(gpiochip_get_data(gc), offset, value); 174271294Sngie 175271294Sngie return pinctrl_gpio_direction_output(gc, offset); 176271294Sngie} 177271294Sngie 178271294Sngiestatic int gpio_pin_get(struct gpio_chip *gc, unsigned offset) 179271294Sngie{ 180271294Sngie struct sh_pfc_chip *chip = gpiochip_get_data(gc); 181271294Sngie struct sh_pfc_gpio_data_reg *reg; 182271294Sngie unsigned int bit; 183271294Sngie unsigned int pos; 184271294Sngie 185271294Sngie gpio_get_data_reg(chip, offset, ®, &bit); 186271294Sngie 187271294Sngie pos = reg->info->reg_width - (bit + 1); 188271294Sngie 189271294Sngie return (gpio_read_data_reg(chip, reg->info) >> pos) & 1; 190271294Sngie} 191271294Sngie 192271294Sngiestatic void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value) 193271294Sngie{ 194271294Sngie gpio_pin_set_value(gpiochip_get_data(gc), offset, value); 195271294Sngie} 196271294Sngie 197271294Sngiestatic int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset) 198271294Sngie{ 199271294Sngie struct sh_pfc *pfc = gpio_to_pfc(gc); 200271294Sngie unsigned int i, k; 201271294Sngie 202271294Sngie for (i = 0; i < pfc->info->gpio_irq_size; i++) { 203271294Sngie const short *gpios = pfc->info->gpio_irq[i].gpios; 204271294Sngie 205271294Sngie for (k = 0; gpios[k] >= 0; k++) { 206271294Sngie if (gpios[k] == offset) 207271294Sngie return pfc->irqs[i]; 208271294Sngie } 209271294Sngie } 210271294Sngie 211271294Sngie return 0; 212271294Sngie} 213271294Sngie 214271294Sngiestatic int gpio_pin_setup(struct sh_pfc_chip *chip) 215271294Sngie{ 216271294Sngie struct sh_pfc *pfc = chip->pfc; 217271294Sngie struct gpio_chip *gc = &chip->gpio_chip; 218271294Sngie int ret; 219271294Sngie 220271294Sngie chip->pins = devm_kcalloc(pfc->dev, 221271294Sngie pfc->info->nr_pins, sizeof(*chip->pins), 222271294Sngie GFP_KERNEL); 223271294Sngie if (chip->pins == NULL) 224271294Sngie return -ENOMEM; 225271294Sngie 226271294Sngie ret = gpio_setup_data_regs(chip); 227271294Sngie if (ret < 0) 228271294Sngie return ret; 229271294Sngie 230271294Sngie gc->request = gpio_pin_request; 231271294Sngie gc->free = gpio_pin_free; 232271294Sngie gc->direction_input = gpio_pin_direction_input; 233271294Sngie gc->get = gpio_pin_get; 234271294Sngie gc->direction_output = gpio_pin_direction_output; 235271294Sngie gc->set = gpio_pin_set; 236271294Sngie gc->to_irq = gpio_pin_to_irq; 237271294Sngie 238271294Sngie gc->label = pfc->info->name; 239271294Sngie gc->parent = pfc->dev; 240271294Sngie gc->owner = THIS_MODULE; 241271294Sngie gc->base = IS_ENABLED(CONFIG_PINCTRL_SH_FUNC_GPIO) ? 0 : -1; 242271294Sngie gc->ngpio = pfc->nr_gpio_pins; 243271294Sngie 244271294Sngie return 0; 245271294Sngie} 246271294Sngie 247271294Sngie/* ----------------------------------------------------------------------------- 248271294Sngie * Function GPIOs 249271294Sngie */ 250271294Sngie 251271294Sngie#ifdef CONFIG_PINCTRL_SH_FUNC_GPIO 252271294Sngiestatic int gpio_function_request(struct gpio_chip *gc, unsigned offset) 253271294Sngie{ 254271294Sngie struct sh_pfc *pfc = gpio_to_pfc(gc); 255271294Sngie unsigned int mark = pfc->info->func_gpios[offset].enum_id; 256271294Sngie unsigned long flags; 257271294Sngie int ret; 258271294Sngie 259271294Sngie dev_notice_once(pfc->dev, 260271294Sngie "Use of GPIO API for function requests is deprecated, convert to pinctrl\n"); 261271294Sngie 262271294Sngie if (mark == 0) 263271294Sngie return -EINVAL; 264271294Sngie 265271294Sngie spin_lock_irqsave(&pfc->lock, flags); 266271294Sngie ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION); 267271294Sngie spin_unlock_irqrestore(&pfc->lock, flags); 268271294Sngie 269271294Sngie return ret; 270271294Sngie} 271271294Sngie 272271294Sngiestatic int gpio_function_setup(struct sh_pfc_chip *chip) 273271294Sngie{ 274271294Sngie struct sh_pfc *pfc = chip->pfc; 275271294Sngie struct gpio_chip *gc = &chip->gpio_chip; 276271294Sngie 277271294Sngie gc->request = gpio_function_request; 278271294Sngie 279271294Sngie gc->label = pfc->info->name; 280271294Sngie gc->owner = THIS_MODULE; 281271294Sngie gc->base = pfc->nr_gpio_pins; 282271294Sngie gc->ngpio = pfc->info->nr_func_gpios; 283271294Sngie 284271294Sngie return 0; 285271294Sngie} 286271294Sngie#endif /* CONFIG_PINCTRL_SH_FUNC_GPIO */ 287271294Sngie 288271294Sngie/* ----------------------------------------------------------------------------- 289271294Sngie * Register/unregister 290271294Sngie */ 291271294Sngie 292271294Sngiestatic struct sh_pfc_chip * 293271294Sngiesh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *), 294271294Sngie struct sh_pfc_window *mem) 295271294Sngie{ 296271294Sngie struct sh_pfc_chip *chip; 297271294Sngie int ret; 298271294Sngie 299271294Sngie chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL); 300271294Sngie if (unlikely(!chip)) 301271294Sngie return ERR_PTR(-ENOMEM); 302271294Sngie 303271294Sngie chip->mem = mem; 304271294Sngie chip->pfc = pfc; 305271294Sngie 306271294Sngie ret = setup(chip); 307271294Sngie if (ret < 0) 308271294Sngie return ERR_PTR(ret); 309271294Sngie 310271294Sngie ret = devm_gpiochip_add_data(pfc->dev, &chip->gpio_chip, chip); 311271294Sngie if (unlikely(ret < 0)) 312271294Sngie return ERR_PTR(ret); 313271294Sngie 314271294Sngie dev_info(pfc->dev, "%s handling gpio %u -> %u\n", 315271294Sngie chip->gpio_chip.label, chip->gpio_chip.base, 316271294Sngie chip->gpio_chip.base + chip->gpio_chip.ngpio - 1); 317271294Sngie 318271294Sngie return chip; 319271294Sngie} 320271294Sngie 321271294Sngieint sh_pfc_register_gpiochip(struct sh_pfc *pfc) 322271294Sngie{ 323271294Sngie struct sh_pfc_chip *chip; 324271294Sngie phys_addr_t address; 325271294Sngie unsigned int i; 326271294Sngie 327271294Sngie if (pfc->info->data_regs == NULL) 328271294Sngie return 0; 329271294Sngie 330271294Sngie /* Find the memory window that contains the GPIO registers. Boards that 331271294Sngie * register a separate GPIO device will not supply a memory resource 332271294Sngie * that covers the data registers. In that case don't try to handle 333271294Sngie * GPIOs. 334271294Sngie */ 335271294Sngie address = pfc->info->data_regs[0].reg; 336271294Sngie for (i = 0; i < pfc->num_windows; ++i) { 337271294Sngie struct sh_pfc_window *window = &pfc->windows[i]; 338271294Sngie 339271294Sngie if (address >= window->phys && 340271294Sngie address < window->phys + window->size) 341271294Sngie break; 342271294Sngie } 343271294Sngie 344271294Sngie if (i == pfc->num_windows) 345271294Sngie return 0; 346271294Sngie 347271294Sngie /* If we have IRQ resources make sure their number is correct. */ 348271294Sngie if (pfc->num_irqs != pfc->info->gpio_irq_size) { 349271294Sngie dev_err(pfc->dev, "invalid number of IRQ resources\n"); 350271294Sngie return -EINVAL; 351271294Sngie } 352271294Sngie 353271294Sngie /* Register the real GPIOs chip. */ 354271294Sngie chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]); 355271294Sngie if (IS_ERR(chip)) 356271294Sngie return PTR_ERR(chip); 357271294Sngie 358271294Sngie pfc->gpio = chip; 359271294Sngie 360271294Sngie if (IS_ENABLED(CONFIG_OF) && pfc->dev->of_node) 361271294Sngie return 0; 362271294Sngie 363271294Sngie#ifdef CONFIG_PINCTRL_SH_FUNC_GPIO 364271294Sngie /* 365271294Sngie * Register the GPIO to pin mappings. As pins with GPIO ports 366271294Sngie * must come first in the ranges, skip the pins without GPIO 367271294Sngie * ports by stopping at the first range that contains such a 368271294Sngie * pin. 369271294Sngie */ 370271294Sngie for (i = 0; i < pfc->nr_ranges; ++i) { 371271294Sngie const struct sh_pfc_pin_range *range = &pfc->ranges[i]; 372271294Sngie int ret; 373271294Sngie 374271294Sngie if (range->start >= pfc->nr_gpio_pins) 375271294Sngie break; 376271294Sngie 377271294Sngie ret = gpiochip_add_pin_range(&chip->gpio_chip, 378271294Sngie dev_name(pfc->dev), range->start, range->start, 379271294Sngie range->end - range->start + 1); 380271294Sngie if (ret < 0) 381271294Sngie return ret; 382271294Sngie } 383271294Sngie 384271294Sngie /* Register the function GPIOs chip. */ 385271294Sngie if (pfc->info->nr_func_gpios) { 386271294Sngie chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL); 387271294Sngie if (IS_ERR(chip)) 388271294Sngie return PTR_ERR(chip); 389271294Sngie } 390271294Sngie#endif /* CONFIG_PINCTRL_SH_FUNC_GPIO */ 391271294Sngie 392271294Sngie return 0; 393271294Sngie} 394271294Sngie