Searched refs:pin (Results 1 - 25 of 826) sorted by last modified time

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/linux-master/drivers/pinctrl/renesas/
H A Dpinctrl-rzg2l.c37 * Use 16 lower bits [15:0] for pin identifier
38 * Use 16 higher bits [31:16] for pin mux function
87 * and f is pin configuration capabilities supported.
95 * and f is pin configuration capabilities supported.
100 * BIT(63) indicates dedicated pin, p is the register index while
102 * (b * 8) and f is the pin configuration capabilities supported.
217 * @oen_max_pin: the maximum pin number supporting output enable
238 * struct rzg2l_variable_pin_cfg - pin data cfg
239 * @cfg: port pin configuration
241 * @pin
246 u32 pin:3; member in struct:rzg2l_variable_pin_cfg
326 rzg2l_pinctrl_get_variable_pin_cfg(struct rzg2l_pinctrl *pctrl, u64 pincfg, unsigned int port, u8 pin) argument
462 rzg2l_pinctrl_set_pfc_mode(struct rzg2l_pinctrl *pctrl, u8 pin, u8 off, u8 func) argument
524 u32 pin = RZG2L_PIN_ID_TO_PIN(pins[i]); local
577 const char *pin; local
850 rzg2l_get_power_source(struct rzg2l_pinctrl *pctrl, u32 pin, u32 caps) argument
878 rzg2l_set_power_source(struct rzg2l_pinctrl *pctrl, u32 pin, u32 caps, u32 ps) argument
1015 rzg2l_oen_is_supported(u32 caps, u8 pin, u8 max_pin) argument
1026 rzg2l_pin_to_oen_bit(u32 offset, u8 pin, u8 max_port) argument
1037 rzg2l_read_oen(struct rzg2l_pinctrl *pctrl, u32 caps, u32 offset, u8 pin) argument
1051 rzg2l_write_oen(struct rzg2l_pinctrl *pctrl, u32 caps, u32 offset, u8 pin, u8 oen) argument
1082 const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin]; local
1183 const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin]; local
2534 u8 pin; local
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/linux-master/drivers/pinctrl/mediatek/
H A Dpinctrl-paris.c3 * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin
58 * and standard PIN_CONFIG_DRIVE_STRENGTH_UA pin configs.
105 unsigned int pin)
110 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
118 unsigned int pin, bool input)
123 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
130 unsigned int pin, unsigned long *config)
137 if (pin >= hw->soc->npins)
140 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
258 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, argument
103 mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin) argument
116 mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin, bool input) argument
129 mtk_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) argument
354 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin) argument
371 const struct mtk_pin_desc *pin = hw->soc->pins + pin_num; local
389 const struct mtk_pin_desc *pin = hw->soc->pins + i; local
407 mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl, u32 pin, u32 fnum, struct mtk_pinctrl_group *grp, struct pinctrl_map **map, unsigned *reserved_maps, unsigned *num_maps) argument
447 u32 pinfunc, pin, func; local
1000 const struct mtk_pin_desc *pin = hw->soc->pins + i; local
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/linux-master/drivers/pinctrl/intel/
H A Dpinctrl-baytrail.c93 * pin control implementation will set the muxing value to default GPIO if it
605 dev_warn(vg->dev, "Group %s, pin %i not muxed (can't retrieve CONF0)\n",
631 dev_warn(vg->dev, "Group %s, pin %i not muxed (can't retrieve CONF0)\n",
662 /* SCORE pin 92-93 */
667 /* SUS pin 11-21 */
702 * In most cases, func pin mux 000 means GPIO function.
703 * But, some pins may have func pin mux 001 represents
1143 unsigned int pin; local
1145 pin = vg->soc->pins[i].number;
1147 conf_reg = byt_gpio_reg(vg, pin, BYT_CONF0_RE
1353 u32 base, pin; local
1374 byt_direct_irq_sanity_check(struct intel_pinctrl *vg, int pin, u32 conf0) argument
1435 unsigned int pin = vg->soc->pins[i].number; local
1637 unsigned int pin = vg->soc->pins[i].number; local
1669 unsigned int pin = vg->soc->pins[i].number; local
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H A Dpinctrl-intel.h27 * @grp: Generic data of the pin group (name and pins)
29 * @modes: If not %NULL this will hold mode for each pin in @pins
39 * @func: Generic data of the pin function (name and groups of pins)
50 * @base: Starting pin of this group
71 * @INTEL_GPIO_BASE_MATCH: matches with starting pin number
80 * struct intel_community - Intel pin community description
87 * is assumed that the host owns the pin (rather than
92 * @pin_base: Starting pin of pins in this community
168 * PIN_GROUP - Declare a pin group
173 * pin
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/linux-master/drivers/pinctrl/
H A Dcore.c3 * Core driver for the pin control subsystem
51 /* Global list of pin control devices (struct pinctrl_dev) */
54 /* List of pin controller handles (struct pinctrl) */
94 * get_pinctrl_dev_from_devname() - look up pin controller device
97 * Looks up a pin control device matching a certain device name or pure device
140 * pin_get_from_name() - look up a pin number from a name
141 * @pctldev: the pin control device to lookup the pin on
142 * @name: the name of the pin to look up
146 unsigned int i, pin; local
167 pin_get_name(struct pinctrl_dev *pctldev, const unsigned int pin) argument
204 pinctrl_register_one_pin(struct pinctrl_dev *pctldev, const struct pinctrl_pin_desc *pin) argument
284 unsigned int pin = gc->base + offset - range->base; local
481 pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev, unsigned int pin) argument
510 pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, unsigned int pin) argument
764 int pin; local
800 int ret, pin; local
835 int ret, pin; local
858 int pin; local
922 int ret, pin; local
1649 unsigned int i, pin; local
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/linux-master/mm/
H A Dhugetlb.c1328 bool pin = !!(current->flags & PF_MEMALLOC_PIN); local
1332 if (pin && !folio_is_longterm_pinnable(folio))
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c1062 adev->mode_info.audio.pin[i].channels = -1;
1063 adev->mode_info.audio.pin[i].rate = -1;
1064 adev->mode_info.audio.pin[i].bits_per_sample = -1;
1065 adev->mode_info.audio.pin[i].status_bits = 0;
1066 adev->mode_info.audio.pin[i].category_code = 0;
1067 adev->mode_info.audio.pin[i].connected = false;
1068 adev->mode_info.audio.pin[i].id =
1070 adev->mode_info.audio.pin[i].offset = 0;
1100 static void amdgpu_dm_audio_eld_notify(struct amdgpu_device *adev, int pin) argument
1105 DRM_DEBUG_KMS("Notify ELD: %d\n", pin);
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/linux-master/drivers/gpio/
H A Dgpio-tegra186.c111 tegra186_gpio_get_port(struct tegra_gpio *gpio, unsigned int *pin) argument
118 if (*pin >= start && *pin < start + port->pins) {
119 *pin -= start;
130 unsigned int pin)
135 port = tegra186_gpio_get_port(gpio, &pin);
141 return gpio->base + offset + pin * 0x20;
145 unsigned int pin)
150 port = tegra186_gpio_get_port(gpio, &pin);
156 return gpio->secure + offset + pin * TEGRA186_GPIO_SCR_PIN_SIZ
129 tegra186_gpio_get_base(struct tegra_gpio *gpio, unsigned int pin) argument
144 tegra186_gpio_get_secure_base(struct tegra_gpio *gpio, unsigned int pin) argument
159 tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned int pin) argument
438 unsigned int pin = gpio->soc->pin_ranges[i].offset, port; local
466 unsigned int port, pin, i, offset = 0; local
638 unsigned int pin; local
673 unsigned int port, pin, i, offset = 0; local
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H A Dgpio-lpc32xx.c179 unsigned pin, int input)
182 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
185 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
190 unsigned pin, int input)
192 u32 u = GPIO3_PIN_TO_BIT(pin);
201 unsigned pin, int high)
204 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
207 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
212 unsigned pin, int high)
214 u32 u = GPIO3_PIN_TO_BIT(pin);
178 __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group, unsigned pin, int input) argument
189 __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int input) argument
200 __set_gpio_level_p012(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
211 __set_gpio_level_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
222 __set_gpo_level_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
231 __get_gpio_state_p012(struct lpc32xx_gpio_chip *group, unsigned pin) argument
238 __get_gpio_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
250 __get_gpi_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
256 __get_gpo_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
265 lpc32xx_gpio_dir_input_p012(struct gpio_chip *chip, unsigned pin) argument
275 lpc32xx_gpio_dir_input_p3(struct gpio_chip *chip, unsigned pin) argument
285 lpc32xx_gpio_dir_in_always(struct gpio_chip *chip, unsigned pin) argument
291 lpc32xx_gpio_get_value_p012(struct gpio_chip *chip, unsigned pin) argument
298 lpc32xx_gpio_get_value_p3(struct gpio_chip *chip, unsigned pin) argument
305 lpc32xx_gpi_get_value(struct gpio_chip *chip, unsigned pin) argument
312 lpc32xx_gpio_dir_output_p012(struct gpio_chip *chip, unsigned pin, int value) argument
323 lpc32xx_gpio_dir_output_p3(struct gpio_chip *chip, unsigned pin, int value) argument
334 lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin, int value) argument
343 lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin, int value) argument
351 lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin, int value) argument
359 lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned pin, int value) argument
367 lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin) argument
374 lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin) argument
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/linux-master/drivers/dpll/
H A Ddpll_core.c72 dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin, argument
83 if (ref->pin != pin)
98 ref->pin = pin;
100 ret = xa_insert(xa_pins, pin->pin_idx, ref, GFP_KERNEL);
111 xa_erase(xa_pins, pin->pin_idx);
126 static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin, argument
135 if (ref->pin != pin)
486 struct dpll_pin *pin; local
588 dpll_pin_put(struct dpll_pin *pin) argument
603 __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv, void *cookie) argument
637 dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv) argument
660 __dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv, void *cookie) argument
680 dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv) argument
710 dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv) argument
767 dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv) argument
821 dpll_pin_on_dpll_priv(struct dpll_device *dpll, struct dpll_pin *pin) argument
834 dpll_pin_on_pin_priv(struct dpll_pin *parent, struct dpll_pin *pin) argument
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/linux-master/drivers/bluetooth/
H A Dbtusb.c3324 /* Configure an out-of-band gpio as wake-up pin, if specified in device tree */
3330 u16 pin, gap, opcode; local
3334 /* Move on if no wakeup pin specified */
3335 if (of_property_read_u16(dev->of_node, "marvell,wakeup-pin", &pin) ||
3339 /* Vendor specific command to configure a GPIO as wake-up pin */
3344 cmd[3] = pin;
3345 cmd[4] = gap; /* time in ms, for which wakeup pin should be asserted */
4099 /* Use an oob wakeup pin? */
/linux-master/fs/bcachefs/
H A Djournal_io.c1629 if (seq >= j->pin.front)
H A Dbtree_key_cache.c656 * in the journal right away - we don't want to pin that old journal
721 struct journal_entry_pin *pin, u64 seq)
725 container_of(pin, struct bkey_cached, journal);
782 * To minimize lock contention, we only add the journal pin here and
783 * defer pin updates to the flush callback via ->seq. Be careful not to
785 * pin to a seq that doesn't include journal updates on disk. Otherwise
788 * The only exception is if the pin is not active in the first place. We
789 * have to add the pin because journal reclaim drives key cache
791 * the latest pin, so make sure it starts with a consistent value.
720 bch2_btree_key_cache_journal_flush(struct journal *j, struct journal_entry_pin *pin, u64 seq) argument
H A Dbtree_write_buffer.c141 EBUG_ON(!trans->c->btree_write_buffer.flushing.pin.seq);
142 EBUG_ON(trans->c->btree_write_buffer.flushing.pin.seq > wb->journal_seq);
213 bch2_journal_pin_add(j, wb->inc.keys.data[0].journal_seq, &wb->flushing.pin,
240 bch2_journal_pin_drop(j, &wb->inc.pin);
242 bch2_journal_pin_update(j, wb->inc.keys.data[0].journal_seq, &wb->inc.pin,
284 * journal we won't be able to drop our journal pin until everything is
388 bch2_journal_pin_update(j, i->journal_seq, &wb->flushing.pin,
407 bch2_journal_pin_drop(j, &wb->flushing.pin);
446 (wb->inc.pin.seq && wb->inc.pin
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H A Dbtree_trans_commit.c203 static int __btree_node_flush(struct journal *j, struct journal_entry_pin *pin, argument
207 struct btree_write *w = container_of(pin, struct btree_write, journal);
236 int bch2_btree_node_flush0(struct journal *j, struct journal_entry_pin *pin, u64 seq) argument
238 return __btree_node_flush(j, pin, 0, seq);
241 int bch2_btree_node_flush1(struct journal *j, struct journal_entry_pin *pin, u64 seq) argument
243 return __btree_node_flush(j, pin, 1, seq);
1120 * how the journal sequence number to pin is passed in - so we must
/linux-master/arch/x86/kvm/vmx/
H A Dvmx.h614 BUILD_CONTROLS_SHADOW(pin, PIN_BASED_VM_EXEC_CONTROL, 32)
/linux-master/arch/x86/include/asm/
H A Dkvm_host.h1952 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
/linux-master/tools/include/uapi/linux/
H A Dkvm.h923 __u32 pin; member in struct:kvm_irq_routing_irqchip
/linux-master/sound/pci/hda/
H A Dpatch_realtek.c561 const struct hda_pincfg *pin; local
566 * the default pin setup at the next load of the driver
571 snd_array_for_each(&codec->init_pins, i, pin) {
573 if (pin->nid != mic_pin)
574 snd_hda_codec_read(codec, pin->nid, 0,
640 /* get a primary headphone pin if available */
769 * port-A --> pin 39/41, port-E --> pin 14/15, port-D --> pin 35/36
789 /* invalid SSID, check the special NID pin defcf
4292 alc_update_vref_led(struct hda_codec *codec, hda_nid_t pin, bool polarity, bool on) argument
4350 int pol, pin; local
4366 alc269_fixup_hp_mute_led_micx(struct hda_codec *codec, const struct hda_fixup *fix, int action, hda_nid_t pin) argument
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/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_ttm_buffer.c575 .pin = true
H A Dvmwgfx_gem.c105 .pin = vmw_gem_object_pin,
140 .pin = false
165 .pin = false,
H A Dvmwgfx_drv.c402 .pin = true
H A Dvmwgfx_bo.h57 bool pin; member in struct:vmw_bo_params
114 void vmw_bo_pin_reserved(struct vmw_bo *bo, bool pin);
H A Dvmwgfx_bo.c63 * @placement: The placement to pin it.
169 * @buf: DMA buffer to pin.
276 * @pin: Whether to pin or unpin.
279 void vmw_bo_pin_reserved(struct vmw_bo *vbo, bool pin)
290 if (pin == !!bo->pin_count)
306 if (pin)
404 if (params->pin)
278 vmw_bo_pin_reserved(struct vmw_bo *vbo, bool pin) argument
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_atombios.c205 ATOM_GPIO_PIN_ASSIGNMENT *pin; local
218 pin = gpio_info->asGPIO_Pin;
220 if (id == pin->ucGPIO_ID) {
221 gpio.id = pin->ucGPIO_ID;
222 gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex) * 4;
223 gpio.shift = pin->ucGpioPinBitShift;
224 gpio.mask = (1 << pin->ucGpioPinBitShift);
228 pin = (ATOM_GPIO_PIN_ASSIGNMENT *)
229 ((u8 *)pin + sizeof(ATOM_GPIO_PIN_ASSIGNMENT));
409 * both share the same encoder, hpd pin, an
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