Lines Matching refs:pin
111 tegra186_gpio_get_port(struct tegra_gpio *gpio, unsigned int *pin)
118 if (*pin >= start && *pin < start + port->pins) {
119 *pin -= start;
130 unsigned int pin)
135 port = tegra186_gpio_get_port(gpio, &pin);
141 return gpio->base + offset + pin * 0x20;
145 unsigned int pin)
150 port = tegra186_gpio_get_port(gpio, &pin);
156 return gpio->secure + offset + pin * TEGRA186_GPIO_SCR_PIN_SIZE;
159 static inline bool tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned int pin)
164 secure = tegra186_gpio_get_secure_base(gpio, pin);
176 * registers for given GPIO pin.
179 * GPIO pin.
438 unsigned int pin = gpio->soc->pin_ranges[i].offset, port;
441 port = pin / 8;
442 pin = pin % 8;
451 pin += gpio->soc->ports[j].pins;
453 err = gpiochip_add_pingroup_range(chip, pctldev, pin, group);
466 unsigned int port, pin, i, offset = 0;
475 pin = spec->args[0] % 8;
488 return offset + pin;
638 unsigned int pin;
655 for_each_set_bit(pin, &value, port->pins) {
656 int ret = generic_handle_domain_irq(domain, offset + pin);
657 WARN_RATELIMIT(ret, "hwirq = %d", offset + pin);
673 unsigned int port, pin, i, offset = 0;
682 pin = fwspec->param[0] % 8;
691 *hwirq = offset + pin;
770 * On Tegra194 and later, each pin can be routed to one or more