/linux-master/drivers/net/ethernet/mellanox/mlx4/ |
H A D | en_port.h | 75 #define MLX4_PROT_MASK(link_mode) (1<<link_mode)
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_hpo_dp_link_encoder.c | 465 MODE, (uint32_t *)&state->link_mode);
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
H A D | dcn10_hwseq.c | 571 (hpo_dp_le_state.link_mode == 0) ? "TPS1" : 572 (hpo_dp_le_state.link_mode == 1) ? "TPS2" : 573 (hpo_dp_le_state.link_mode == 2) ? "ACTIVE" : "TEST",
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/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | link_encoder.h | 218 uint32_t link_mode; member in struct:hpo_dp_link_enc_state
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/linux-master/drivers/gpu/drm/bridge/ |
H A D | sil-sii8620.c | 1165 u8 link_mode = MHL_DST_LM_PATH_ENABLED; local 1168 link_mode |= MHL_DST_LM_CLK_MODE_PACKED_PIXEL; 1170 link_mode |= MHL_DST_LM_CLK_MODE_NORMAL; 1172 sii8620_mt_write_stat(ctx, MHL_DST_REG(LINK_MODE), link_mode); 1683 u8 link_mode; local 1686 link_mode = MHL_DST_LM_CLK_MODE_PACKED_PIXEL; 1688 link_mode = MHL_DST_LM_CLK_MODE_NORMAL; 1691 link_mode |= MHL_DST_LM_PATH_ENABLED; 1694 link_mode);
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/linux-master/drivers/net/ethernet/broadcom/bnxt/ |
H A D | bnxt_ethtool.c | 2354 enum ethtool_link_mode_bit_indices link_mode; local 2378 link_mode = bnxt_link_modes[speed][sig_mode][media]; 2379 if (!link_mode) 2382 switch (link_mode) { 2385 link_mode = ETHTOOL_LINK_MODE_100baseT_Half_BIT; 2389 link_mode = ETHTOOL_LINK_MODE_1000baseT_Half_BIT; 2395 return link_mode; 2520 enum ethtool_link_mode_bit_indices link_mode; local 2529 link_mode = bnxt_link_modes[speed][sig_mode][media]; 2530 if (!link_mode) 2786 enum ethtool_link_mode_bit_indices link_mode; local [all...] |
/linux-master/drivers/net/ethernet/hisilicon/hns3/ |
H A D | hclge_mbx.h | 192 __le64 link_mode; member in struct:hclge_mbx_link_mode
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/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
H A D | hclge_main.c | 1046 unsigned long *link_mode) 1052 linkmode_set_bit(hclge_sr_link_mode_bmap[i].link_mode, 1053 link_mode); 1058 unsigned long *link_mode) 1064 linkmode_set_bit(hclge_lr_link_mode_bmap[i].link_mode, 1065 link_mode); 1070 unsigned long *link_mode) 1076 linkmode_set_bit(hclge_cr_link_mode_bmap[i].link_mode, 1077 link_mode); 1082 unsigned long *link_mode) 1045 hclge_convert_setting_sr(u16 speed_ability, unsigned long *link_mode) argument 1057 hclge_convert_setting_lr(u16 speed_ability, unsigned long *link_mode) argument 1069 hclge_convert_setting_cr(u16 speed_ability, unsigned long *link_mode) argument 1081 hclge_convert_setting_kr(u16 speed_ability, unsigned long *link_mode) argument [all...] |
H A D | hclge_main.h | 1100 enum ethtool_link_mode_bit_indices link_mode; member in struct:hclge_link_mode_bmap
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H A D | hclge_mbx.c | 603 struct hclge_mbx_link_mode link_mode; local 615 link_mode.idx = cpu_to_le16((u16)mbx_req->msg.data[0]); 616 link_mode.link_mode = cpu_to_le64(send_data); 618 hclge_send_mbx_msg(vport, (u8 *)&link_mode, sizeof(link_mode),
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/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3vf/ |
H A D | hclgevf_mbx.c | 303 struct hclge_mbx_link_mode *link_mode; local 345 link_mode = (struct hclge_mbx_link_mode *)(msg_q + 1); 346 idx = le16_to_cpu(link_mode->idx); 349 le64_to_cpu(link_mode->link_mode); 352 le64_to_cpu(link_mode->link_mode);
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/linux-master/drivers/net/ethernet/huawei/hinic/ |
H A D | hinic_ethtool.c | 184 static int hinic_get_link_mode_index(enum hinic_link_mode link_mode) argument 189 if (link_mode == hw_to_ethtool_link_mode_table[i].hw_link_mode) 200 enum hinic_link_mode link_mode; local 203 for (link_mode = 0; link_mode < HINIC_LINK_MODE_NUMBERS; link_mode++) { 204 if (hw_link_mode & ((u32)1 << link_mode)) { 205 idx = hinic_get_link_mode_index(link_mode); 260 struct hinic_link_mode_cmd link_mode = { 0 }; local 299 err = hinic_get_link_mode(nic_dev->hwdev, &link_mode); 347 enum hinic_link_mode link_mode; local 367 struct hinic_link_mode_cmd link_mode = { 0 }; local [all...] |
H A D | hinic_port.c | 1092 struct hinic_link_mode_cmd *link_mode) 1097 if (!hwdev || !link_mode) 1100 link_mode->func_id = HINIC_HWIF_FUNC_IDX(hwdev->hwif); 1101 out_size = sizeof(*link_mode); 1104 link_mode, sizeof(*link_mode), 1105 link_mode, &out_size); 1106 if (err || !out_size || link_mode->status) { 1109 err, link_mode->status, out_size); 1091 hinic_get_link_mode(struct hinic_hwdev *hwdev, struct hinic_link_mode_cmd *link_mode) argument
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H A D | hinic_port.h | 852 struct hinic_link_mode_cmd *link_mode);
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/linux-master/drivers/net/ethernet/intel/ice/ |
H A D | ice_ethtool.c | 1761 linkmode_set_bit(phy_to_ethtool->link_mode, ks->link_modes.supported); 1765 linkmode_set_bit(phy_to_ethtool->link_mode,
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H A D | ice_ethtool.h | 9 u8 link_mode; member in struct:ice_phy_type_to_ethtool 17 .link_mode = ETHTOOL_LINK_MODE_##ETHTOOL_LINK_MODE##_BIT, \
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/linux-master/drivers/net/ethernet/intel/igb/ |
H A D | e1000_82575.c | 558 u32 link_mode = 0; local 627 link_mode = ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK; 628 switch (link_mode) { 650 if (link_mode == E1000_CTRL_EXT_LINK_MODE_SGMII) {
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/linux-master/drivers/net/ethernet/intel/ixgbe/ |
H A D | ixgbe_82598.c | 590 u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK; local 600 else if (link_mode == IXGBE_AUTOC_LMS_KX4_AN || 601 link_mode == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) {
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H A D | ixgbe_82599.c | 777 u32 pma_pmd_10g_serial, pma_pmd_1g, link_mode, links_reg, i; local 808 link_mode = autoc & IXGBE_AUTOC_LMS_MASK; 811 if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR || 812 link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN || 813 link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII) { 826 (link_mode == IXGBE_AUTOC_LMS_1G_LINK_NO_AN || 827 link_mode == IXGBE_AUTOC_LMS_1G_AN)) { 835 (link_mode == IXGBE_AUTOC_LMS_10G_SERIAL)) { 855 if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR || 856 link_mode [all...] |
H A D | ixgbe_ethtool.c | 3408 u32 link_mode; member in struct:__anon596 3419 u32 link_mode; member in struct:__anon597 3444 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3450 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3456 linkmode_set_bit(ixgbe_lp_map[i].link_mode,
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/linux-master/drivers/net/ethernet/marvell/octeontx2/nic/ |
H A D | otx2_ethtool.c | 33 enum link_mode { enum
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/linux-master/drivers/net/ethernet/marvell/prestera/ |
H A D | prestera_hw.c | 271 __le64 link_mode; member in struct:prestera_msg_port_cap_param 287 __le32 link_mode; member in union:prestera_msg_port_param 1279 caps->supp_link_modes = __le64_to_cpu(resp.param.cap.link_mode);
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/linux-master/drivers/net/ethernet/mellanox/mlx5/core/en/ |
H A D | port.c | 318 enum mlx5e_fec_supported_link_mode link_mode) 320 return link_mode < MLX5E_FEC_FIRST_50G_PER_LANE_MODE || 321 (link_mode < MLX5E_FEC_FIRST_100G_PER_LANE_MODE && 323 (link_mode >= MLX5E_FEC_FIRST_100G_PER_LANE_MODE && 329 enum mlx5e_fec_supported_link_mode link_mode) 331 switch (link_mode) { 382 enum mlx5e_fec_supported_link_mode link_mode) 384 switch (link_mode) { 317 mlx5e_is_fec_supported_link_mode(struct mlx5_core_dev *dev, enum mlx5e_fec_supported_link_mode link_mode) argument 328 mlx5e_fec_admin_field(u32 *pplm, u16 *fec_policy, bool write, enum mlx5e_fec_supported_link_mode link_mode) argument 381 mlx5e_get_fec_cap_field(u32 *pplm, u16 *fec_cap, enum mlx5e_fec_supported_link_mode link_mode) argument
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/linux-master/drivers/net/ethernet/mellanox/mlxsw/ |
H A D | spectrum_ethtool.c | 1918 mlxsw_sp2_set_bit_ethtool(const struct mlxsw_sp2_port_link_mode *link_mode, argument 1923 for (i = 0; i < link_mode->m_ethtool_len; i++) 1924 __set_bit(link_mode->mask_ethtool[i], mode); 1999 mlxsw_sp2_test_bit_ethtool(const struct mlxsw_sp2_port_link_mode *link_mode, argument 2005 for (i = 0; i < link_mode->m_ethtool_len; i++) { 2006 if (test_bit(link_mode->mask_ethtool[i], mode)) 2010 return cnt == link_mode->m_ethtool_len; 2032 struct mlxsw_sp2_port_link_mode link_mode; local 2041 link_mode = mlxsw_sp2_port_link_mode[i]; 2048 if (mask_width & link_mode [all...] |
/linux-master/drivers/net/ethernet/sun/ |
H A D | cassini.c | 178 static int link_mode; variable 186 module_param(link_mode, int, 0); 187 MODULE_PARM_DESC(link_mode, "default link mode"); 4981 if (link_mode >= 0 && link_mode < 6) 4982 cp->link_cntl = link_modes[link_mode];
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