Searched refs:lanes (Results 1 - 25 of 277) sorted by last modified time

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/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_vbt_defs.h707 u8 lanes:4; member in struct:edp_fast_link_params
H A Dintel_bios.c1445 switch (edp_link_params->lanes) {
1447 panel->vbt.edp.lanes = 1;
1450 panel->vbt.edp.lanes = 2;
1453 panel->vbt.edp.lanes = 4;
1458 edp_link_params->lanes);
H A Dintel_audio.c429 unsigned int link_clk, lanes; local
440 lanes = crtc_state->lane_count;
443 "h_active = %u link_clk = %u : lanes = %u vdsc_bpp = " BPP_X16_FMT " cdclk = %u\n",
444 h_active, link_clk, lanes, BPP_X16_ARGS(vdsc_bppx16), cdclk);
446 if (WARN_ON(!link_clk || !pixel_clk || !lanes || !vdsc_bppx16 || !cdclk))
450 link_clks_required = DIV_ROUND_UP(192000 * h_total, 1000 * pixel_clk) * (48 / lanes + 2);
459 mul_u32_u32(link_clk * lanes * 16, fec_coeff));
472 unsigned int link_clk, lanes; local
478 lanes = crtc_state->lane_count;
481 (pixel_clk * (48 / lanes
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H A Dintel_display_types.h324 int lanes; member in struct:intel_vbt_panel_data::__anon17
/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_main.c2799 fec_stats->corrected_blocks.lanes[i] =
2801 fec_stats->uncorrectable_blocks.lanes[i] =
/linux-master/drivers/usb/dwc3/
H A Dgadget.c4077 u8 lanes = 1; local
4088 lanes = DWC3_DSTS_CONNLANES(reg) + 1;
4107 if (lanes > 1)
4133 if (lanes > 1) {
/linux-master/drivers/usb/core/
H A Dhub.c2766 * capability attributes. Base on the number of connected lanes and speed,
2776 u8 lanes; local
2787 lanes = USB_EXT_PORT_RX_LANES(ext_portstatus) + 1;
2822 if (mantissa >= 10 && lanes == 1)
2825 if (mantissa >= 10 && lanes == 2)
2828 if (mantissa >= 5 && lanes == 2)
/linux-master/drivers/phy/rockchip/
H A Dphy-rockchip-snps-pcie3.c62 u32 lanes[4]; member in struct:rockchip_p3phy_priv
100 dev_info(&phy->dev, "lane number %d, val %d\n", i, priv->lanes[i]);
101 if (priv->lanes[i] > 1)
145 if (priv->lanes[i] > 1)
147 if (priv->lanes[i] == 3)
149 if (priv->lanes[i] == 4)
264 priv->num_lanes = of_property_read_variable_u32_array(dev->of_node, "data-lanes",
265 priv->lanes, 2,
266 ARRAY_SIZE(priv->lanes));
268 /* if no data-lanes assum
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/linux-master/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-combo.c2090 for (i = 0; i < dp_opts->lanes; i++) {
2127 if (dp_opts->lanes == 1) {
2150 if (dp_opts->lanes == 4 || reverse)
2152 if (dp_opts->lanes == 4 || !reverse)
2397 if (dp_opts->lanes == 1) {
2402 } else if (dp_opts->lanes == 2) {
/linux-master/drivers/net/ethernet/mellanox/mlxsw/
H A Dcore.c3063 bool splittable, u32 lanes,
3075 attrs.lanes = lanes;
3113 bool splittable, u32 lanes,
3122 splittable, lanes,
3059 __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port, enum devlink_port_flavour flavour, u8 slot_index, u32 port_number, bool split, u32 split_port_subnumber, bool splittable, u32 lanes, const unsigned char *switch_id, unsigned char switch_id_len) argument
3110 mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port, u8 slot_index, u32 port_number, bool split, u32 split_port_subnumber, bool splittable, u32 lanes, const unsigned char *switch_id, unsigned char switch_id_len) argument
/linux-master/drivers/gpu/drm/gma500/
H A Dpsb_drv.h525 int lanes; member in struct:drm_psb_private::__anon16
/linux-master/drivers/thunderbolt/
H A Dusb4.c1626 * @lanes: Which lanes to run (must match the port capabilities). Can be
1636 int usb4_port_hw_margin(struct tb_port *port, unsigned int lanes, argument
1643 val = lanes;
1669 * @lanes: Which lanes to run (must match the port capabilities). Can be
1679 int usb4_port_sw_margin(struct tb_port *port, unsigned int lanes, bool timing, argument
1685 val = lanes;
2550 * usb4_dp_port_nrd() - Read non-reduced rate and lanes
2553 * @lanes
2559 usb4_dp_port_nrd(struct tb_port *port, int *rate, int *lanes) argument
2615 usb4_dp_port_set_nrd(struct tb_port *port, int rate, int lanes) argument
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H A Dtb.h254 * @bonded: true if the port is bonded (two lanes combined as one)
593 return "symmetric, dual lanes";
1336 int usb4_port_hw_margin(struct tb_port *port, unsigned int lanes,
1339 int usb4_port_sw_margin(struct tb_port *port, unsigned int lanes, bool timing,
1377 int usb4_dp_port_nrd(struct tb_port *port, int *rate, int *lanes);
1378 int usb4_dp_port_set_nrd(struct tb_port *port, int rate, int lanes);
H A Dtunnel.c567 u32 lanes = (val & DP_COMMON_CAP_LANES_MASK) >> DP_COMMON_CAP_LANES_SHIFT; local
569 switch (lanes) {
581 static inline u32 tb_dp_cap_set_lanes(u32 val, u32 lanes) argument
584 switch (lanes) {
586 WARN(1, "invalid number of lanes %u passed, defaulting to 1\n",
587 lanes);
602 static unsigned int tb_dp_bandwidth(unsigned int rate, unsigned int lanes) argument
606 return rate * lanes * 128 / 132;
607 return rate * lanes * 8 / 10;
615 /* Mb/s, lanes */
759 u32 rate, lanes; local
940 int ret, rate, lanes, max_bw; local
1109 tb_dp_read_cap(struct tb_tunnel *tunnel, unsigned int cap, u32 *rate, u32 *lanes) argument
1167 u32 rate = 0, lanes = 0; local
1304 u32 dp_cap, rate, lanes; local
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/linux-master/drivers/gpu/drm/panel/
H A Dpanel-novatek-nt36672e.c40 unsigned int lanes; member in struct:panel_desc
524 .lanes = 4,
585 dsi->lanes = ctx->desc->lanes;
H A Dpanel-visionox-rm69299.c220 dsi->lanes = 4;
/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h135 unsigned int lanes; member in struct:smu_state_pcie_block
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu.h589 void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
/linux-master/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c2705 u8 rate, lanes; local
2712 err = drm_dp_dpcd_readb(aux, DP_TEST_LANE_COUNT, &lanes);
2715 data->num_lanes = lanes & DP_MAX_LANE_COUNT_MASK;
2717 if (lanes & DP_ENHANCED_FRAME_CAP)
4132 * After each 250 data symbols on 2-4 lanes:
4136 * After 256 (2-4 lanes) or 128 (1 lane) FEC blocks:
4203 * Given a link rate and lanes, get the data bandwidth.
/linux-master/drivers/net/ethernet/hisilicon/hns3/
H A Dhns3_ethtool.c755 &cmd->lanes);
854 cmd->base.duplex == duplex && cmd->lanes == lane_num)
891 if (cmd->lanes && !hnae3_ae_dev_lane_num_supported(ae_dev))
895 "set link(%s): autoneg=%u, speed=%u, duplex=%u, lanes=%u\n",
898 cmd->lanes);
936 cmd->base.duplex, (u8)(cmd->lanes));
/linux-master/net/devlink/
H A Dport.c210 if (attrs->lanes) {
211 if (nla_put_u32(msg, DEVLINK_ATTR_PORT_LANES, attrs->lanes))
825 if (count < 2 || !is_power_of_2(count) || count > devlink_port->attrs.lanes) {
/linux-master/drivers/phy/tegra/
H A Dxusb.c35 if (!pad->lanes[i])
38 if (pad->lanes[i]->dev.of_node == args->np) {
39 phy = pad->lanes[i];
103 struct device_node *np, *lanes; local
105 lanes = of_get_child_by_name(pad->dev.of_node, "lanes");
106 if (!lanes)
109 np = of_get_child_by_name(lanes, pad->soc->lanes[index].name);
110 of_node_put(lanes);
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/linux-master/drivers/gpu/drm/bridge/
H A Dlontium-lt9611uxc.c280 dsi->lanes = 4;
H A Dlontium-lt8912b.c353 u32 lanes = lt->data_lanes; local
356 regmap_write(lt->regmap[I2C_CEC_DSI], 0x13, lanes & 3);
511 dsi->lanes = lt->data_lanes;
707 dev_err(lt->dev, "%s: Bad data-lanes property\n", __func__);
/linux-master/drivers/staging/media/atomisp/pci/
H A Datomisp_v4l2.c693 u8 lanes[N_MIPI_PORT_ID]; member in struct:__anon564
747 isp->sensor_lanes[j] != portconfigs[i].lanes[j])
765 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
766 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
767 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
768 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
769 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
770 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
776 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[
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