Searched refs:defaults (Results 1 - 25 of 43) sorted by path

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/linux-master/arch/m68k/math-emu/
H A Dfp_util.S99 clr.l %d1 | sign defaults to zero
/linux-master/drivers/net/ethernet/mellanox/mlx4/
H A Dsense.c66 enum mlx4_port_type *defaults)
78 stype[i - 1] = defaults[i - 1];
80 stype[i - 1] = defaults[i - 1];
87 stype[i] = stype[i] ? stype[i] : defaults[i];
64 mlx4_do_sense_ports(struct mlx4_dev *dev, enum mlx4_port_type *stype, enum mlx4_port_type *defaults) argument
/linux-master/scripts/
H A Dpatch-kernel5 # The source directory defaults to /usr/src/linux, and the patch
6 # directory defaults to the current directory.
64 # Set directories from arguments, or use defaults.
72 source directory defaults to /usr/src/linux,
73 patch directory defaults to the current directory,
74 stopversion defaults to <all in patchdir>.
/linux-master/tools/testing/ktest/examples/
H A Dtest.conf38 # See include/defaults.conf
41 # The defaults file will set up various settings that can be used by all
43 INCLUDE include/defaults.conf
/linux-master/drivers/base/regmap/
H A Dregmap-kunit.c76 struct reg_default *defaults; local
93 defaults = kcalloc(config->num_reg_defaults,
96 if (!defaults)
98 config->reg_defaults = defaults;
101 defaults[i].reg = i * config->reg_stride;
102 defaults[i].def = buf[i * config->reg_stride];
340 /* We should have read the cache defaults back from the map */
366 /* We need defaults so readback works */
771 /* We need defaults so readback works */
884 /* No defaults s
1008 struct reg_default *defaults; local
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/linux-master/drivers/dma/idxd/
H A DMakefile7 idxd-y := init.o irq.o device.o sysfs.o submit.o dma.o cdev.o debugfs.o defaults.o
/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dci_smumgr.c516 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; local
518 smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en;
519 smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc;
530 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; local
536 defaults->tdc_vddc_throttle_release_limit_perc;
537 smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt;
545 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; local
556 smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;
719 const struct ci_pt_defaults *defaults = smu_data->power_tune_defaults; local
733 dpm_table->DTEAmbientTempBase = defaults
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H A Dfiji_smumgr.c488 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; local
514 dpm_table->DTEAmbientTempBase = defaults->DTEAmbientTempBase;
571 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; local
573 smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn;
574 smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC;
588 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; local
597 defaults->TDC_VDDC_ThrottleReleaseLimitPerc;
598 smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt;
606 const struct fiji_pt_defaults *defaults = smu_data->power_tune_defaults; local
617 smu_data->power_tune_table.TdcWaterfallCtl = defaults
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H A Diceland_smumgr.c309 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; local
311 smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en;
312 smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc;
323 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; local
329 defaults->tdc_vddc_throttle_release_limit_perc;
330 smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt;
338 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; local
349 smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl;
1853 const struct iceland_pt_defaults *defaults = smu_data->power_tune_defaults; local
1875 dpm_table->DTEAmbientTempBase = defaults
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H A Dpolaris10_smumgr.c431 const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; local
458 pdef1 = defaults->BAPMTI_R;
459 pdef2 = defaults->BAPMTI_RC;
493 const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; local
495 smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn;
496 smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC;
509 const struct polaris10_pt_defaults *defaults = smu_data->power_tune_defaults; local
515 defaults->TDC_VDDC_ThrottleReleaseLimitPerc;
516 smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt;
524 const struct polaris10_pt_defaults *defaults local
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H A Dtonga_smumgr.c1830 const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; local
1850 dpm_table->DTEAmbientTempBase = defaults->dte_ambient_temp_base;
1853 PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient);
1854 pdef1 = defaults->bapmti_r;
1855 pdef2 = defaults->bapmti_rc;
1877 const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; local
1879 smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en;
1880 smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddC;
1892 const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; local
1903 defaults
1913 const struct tonga_pt_defaults *defaults = smu_data->power_tune_defaults; local
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H A Dvegam_smumgr.c1442 const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; local
1469 pdef1 = defaults->BAPMTI_R;
1470 pdef2 = defaults->BAPMTI_RC;
1733 const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; local
1735 smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn;
1736 smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC;
1749 const struct vegam_pt_defaults *defaults = smu_data->power_tune_defaults; local
1755 defaults->TDC_VDDC_ThrottleReleaseLimitPerc;
1756 smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt;
1764 const struct vegam_pt_defaults *defaults local
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/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_engine_cs.c551 engine->defaults = engine->props; /* never to change again */
1696 * defaults to 100ms. In most cases the follow up operation is to wait
2311 read_ul(&engine->defaults, p->offset));
H A Dintel_engine_heartbeat.c42 delay == engine->defaults.heartbeat_interval_ms) {
324 if (delay != engine->defaults.heartbeat_interval_ms &&
H A Dintel_engine_types.h634 } props, defaults; member in struct:intel_engine_cs
H A Dintel_gt_sysfs_pm.c768 return sysfs_emit(buf, "%u\n", gt->defaults.min_freq);
779 return sysfs_emit(buf, "%u\n", gt->defaults.max_freq);
792 return sysfs_emit(buf, "%u\n", gt->defaults.rps_up_threshold);
805 return sysfs_emit(buf, "%u\n", gt->defaults.rps_down_threshold);
891 gt_warn(gt, "failed to add rps defaults (%pe)\n", ERR_PTR(ret));
H A Dintel_gt_types.h283 /* sysfs defaults per gt */
284 struct gt_defaults defaults; member in struct:intel_gt
H A Dintel_rps.c1225 /* Program defaults and thresholds for RPS */
1332 /* 1: Program defaults and thresholds for RPS*/
2003 rps_to_gt(rps)->defaults.max_freq = rps->max_freq_softlimit;
2005 rps_to_gt(rps)->defaults.min_freq = rps->min_freq_softlimit;
2023 rps_to_gt(rps)->defaults.rps_up_threshold = rps->power.up_threshold;
2025 rps_to_gt(rps)->defaults.rps_down_threshold = rps->power.down_threshold;
H A Dselftest_engine_heartbeat.c17 engine->defaults.heartbeat_interval_ms);
406 engine->defaults.heartbeat_interval_ms;
428 engine->defaults.heartbeat_interval_ms;
H A Dselftest_execlists.c2369 engine->defaults.heartbeat_interval_ms);
H A Dselftest_lrc.c968 u32 *defaults; local
980 defaults = shmem_pin_map(ce->engine->default_state);
981 if (!defaults) {
989 hw = defaults;
1022 igt_hexdump(defaults, PAGE_SIZE);
1042 shmem_unpin_map(ce->engine->default_state, defaults);
1139 u32 *defaults; local
1151 defaults = shmem_pin_map(ce->engine->default_state);
1152 if (!defaults) {
1159 hw = defaults;
1269 u32 *defaults; local
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H A Dsysfs_engines.c194 return sysfs_emit(buf, "%lu\n", engine->defaults.max_busywait_duration_ns);
248 return sysfs_emit(buf, "%lu\n", engine->defaults.timeslice_duration_ms);
299 return sysfs_emit(buf, "%lu\n", engine->defaults.stop_timeout_ms);
356 return sysfs_emit(buf, "%lu\n", engine->defaults.preempt_timeout_ms);
411 return sysfs_emit(buf, "%lu\n", engine->defaults.heartbeat_interval_ms);
467 if (kobject_add(&ke->base, &parent->base, "%s", ".defaults")) {
/linux-master/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_slpc.c577 * unless they have deviated from defaults, in which case,
582 slpc_to_gt(slpc)->defaults.max_freq = slpc->max_freq_softlimit;
594 slpc_to_gt(slpc)->defaults.min_freq = slpc->min_freq_softlimit;
629 (slpc_to_gt(slpc))->defaults.min_freq = slpc->min_freq_softlimit;
/linux-master/drivers/gpu/drm/xe/
H A Dxe_hw_engine.c467 hwe->eclass->defaults = hwe->eclass->sched_props;
H A Dxe_hw_engine_class_sysfs.c153 return sprintf(buf, "%u\n", eclass->defaults.job_timeout_ms);
164 return sprintf(buf, "%u\n", eclass->defaults.job_timeout_min);
175 return sprintf(buf, "%u\n", eclass->defaults.job_timeout_max);
296 return sprintf(buf, "%u\n", eclass->defaults.timeslice_us);
307 return sprintf(buf, "%u\n", eclass->defaults.timeslice_min);
318 return sprintf(buf, "%u\n", eclass->defaults.timeslice_max);
363 return sprintf(buf, "%u\n", eclass->defaults.preempt_timeout_us);
375 return sprintf(buf, "%u\n", eclass->defaults.preempt_timeout_min);
387 return sprintf(buf, "%u\n", eclass->defaults.preempt_timeout_max);
467 static const struct attribute *defaults[] variable in typeref:struct:attribute
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