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3b780089 |
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03-Aug-2023 |
Ruan Jinjie <ruanjinjie@huawei.com> |
drm/amdgpu: Remove a lot of unnecessary ternary operators There are many ternary operators, the true or false judgement of which is unnecessary in C language semantics. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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48c35c42 |
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20-Sep-2022 |
ye xingchen <ye.xingchen@zte.com.cn> |
drm/amd/pm: Remove unneeded result variable Return the value atomctrl_initialize_mc_reg_table_v2_2() directly instead of storing it in another redundant variable. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2d5da9e6 |
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26-Nov-2020 |
Lee Jones <lee.jones@linaro.org> |
drm/amd/pm/powerplay/smumgr/polaris10_smumgr: Make function called by reference static Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/polaris10_smumgr.c:2145:5: warning: no previous prototype for ‘polaris10_thermal_avfs_enable’ [-Wmissing-prototypes] Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b251d357 |
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19-Nov-2020 |
Gustavo A. R. Silva <gustavoars@kernel.org> |
drm/amd/pm: Fix fall-through warnings for Clang In preparation to enable -Wimplicit-fallthrough for Clang, fix a couple of warnings by explicitly adding a break statement instead of letting the code fall through to the next case, and a fallthrough pseudo-keyword as a replacement for a /* fall through */ comment, Notice that Clang doesn't recognize /* fall through */ comments as implicit fall-through markings. Link: https://github.com/KSPP/linux/issues/115 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9182fefc |
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25-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct SMC sclk/mclk boot level setup Correct Polaris smc boot level setup. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ba4601fe |
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25-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct clk/voltage dependence setup Correct Polaris10 clk/voltage dependence setup. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d765129a |
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25-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct sclk/mclk dpm enablement Correct Polaris10 sclk/mclk dpm enablement. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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326d0ff7 |
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25-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct platformcaps setup Correct Polaris10 platformcaps setup. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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55411d16 |
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25-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct VRconfig setting Correct Polaris VRconfig setting. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a6d8a6eb |
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25-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct vddc phase control setting Correct Polaris10 vddc phase control. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b23dbd60 |
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24-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct avfs fuse settings Correct Polaris10 avfs fuse setting. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a8588b8b |
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24-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct VR shared rail info Add VR shared rail info. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5f92b48c |
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24-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: add mc register table initialization Add mc register table initialization. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9610a3bf |
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11-Sep-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: setup zero rpm parameters for polaris10 Only if the ZeroRPM feature is supported. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c420418f |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct polaris10 clock stretcher data table setting By using the saved copy of ro_range_maximum and ro_range_minimum. Correct the setting for "LdoRefSel". Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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55544082 |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: optimize AC timing programming Programming AC Timing Parameters is only dependent on MCLK. No need to nest loop for each SCLK DPM level. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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7f95a2e0 |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop arb table first byte workaround As this is not needed for polaris. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e9016fc2 |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: add pptable VRHotLevel setting Add missing VRHotLevel setting. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3a9f6bb2 |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the BootLinkLevel setup Set the BootLinkLevel as the max level. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a193d977 |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the ACPI table setup V2 Correct the setting for "ActivityLevel". V2: rich the comment Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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0232af1c |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct mclk table setup Correct the settings for "StutterEnable" and "EnabledForActivity". Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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374b0781 |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct sclk table setup Correct Polaris10 sclk table setup. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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8849fe64 |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct vddci table setup Make sure the settings are applied only when voltage controlled by gpio. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3df9931b |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: populate smc samu table Add missing smc samu table setup. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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10efb75b |
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18-Jun-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: populate smc vddc table Add missing vddc table setup. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e098bc96 |
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13-Aug-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: optimize the power related source code layout The target is to provide a clear entry point(for power routines). Also this can help to maintain a clear view about the frameworks used on different ASICs. Hopefully all these can make power part more friendly to play with. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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