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e48c8cbe |
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15-Dec-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Add missing definitions for `SMU_MAX_LEVELS_VDDGFX` It is reported that on a Topaz dGPU the kernel emits: amdgpu: can't get the mac of 5 This is because there is no definition for max levels of VDDGFX declared for SMU71 or SMU7. The correct definition is VDDC so use this. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3049 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6f8e98b9 |
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01-Aug-2023 |
Ruan Jinjie <ruanjinjie@huawei.com> |
drm/amd/pm: Remove many unnecessary NULL values Ther are many pointers assigned first, which need not to be initialized, so remove the NULL assignment. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e5975d78 |
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14-Jan-2023 |
Deepak R Varma <drv@mailo.com> |
drm/amd/pm/powerplay/smumgr/ci: use bitwise or for bitmasks addition For bit mask addition, it is recommended to use or operator "|" instead of numerical addition as the former is quicker and cleaner. Change suggested by orplus.cocci Coccinelle semantic patch. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Deepak R Varma <drv@mailo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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77910a62 |
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11-Jan-2023 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/amdgpu: Do not include <linux/fb.h> Remove unnecessary include statements for <linux/fb.h>. No functional changes. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20230111130206.29974-5-tzimmermann@suse.de
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a685572c |
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20-Jan-2022 |
Guchun Chen <guchun.chen@amd.com> |
drm/amd/pm: use dev_*** to print output in multiple GPUs In multiple GPU configuration, when failed to send a SMU message, it's hard to figure out which GPU has such problem. So it's not comfortable to user. [40190.142181] amdgpu: [powerplay] last message was failed ret is 65535 [40190.242420] amdgpu: [powerplay] failed to send message 201 ret is 65535 [40190.392763] amdgpu: [powerplay] last message was failed ret is 65535 [40190.492997] amdgpu: [powerplay] failed to send message 200 ret is 65535 [40190.743575] amdgpu: [powerplay] last message was failed ret is 65535 [40190.843812] amdgpu: [powerplay] failed to send message 282 ret is 65535 Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cfcc59d4 |
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30-Nov-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/powerplay/ci: return an error if copying to smc fails Rather than just silently dropping it. Also fixes a set but unused variable warning. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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786436b4 |
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26-Oct-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running This reverts commit f87812284172a9809820d10143b573d833cd3f75 ("drm/amdgpu: Fix bug where DPM is not enabled after hibernate and resume"). It was intended to fix Hawaii S4(hibernation) issue but break S3. As ixFEATURE_STATUS is filled with garbage data on resume which can be only cleared by reloading smc firmware(but that will involve many changes). So, we will revert this S4 fix and seek a new way. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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277b080f |
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15-Oct-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: perform SMC reset on suspend/hibernation So that the succeeding resume can be performed based on a clean state. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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52934da2 |
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26-Oct-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running This reverts commit f87812284172a9809820d10143b573d833cd3f75 ("drm/amdgpu: Fix bug where DPM is not enabled after hibernate and resume"). It was intended to fix Hawaii S4(hibernation) issue but break S3. As ixFEATURE_STATUS is filled with garbage data on resume which can be only cleared by reloading smc firmware(but that will involve many changes). So, we will revert this S4 fix and seek a new way. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e6bd6890 |
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15-Oct-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: perform SMC reset on suspend/hibernation So that the succeeding resume can be performed based on a clean state. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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177e38a4 |
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27-Aug-2020 |
Sandeep Raghuraman <sandy.8925@gmail.com> |
drm/amdgpu: Specify get_argument function for ci_smu_funcs Starting in Linux 5.8, the graphics and memory clock frequency were not being reported for CIK cards. This is a regression, since they were reported correctly in Linux 5.7. After investigation, I discovered that the smum_send_msg_to_smc() function, attempts to call the corresponding get_argument() function of ci_smu_funcs. However, the get_argument() function is not defined in ci_smu_funcs. This patch fixes the bug by specifying the correct get_argument() function. Fixes: a0ec225633d9f6 ("drm/amd/powerplay: unified interfaces for message issuing and response checking") Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e098bc96 |
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13-Aug-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: optimize the power related source code layout The target is to provide a clear entry point(for power routines). Also this can help to maintain a clear view about the frameworks used on different ASICs. Hopefully all these can make power part more friendly to play with. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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