/linux-master/arch/powerpc/include/asm/ |
H A D | cell-pmu.h | 22 #define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1)))) 52 #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) 68 extern u32 cbe_read_ctr(u32 cpu, u32 ctr); 69 extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val); 71 extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr); 72 extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val);
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H A D | kvm_book3s.h | 439 vcpu->arch.regs.ctr = val; 446 return vcpu->arch.regs.ctr;
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/linux-master/arch/x86/boot/ |
H A D | a20.c | 57 int saved, ctr; local 62 saved = ctr = rdfs32(A20_TEST_ADDR); 65 wrfs32(++ctr, A20_TEST_ADDR); 67 ok = rdgs32(A20_TEST_ADDR+0x10) ^ ctr;
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/linux-master/drivers/gpu/drm/nouveau/include/nvif/ |
H A D | if0003.h | 14 } ctr[4]; member in struct:nvif_perfdom_v0 30 __u32 ctr[4]; member in struct:nvif_perfdom_read_v0
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/linux-master/drivers/tty/serial/ |
H A D | suncore.c | 207 static int ctr = 0; local 213 if (mouse_got_break && ctr < 8) 217 ctr = 0; 222 ctr++;
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/linux-master/tools/perf/arch/powerpc/include/ |
H A D | dwarf-regs-table.h | 21 REG_DWARFNUM_NAME(ctr, 109),
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/linux-master/arch/arc/include/asm/ |
H A D | atomic-llsc.h | 14 "1: llock %[val], [%[ctr]] \n" \ 16 " scond %[val], [%[ctr]] \n" \ 19 : [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \ 30 "1: llock %[val], [%[ctr]] \n" \ 32 " scond %[val], [%[ctr]] \n" \ 35 : [ctr] "r" (&v->counter), \ 51 "1: llock %[orig], [%[ctr]] \n" \ 53 " scond %[val], [%[ctr]] \n" \ 57 : [ctr] "r" (&v->counter), \
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/linux-master/arch/arm/boot/compressed/ |
H A D | head.S | 696 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr
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/linux-master/arch/arm/crypto/ |
H A D | aes-ce-core.S | 375 * int blocks, u8 ctr[]) 380 vld1.8 {q7}, [r5] @ load ctr 382 vmov r6, s31 @ keep swabbed ctr in r6 435 adds r6, r6, #1 @ increment BE ctr 458 vmov ip, \sreg @ load next word of ctr
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H A D | aes-ce-glue.c | 13 #include <crypto/ctr.h> 44 int rounds, int blocks, u8 ctr[]); 650 .base.cra_name = "ctr(aes)", 651 .base.cra_driver_name = "ctr-aes-ce-sync",
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H A D | aes-neonbs-glue.c | 11 #include <crypto/ctr.h> 24 MODULE_ALIAS_CRYPTO("ctr(aes)"); 40 int rounds, int blocks, u8 ctr[]); 471 .base.cra_name = "ctr(aes)", 472 .base.cra_driver_name = "ctr-aes-neonbs-sync",
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H A D | ghash-ce-core.S | 383 ctr .req q13 440 vmov e0, ctr 456 vmov e0, ctr 460 vmov e1, ctr 464 vmov e2, ctr 467 vmov e3, ctr 482 vmov e0, ctr 484 vmov e1, ctr
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/linux-master/arch/arm/mm/ |
H A D | init.c | 170 u32 size, ctr; local 172 asm("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr)); 174 size = 1 << ((ctr & 0xf) + 2);
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H A D | proc-macros.S | 80 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr 98 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr
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/linux-master/arch/arm64/crypto/ |
H A D | aes-ce-ccm-glue.c | 41 u8 ctr[], u8 const final_iv[]); 45 u8 ctr[], u8 const final_iv[]);
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H A D | aes-glue.c | 12 #include <crypto/ctr.h> 63 MODULE_ALIAS_CRYPTO("ctr(aes)"); 93 int rounds, int bytes, u8 ctr[]); 96 int rounds, int bytes, u8 ctr[], int byte_ctr); 718 .cra_name = "ctr(aes)", 719 .cra_driver_name = "ctr-aes-" MODE,
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H A D | aes-neonbs-glue.c | 11 #include <crypto/ctr.h> 23 MODULE_ALIAS_CRYPTO("ctr(aes)"); 50 int rounds, int bytes, u8 ctr[]); 422 .base.cra_name = "ctr(aes)", 423 .base.cra_driver_name = "ctr-aes-neonbs",
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H A D | ghash-ce-glue.c | 59 u64 const h[][2], u64 dg[], u8 ctr[], 62 u64 const h[][2], u64 dg[], u8 ctr[],
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/linux-master/arch/arm64/include/asm/ |
H A D | cache.h | 58 #define CTR_L1IP(ctr) SYS_FIELD_GET(CTR_EL0, L1Ip, ctr) 108 u32 ctr = read_cpuid_cachetype(); local 110 if (!(ctr & BIT(CTR_EL0_IDC_SHIFT))) { 115 ctr |= BIT(CTR_EL0_IDC_SHIFT); 118 return ctr;
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H A D | kvm_mmu.h | 224 u64 ctr; 232 : "=r" (ctr)); 234 iminline = SYS_FIELD_GET(CTR_EL0, IminLine, ctr) + 2;
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/linux-master/arch/arm64/kernel/ |
H A D | cpufeature.c | 1680 u64 ctr; local 1683 ctr = arm64_ftr_reg_ctrel0.sys_val; 1685 ctr = read_cpuid_effective_cachetype(); 1687 return ctr & BIT(CTR_EL0_IDC_SHIFT); 1705 u64 ctr; local 1708 ctr = arm64_ftr_reg_ctrel0.sys_val; 1710 ctr = read_cpuid_cachetype(); 1712 return ctr & BIT(CTR_EL0_DIC_SHIFT);
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/linux-master/arch/arm64/kvm/ |
H A D | sys_regs.c | 224 u64 ctr = read_sanitised_ftr_reg(SYS_CTR_EL0); local 228 field = SYS_FIELD_GET(CTR_EL0, IminLine, ctr); 230 field = SYS_FIELD_GET(CTR_EL0, DminLine, ctr);
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/linux-master/arch/loongarch/kernel/ |
H A D | perf_event.c | 826 int ctr = loongarch_pmu.num_counters; local 831 ctr--; 832 cpuc->saved_ctrl[ctr] = loongarch_pmu_read_control(ctr); 833 loongarch_pmu_write_control(ctr, cpuc->saved_ctrl[ctr] & 835 } while (ctr > 0); 841 int ctr = loongarch_pmu.num_counters; local 845 ctr--; 846 loongarch_pmu_write_control(ctr, cpu [all...] |
/linux-master/arch/m68k/ifpsp060/ |
H A D | os.S | 93 dbra %d0,super_write | quit if --ctr < 0 100 dbra %d0,user_write | quit if --ctr < 0 126 dbra %d0,super_read | quit if --ctr < 0 133 dbra %d0,user_read | quit if --ctr < 0
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/linux-master/arch/mips/kernel/ |
H A D | perf_event_mipsxx.c | 1549 int ctr = mipspmu.num_counters; local 1554 ctr--; 1555 cpuc->saved_ctrl[ctr] = mipsxx_pmu_read_control(ctr); 1556 mipsxx_pmu_write_control(ctr, cpuc->saved_ctrl[ctr] & 1558 } while (ctr > 0); 1565 int ctr = mipspmu.num_counters; local 1568 ctr--; 1569 mipsxx_pmu_write_control(ctr, cpu [all...] |