/linux-master/sound/soc/ti/ |
H A D | davinci-mcasp.c | 21 #include <linux/clk.h> 689 dev_err(mcasp->dev, "Invalid clk id: %d\n", clk_id); 1832 struct clk *gfclk, *parent_clk;
|
/linux-master/sound/soc/tegra/ |
H A D | tegra186_dspk.c | 6 #include <linux/clk.h>
|
/linux-master/sound/soc/meson/ |
H A D | axg-tdm-interface.c | 6 #include <linux/clk.h>
|
H A D | axg-tdm.h | 10 #include <linux/clk.h> 27 struct clk *sclk; 28 struct clk *lrclk; 29 struct clk *mclk;
|
H A D | axg-tdm-formatter.c | 6 #include <linux/clk.h> 19 struct clk *pclk; 20 struct clk *sclk; 21 struct clk *lrclk; 22 struct clk *sclk_sel; 23 struct clk *lrclk_sel;
|
H A D | axg-fifo.c | 7 #include <linux/clk.h>
|
/linux-master/sound/soc/intel/boards/ |
H A D | bytcr_rt5640.c | 18 #include <linux/clk.h> 103 struct clk *mclk; 1270 /* Start with RC clk for jack-detect (we disable MCLK below) */
|
/linux-master/sound/soc/codecs/ |
H A D | da7219-aad.c | 12 #include <linux/clk.h>
|
/linux-master/include/linux/ |
H A D | regmap.h | 24 struct clk; 1210 int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
|
/linux-master/drivers/spi/ |
H A D | spi.c | 9 #include <linux/clk/clk-conf.h>
|
H A D | spi-axi-spi-engine.c | 8 #include <linux/clk.h> 105 struct clk *clk; member in struct:spi_engine 106 struct clk *ref_clk; 612 spi_engine->clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); 613 if (IS_ERR(spi_engine->clk)) 614 return PTR_ERR(spi_engine->clk);
|
/linux-master/drivers/net/ethernet/broadcom/genet/ |
H A D | bcmmii.c | 486 ppd.clk = priv->clk;
|
H A D | bcmgenet_wol.c | 20 #include <linux/clk.h>
|
H A D | bcmgenet.h | 12 #include <linux/clk.h> 611 struct clk *clk_eee; 638 struct clk *clk; member in struct:bcmgenet_priv 643 struct clk *clk_wol;
|
H A D | bcmgenet.c | 25 #include <linux/clk.h> 741 return clk_prepare_enable(priv->clk); 749 clk_disable_unprepare(priv->clk); 785 ret = clk_prepare_enable(priv->clk); 793 clk_disable_unprepare(priv->clk); 3367 clk_prepare_enable(priv->clk); 3441 clk_disable_unprepare(priv->clk); 3493 clk_disable_unprepare(priv->clk); 4066 priv->clk = devm_clk_get_optional(&priv->pdev->dev, "enet"); 4067 if (IS_ERR(priv->clk)) { [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | dcn31_fpu.c | 501 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 553 context->bw_ctx.bw.dcn.clk.p_state_change_support = 557 context->bw_ctx.bw.dcn.clk.socclk_khz = 0; 558 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; 559 context->bw_ctx.bw.dcn.clk.dcfclk_khz = 0; 560 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = 0; 561 context->bw_ctx.bw.dcn.clk.dramclk_khz = 0; 562 context->bw_ctx.bw.dcn.clk.fclk_khz = 0; 563 context->bw_ctx.bw.dcn.clk.p_state_change_support = true;
|
/linux-master/drivers/gpu/drm/amd/display/dc/core/ |
H A D | dc.c | 2064 TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk); 2291 TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk); 2734 if (!dc->clk_mgr->funcs->are_clock_states_equal(&dc->clk_mgr->clks, &dc->current_state->bw_ctx.bw.dcn.clk)) 2737 } else if (memcmp(&dc->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_clocks, prev_p_state_change_support)) != 0) { 4798 info->displayClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dispclk_khz; 4799 info->engineClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dcfclk_khz; 4800 info->memoryClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dramclk_khz; 4801 info->maxSupportedDppClock = (unsigned int)state->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz; 4802 info->dppClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dppclk_khz; 4803 info->socClock = (unsigned int)state->bw_ctx.bw.dcn.clk [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
H A D | dcn32_clk_mgr.c | 132 static void dcn32_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *entry_0, argument 138 uint32_t ret = dcn30_smu_get_dpm_freq_by_index(clk_mgr, clk, 0xFF); 150 *((unsigned int *)entry_i) = (dcn30_smu_get_dpm_freq_by_index(clk_mgr, clk, i) & 0xFFFF); 624 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; 727 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching)
|
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
H A D | dcn315_clk_mgr.c | 131 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; 229 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
|
/linux-master/drivers/pinctrl/renesas/ |
H A D | pinctrl-rzg2l.c | 10 #include <linux/clk.h> 306 struct clk *clk; member in struct:rzg2l_pinctrl 2389 pctrl->clk = devm_clk_get_enabled(pctrl->dev, NULL); 2390 if (IS_ERR(pctrl->clk)) { 2391 return dev_err_probe(pctrl->dev, PTR_ERR(pctrl->clk), 2392 "failed to enable GPIO clk\n"); 2592 clk_disable_unprepare(pctrl->clk); 2608 ret = clk_prepare_enable(pctrl->clk);
|
/linux-master/drivers/phy/rockchip/ |
H A D | phy-rockchip-naneng-combphy.c | 9 #include <linux/clk.h> 148 struct clk *refclk; 286 priv->refclk = priv->clks[i].clk;
|
H A D | phy-rockchip-snps-pcie3.c | 8 #include <linux/clk.h>
|
/linux-master/drivers/phy/qualcomm/ |
H A D | phy-qcom-qmp-combo.c | 6 #include <linux/clk.h> 7 #include <linux/clk-provider.h> 1491 struct clk *pipe_clk; 2195 clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); 2196 clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); 3000 * clk | +-------+ | +-----+ 3045 * for link clk, crypto clk |
|
H A D | phy-qcom-m31.c | 6 #include <linux/clk.h> 199 struct clk *clk; member in struct:m31usb_phy 217 ret = clk_prepare_enable(qphy->clk); 253 clk_disable_unprepare(qphy->clk); 285 qphy->clk = devm_clk_get(dev, NULL); 286 if (IS_ERR(qphy->clk)) 287 return dev_err_probe(dev, PTR_ERR(qphy->clk), 288 "failed to get clk\n");
|
/linux-master/drivers/phy/marvell/ |
H A D | phy-mvebu-a3700-comphy.c | 17 #include <linux/clk.h> 1247 struct clk *clk; local 1281 * Old DT bindings do not have xtal clk present. So do not fail here 1284 clk = clk_get(&pdev->dev, "xtal"); 1285 if (IS_ERR(clk)) { 1286 if (PTR_ERR(clk) == -EPROBE_DEFER) 1288 dev_warn(&pdev->dev, "missing 'xtal' clk (%ld)\n", 1289 PTR_ERR(clk)); 1291 ret = clk_prepare_enable(clk); [all...] |