Searched refs:MSR_RI (Results 1 - 25 of 34) sorted by last modified time

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/linux-master/arch/powerpc/kvm/
H A Dbook3s_pr.c244 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
H A Dbook3s_emulate.c302 new_msr &= ~(MSR_RI | MSR_EE);
303 new_msr |= rs_val & (MSR_RI | MSR_EE);
H A Dbook3s_hv_p9_entry.c693 __mtmsrd(msr & ~(MSR_IR|MSR_DR|MSR_RI), 0);
H A Dbook3s_64_entry.S401 * MSR_RI in r12 ([H]SRR1) so the handler won't try to return.
405 li r10,MSR_RI
H A Dtm.S109 li r2, MSR_RI
351 li r5, MSR_RI
H A Dbook3s_hv_rmhandlers.S78 li r0,MSR_RI
139 li r0, MSR_RI
1054 * interrupts are recoverable in principle, so set MSR_RI.
1058 li r0, MSR_RI
H A Dbookehv_interrupts.S93 ori r8, r8, MSR_ME | MSR_RI
110 ori r7, r7, MSR_ME | MSR_RI
/linux-master/arch/powerpc/kernel/
H A Dprocess.c1499 {MSR_RI, "RI"},
H A Dhead_book3s_32.S202 ori r0,r0,MSR_DR|MSR_IR|MSR_RI
1092 rlwinm r0, r6, 0, ~MSR_RI
1114 li r3, MSR_KERNEL & ~(MSR_IR | MSR_DR | MSR_RI)
H A Dmisc_64.S362 1: li r9,MSR_RI
H A Dhead_8xx.S697 li r12, MSR_KERNEL & ~(MSR_IR | MSR_DR | MSR_RI)
698 rlwinm r0, r10, 0, ~MSR_RI
H A Dtraps.c403 if (!(regs->msr & MSR_RI))
437 regs->msr &= ~MSR_RI;
H A Drtas.c725 BUG_ON(!(msr & MSR_RI));
H A Dinterrupt_64.S278 li r12,-1 /* Set MSR_EE and MSR_RI */
400 andi. r0,r5,MSR_RI
H A Dvector.S54 ori r5,r5,MSR_RI
138 li r5,MSR_RI
H A Dfpu.S98 ori r5,r5,MSR_FP|MSR_RI
H A Dexceptions-64s.S399 xori r10,r10,MSR_RI
402 xori r10,r10,MSR_RI
887 * - MSR_EE|MSR_RI is clear (no reentrant exceptions)
1064 * enable MSR_RI, then SLB or MCE will be able to recover, but a nested
1080 /* Clear MSR_RI before setting SRR0 and SRR1. */
1085 * MSR_RI is clear, now we can decrement paca->in_nmi.
1172 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1174 mtmsrd r9,1; /* Clear MSR_RI */ \
1273 andi. r11,r12,MSR_RI
1362 li r10,0 /* clear MSR_RI */
[all...]
H A Dentry_32.S218 andi. r10,r9,MSR_RI /* check for recoverable interrupt */
H A Dtm.S164 * At this point we can't take an SLB miss since we have MSR_RI
192 * clobbered by an exception once we turn on MSR_RI below.
205 li r11, MSR_RI
506 * At this point we can't take an SLB miss since we have MSR_RI
532 li r4, MSR_RI
H A Dhead_64.S155 ori r24,r24,MSR_RI
794 ori r3,r3,MSR_RI
982 ori r6,r6,MSR_RI
/linux-master/arch/powerpc/include/asm/
H A Dreg.h112 #define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */ macro
134 #define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_HV)
147 #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
H A Dptrace.h318 return unlikely(cpu_has_msr_ri() && !(regs->msr & MSR_RI));
324 regs_set_return_msr(regs, regs->msr | MSR_RI);
330 regs_set_return_msr(regs, regs->msr & ~MSR_RI);
/linux-master/arch/powerpc/lib/
H A Dsstep.c1763 /* only MSR_EE and MSR_RI get changed if bit 15 set */
3578 * such as an rfid, or a mtmsrd that would clear MSR_RI.
3644 if ((val & MSR_RI) == 0)
3645 /* can't step mtmsr[d] that would clear MSR_RI */
/linux-master/arch/powerpc/kexec/
H A Drelocate_32.S412 ori r8, r8, MSR_RI|MSR_ME
/linux-master/arch/powerpc/platforms/pseries/
H A Dras.c493 * so clear it. It will be missing MSR_RI so we won't try to recover.
496 (MSR_LE|MSR_RI|MSR_DR|MSR_IR|MSR_ME|MSR_PR|
787 /* If MSR_RI isn't set, we cannot recover */

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