Searched refs:AR_PHY (Results 1 - 25 of 31) sorted by last modified time

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/freebsd-11-stable/sys/dev/otus/
H A Dif_otusreg.h125 #define AR_PHY(reg) (AR_PHY_BASE + (reg) * 4) macro
361 /* NB: apply AR_PHY(). */
682 /* NB: apply AR_PHY(). */
H A Dif_otus.c2520 if (AR_PHY(ar5416_phy_regs[i]) == reg)
2632 otus_write(sc, AR_PHY(ar5416_phy_regs[i]), vals[i]);
2698 otus_write(sc, AR_PHY(44), data);
2701 otus_write(sc, AR_PHY(58), data);
2787 otus_write(sc, AR_PHY(ar5416_banks_regs[i]), vals[i]);
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_attach.c286 OS_REG_WRITE(ah, AR_PHY(0x36), 0x00007058);
288 OS_REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
289 val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
397 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
608 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_attach.c187 OS_REG_WRITE(ah, AR_PHY(0x34), 0x00001c16);
189 OS_REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
190 val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
398 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
507 OS_REG_WRITE(ah, AR_PHY(0), 0x00004007);
512 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
H A Dar2316.c149 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
152 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
H A Dar2317.c126 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
129 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
H A Dar2413.c141 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
144 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
H A Dar2425.c136 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
139 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
H A Dar5111.c180 OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff));
182 OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff));
H A Dar5112.c141 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
144 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
H A Dar5212_misc.c158 OS_REG_SET_BIT(ah, AR_PHY(0), 0x00002000);
335 nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff;
H A Dar5212_reset.c297 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
1303 int16_t nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff;
1448 val = OS_REG_READ(ah, AR_PHY(25));
1451 OS_REG_WRITE(ah, AR_PHY(25), val);
1469 OS_REG_WRITE(ah, AR_PHY(25), val);
1513 #define ANT_SWITCH_TABLE1 AR_PHY(88)
1514 #define ANT_SWITCH_TABLE2 AR_PHY(89)
1617 OS_REG_WRITE(_ah, AR_PHY(_reg), \
1618 (OS_REG_READ(_ah, AR_PHY(_reg)) & _mask) | (_val));
1659 OS_REG_WRITE(ah, AR_PHY(9
[all...]
H A Dar5212phy.h24 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) macro
H A Dar5413.c141 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
144 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
/freebsd-11-stable/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_misc.c405 nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff;
H A Dar9300_reset.c2984 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
H A Dar9300phy.h35 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) macro
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_reset.c222 OS_REG_WRITE(ah, AR_PHY(10),
223 (OS_REG_READ(ah, AR_PHY(10)) & 0xFFFF00FF) |
225 OS_REG_WRITE(ah, AR_PHY(13),
228 OS_REG_WRITE(ah, AR_PHY(17),
229 (OS_REG_READ(ah, AR_PHY(17)) & 0xFFFFC07F) |
231 OS_REG_WRITE(ah, AR_PHY(18),
232 (OS_REG_READ(ah, AR_PHY(18)) & 0xFFFC0FFF) |
234 OS_REG_WRITE(ah, AR_PHY(25),
235 (OS_REG_READ(ah, AR_PHY(25)) & 0xFFF80FFF) |
237 OS_REG_WRITE(ah, AR_PHY(6
[all...]
H A Dar5210_xmit.c189 OS_REG_WRITE(ah, AR_PHY(17),
190 (OS_REG_READ(ah, AR_PHY(17)) & ~0x7F) | 0x38);
206 OS_REG_WRITE(ah, AR_PHY(17),
207 (OS_REG_READ(ah, AR_PHY(17)) & ~0x7F) | 0x1C);
H A Dar5210phy.h28 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) macro
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_misc.c381 nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff;
H A Dar5211_reset.c814 OS_REG_WRITE(ah, AR_PHY(0x27), ((data2111 & 0xff) << 8) | (reg32 & 0xff));
816 OS_REG_WRITE(ah, AR_PHY(0x34), (data2111 & 0xff00) | (reg32 & 0xff));
827 nf = (OS_REG_READ(ah, AR_PHY(25)) >> 19) & 0x1ff;
847 OS_REG_WRITE(ah, AR_PHY(25),
848 (OS_REG_READ(ah, AR_PHY(25)) & ~0xFFF) |
1229 OS_REG_WRITE(ah, AR_PHY(68),
1230 (OS_REG_READ(ah, AR_PHY(68)) & 0xFFFFFFFC) | 0x3);
1232 OS_REG_WRITE(ah, AR_PHY(68),
1233 (OS_REG_READ(ah, AR_PHY(68)) & 0xFFFFFC06) |
H A Dar5211phy.h28 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) macro
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_attach.c184 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
216 OS_REG_WRITE(ah, AR_PHY(0), 0x00004007);
221 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
H A Dar5312_reset.c227 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);

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