1/* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19#include "opt_ah.h" 20 21#include "ah.h" 22#include "ah_internal.h" 23 24#include "ah_eeprom_v3.h" 25 26#include "ar5212/ar5212.h" 27#include "ar5212/ar5212reg.h" 28#include "ar5212/ar5212phy.h" 29 30#define AH_5212_5413 31#include "ar5212/ar5212.ini" 32 33#define N(a) (sizeof(a)/sizeof(a[0])) 34 35struct ar5413State { 36 RF_HAL_FUNCS base; /* public state, must be first */ 37 uint16_t pcdacTable[PWR_TABLE_SIZE_2413]; 38 39 uint32_t Bank1Data[N(ar5212Bank1_5413)]; 40 uint32_t Bank2Data[N(ar5212Bank2_5413)]; 41 uint32_t Bank3Data[N(ar5212Bank3_5413)]; 42 uint32_t Bank6Data[N(ar5212Bank6_5413)]; 43 uint32_t Bank7Data[N(ar5212Bank7_5413)]; 44 45 /* 46 * Private state for reduced stack usage. 47 */ 48 /* filled out Vpd table for all pdGains (chanL) */ 49 uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL] 50 [MAX_PWR_RANGE_IN_HALF_DB]; 51 /* filled out Vpd table for all pdGains (chanR) */ 52 uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL] 53 [MAX_PWR_RANGE_IN_HALF_DB]; 54 /* filled out Vpd table for all pdGains (interpolated) */ 55 uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL] 56 [MAX_PWR_RANGE_IN_HALF_DB]; 57}; 58#define AR5413(ah) ((struct ar5413State *) AH5212(ah)->ah_rfHal) 59 60extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 61 uint32_t numBits, uint32_t firstBit, uint32_t column); 62 63static void 64ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 65 int writes) 66{ 67 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes); 68 HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes); 69 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes); 70} 71 72/* 73 * Take the MHz channel value and set the Channel value 74 * 75 * ASSUMES: Writes enabled to analog bus 76 */ 77static HAL_BOOL 78ar5413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 79{ 80 uint16_t freq = ath_hal_gethwchannel(ah, chan); 81 uint32_t channelSel = 0; 82 uint32_t bModeSynth = 0; 83 uint32_t aModeRefSel = 0; 84 uint32_t reg32 = 0; 85 86 OS_MARK(ah, AH_MARK_SETCHANNEL, freq); 87 88 if (freq < 4800) { 89 uint32_t txctl; 90 91 if (((freq - 2192) % 5) == 0) { 92 channelSel = ((freq - 672) * 2 - 3040)/10; 93 bModeSynth = 0; 94 } else if (((freq - 2224) % 5) == 0) { 95 channelSel = ((freq - 704) * 2 - 3040) / 10; 96 bModeSynth = 1; 97 } else { 98 HALDEBUG(ah, HAL_DEBUG_ANY, 99 "%s: invalid channel %u MHz\n", 100 __func__, freq); 101 return AH_FALSE; 102 } 103 104 channelSel = (channelSel << 2) & 0xff; 105 channelSel = ath_hal_reverseBits(channelSel, 8); 106 107 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 108 if (freq == 2484) { 109 /* Enable channel spreading for channel 14 */ 110 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 111 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 112 } else { 113 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 114 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 115 } 116 } else if (((freq % 5) == 2) && (freq <= 5435)) { 117 freq = freq - 2; /* Align to even 5MHz raster */ 118 channelSel = ath_hal_reverseBits( 119 (uint32_t)(((freq - 4800)*10)/25 + 1), 8); 120 aModeRefSel = ath_hal_reverseBits(0, 2); 121 } else if ((freq % 20) == 0 && freq >= 5120) { 122 channelSel = ath_hal_reverseBits( 123 ((freq - 4800) / 20 << 2), 8); 124 aModeRefSel = ath_hal_reverseBits(1, 2); 125 } else if ((freq % 10) == 0) { 126 channelSel = ath_hal_reverseBits( 127 ((freq - 4800) / 10 << 1), 8); 128 aModeRefSel = ath_hal_reverseBits(1, 2); 129 } else if ((freq % 5) == 0) { 130 channelSel = ath_hal_reverseBits( 131 (freq - 4800) / 5, 8); 132 aModeRefSel = ath_hal_reverseBits(1, 2); 133 } else { 134 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 135 __func__, freq); 136 return AH_FALSE; 137 } 138 139 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 140 (1 << 12) | 0x1; 141 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 142 143 reg32 >>= 8; 144 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 145 146 AH_PRIVATE(ah)->ah_curchan = chan; 147 return AH_TRUE; 148} 149 150/* 151 * Reads EEPROM header info from device structure and programs 152 * all rf registers 153 * 154 * REQUIRES: Access to the analog rf device 155 */ 156static HAL_BOOL 157ar5413SetRfRegs(struct ath_hal *ah, 158 const struct ieee80211_channel *chan, 159 uint16_t modesIndex, uint16_t *rfXpdGain) 160{ 161#define RF_BANK_SETUP(_priv, _ix, _col) do { \ 162 int i; \ 163 for (i = 0; i < N(ar5212Bank##_ix##_5413); i++) \ 164 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\ 165} while (0) 166 struct ath_hal_5212 *ahp = AH5212(ah); 167 uint16_t freq = ath_hal_gethwchannel(ah, chan); 168 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 169 uint16_t ob5GHz = 0, db5GHz = 0; 170 uint16_t ob2GHz = 0, db2GHz = 0; 171 struct ar5413State *priv = AR5413(ah); 172 int regWrites = 0; 173 174 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", 175 __func__, chan->ic_freq, chan->ic_flags, modesIndex); 176 177 HALASSERT(priv != AH_NULL); 178 179 /* Setup rf parameters */ 180 switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) { 181 case IEEE80211_CHAN_A: 182 if (freq > 4000 && freq < 5260) { 183 ob5GHz = ee->ee_ob1; 184 db5GHz = ee->ee_db1; 185 } else if (freq >= 5260 && freq < 5500) { 186 ob5GHz = ee->ee_ob2; 187 db5GHz = ee->ee_db2; 188 } else if (freq >= 5500 && freq < 5725) { 189 ob5GHz = ee->ee_ob3; 190 db5GHz = ee->ee_db3; 191 } else if (freq >= 5725) { 192 ob5GHz = ee->ee_ob4; 193 db5GHz = ee->ee_db4; 194 } else { 195 /* XXX else */ 196 } 197 break; 198 case IEEE80211_CHAN_B: 199 ob2GHz = ee->ee_obFor24; 200 db2GHz = ee->ee_dbFor24; 201 break; 202 case IEEE80211_CHAN_G: 203 case IEEE80211_CHAN_PUREG: /* NB: really 108G */ 204 ob2GHz = ee->ee_obFor24g; 205 db2GHz = ee->ee_dbFor24g; 206 break; 207 default: 208 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 209 __func__, chan->ic_flags); 210 return AH_FALSE; 211 } 212 213 /* Bank 1 Write */ 214 RF_BANK_SETUP(priv, 1, 1); 215 216 /* Bank 2 Write */ 217 RF_BANK_SETUP(priv, 2, modesIndex); 218 219 /* Bank 3 Write */ 220 RF_BANK_SETUP(priv, 3, modesIndex); 221 222 /* Bank 6 Write */ 223 RF_BANK_SETUP(priv, 6, modesIndex); 224 225 /* Only the 5 or 2 GHz OB/DB need to be set for a mode */ 226 if (IEEE80211_IS_CHAN_2GHZ(chan)) { 227 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0); 228 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0); 229 230 /* TODO - only for Eagle 1.0 2GHz - remove for production */ 231 /* XXX: but without this bit G doesn't work. */ 232 ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2); 233 234 /* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */ 235 if (AH_PRIVATE(ah)->ah_ispcie) { 236 ar5212ModifyRfBuffer(priv->Bank6Data, ath_hal_reverseBits(6, 3), 237 3, 131, 3); 238 } 239 } else { 240 ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0); 241 ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0); 242 243 } 244 245 /* Bank 7 Setup */ 246 RF_BANK_SETUP(priv, 7, modesIndex); 247 248 /* Write Analog registers */ 249 HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites); 250 HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites); 251 HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites); 252 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites); 253 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites); 254 255 /* Now that we have reprogrammed rfgain value, clear the flag. */ 256 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 257 258 return AH_TRUE; 259#undef RF_BANK_SETUP 260} 261 262/* 263 * Return a reference to the requested RF Bank. 264 */ 265static uint32_t * 266ar5413GetRfBank(struct ath_hal *ah, int bank) 267{ 268 struct ar5413State *priv = AR5413(ah); 269 270 HALASSERT(priv != AH_NULL); 271 switch (bank) { 272 case 1: return priv->Bank1Data; 273 case 2: return priv->Bank2Data; 274 case 3: return priv->Bank3Data; 275 case 6: return priv->Bank6Data; 276 case 7: return priv->Bank7Data; 277 } 278 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 279 __func__, bank); 280 return AH_NULL; 281} 282 283/* 284 * Return indices surrounding the value in sorted integer lists. 285 * 286 * NB: the input list is assumed to be sorted in ascending order 287 */ 288static void 289GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 290 uint32_t *vlo, uint32_t *vhi) 291{ 292 int16_t target = v; 293 const uint16_t *ep = lp+listSize; 294 const uint16_t *tp; 295 296 /* 297 * Check first and last elements for out-of-bounds conditions. 298 */ 299 if (target < lp[0]) { 300 *vlo = *vhi = 0; 301 return; 302 } 303 if (target >= ep[-1]) { 304 *vlo = *vhi = listSize - 1; 305 return; 306 } 307 308 /* look for value being near or between 2 values in list */ 309 for (tp = lp; tp < ep; tp++) { 310 /* 311 * If value is close to the current value of the list 312 * then target is not between values, it is one of the values 313 */ 314 if (*tp == target) { 315 *vlo = *vhi = tp - (const uint16_t *) lp; 316 return; 317 } 318 /* 319 * Look for value being between current value and next value 320 * if so return these 2 values 321 */ 322 if (target < tp[1]) { 323 *vlo = tp - (const uint16_t *) lp; 324 *vhi = *vlo + 1; 325 return; 326 } 327 } 328} 329 330/* 331 * Fill the Vpdlist for indices Pmax-Pmin 332 */ 333static HAL_BOOL 334ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 335 const int16_t *pwrList, const uint16_t *VpdList, 336 uint16_t numIntercepts, 337 uint16_t retVpdList[][64]) 338{ 339 uint16_t ii, jj, kk; 340 int16_t currPwr = (int16_t)(2*Pmin); 341 /* since Pmin is pwr*2 and pwrList is 4*pwr */ 342 uint32_t idxL, idxR; 343 344 ii = 0; 345 jj = 0; 346 347 if (numIntercepts < 2) 348 return AH_FALSE; 349 350 while (ii <= (uint16_t)(Pmax - Pmin)) { 351 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList, 352 numIntercepts, &(idxL), &(idxR)); 353 if (idxR < 1) 354 idxR = 1; /* extrapolate below */ 355 if (idxL == (uint32_t)(numIntercepts - 1)) 356 idxL = numIntercepts - 2; /* extrapolate above */ 357 if (pwrList[idxL] == pwrList[idxR]) 358 kk = VpdList[idxL]; 359 else 360 kk = (uint16_t) 361 (((currPwr - pwrList[idxL])*VpdList[idxR]+ 362 (pwrList[idxR] - currPwr)*VpdList[idxL])/ 363 (pwrList[idxR] - pwrList[idxL])); 364 retVpdList[pdGainIdx][ii] = kk; 365 ii++; 366 currPwr += 2; /* half dB steps */ 367 } 368 369 return AH_TRUE; 370} 371 372/* 373 * Returns interpolated or the scaled up interpolated value 374 */ 375static int16_t 376interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 377 int16_t targetLeft, int16_t targetRight) 378{ 379 int16_t rv; 380 381 if (srcRight != srcLeft) { 382 rv = ((target - srcLeft)*targetRight + 383 (srcRight - target)*targetLeft) / (srcRight - srcLeft); 384 } else { 385 rv = targetLeft; 386 } 387 return rv; 388} 389 390/* 391 * Uses the data points read from EEPROM to reconstruct the pdadc power table 392 * Called by ar5413SetPowerTable() 393 */ 394static int 395ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 396 const RAW_DATA_STRUCT_2413 *pRawDataset, 397 uint16_t pdGainOverlap_t2, 398 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 399 uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 400{ 401 struct ar5413State *priv = AR5413(ah); 402#define VpdTable_L priv->vpdTable_L 403#define VpdTable_R priv->vpdTable_R 404#define VpdTable_I priv->vpdTable_I 405 uint32_t ii, jj, kk; 406 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 407 uint32_t idxL, idxR; 408 uint32_t numPdGainsUsed = 0; 409 /* 410 * If desired to support -ve power levels in future, just 411 * change pwr_I_0 to signed 5-bits. 412 */ 413 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 414 /* to accommodate -ve power levels later on. */ 415 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 416 /* to accommodate -ve power levels later on */ 417 uint16_t numVpd = 0; 418 uint16_t Vpd_step; 419 int16_t tmpVal ; 420 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 421 422 /* Get upper lower index */ 423 GetLowerUpperIndex(channel, pRawDataset->pChannels, 424 pRawDataset->numChannels, &(idxL), &(idxR)); 425 426 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 427 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 428 /* work backwards 'cause highest pdGain for lowest power */ 429 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 430 if (numVpd > 0) { 431 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 432 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 433 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 434 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 435 } 436 Pmin_t2[numPdGainsUsed] = (int16_t) 437 (Pmin_t2[numPdGainsUsed] / 2); 438 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 439 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 440 Pmax_t2[numPdGainsUsed] = 441 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 442 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 443 ar5413FillVpdTable( 444 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 445 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 446 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 447 ); 448 ar5413FillVpdTable( 449 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 450 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 451 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 452 ); 453 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 454 VpdTable_I[numPdGainsUsed][kk] = 455 interpolate_signed( 456 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 457 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 458 } 459 /* fill VpdTable_I for this pdGain */ 460 numPdGainsUsed++; 461 } 462 /* if this pdGain is used */ 463 } 464 465 *pMinCalPower = Pmin_t2[0]; 466 kk = 0; /* index for the final table */ 467 for (ii = 0; ii < numPdGainsUsed; ii++) { 468 if (ii == (numPdGainsUsed - 1)) 469 pPdGainBoundaries[ii] = Pmax_t2[ii] + 470 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 471 else 472 pPdGainBoundaries[ii] = (uint16_t) 473 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 474 if (pPdGainBoundaries[ii] > 63) { 475 HALDEBUG(ah, HAL_DEBUG_ANY, 476 "%s: clamp pPdGainBoundaries[%d] %d\n", 477 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/ 478 pPdGainBoundaries[ii] = 63; 479 } 480 481 /* Find starting index for this pdGain */ 482 if (ii == 0) 483 ss = 0; /* for the first pdGain, start from index 0 */ 484 else 485 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 486 pdGainOverlap_t2; 487 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 488 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 489 /* 490 *-ve ss indicates need to extrapolate data below for this pdGain 491 */ 492 while (ss < 0) { 493 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 494 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 495 ss++; 496 } 497 498 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 499 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 500 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 501 502 while (ss < (int16_t)maxIndex) 503 pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 504 505 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 506 VpdTable_I[ii][sizeCurrVpdTable-2]); 507 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 508 /* 509 * for last gain, pdGainBoundary == Pmax_t2, so will 510 * have to extrapolate 511 */ 512 if (tgtIndex > maxIndex) { /* need to extrapolate above */ 513 while(ss < (int16_t)tgtIndex) { 514 tmpVal = (uint16_t) 515 (VpdTable_I[ii][sizeCurrVpdTable-1] + 516 (ss-maxIndex)*Vpd_step); 517 pPDADCValues[kk++] = (tmpVal > 127) ? 518 127 : tmpVal; 519 ss++; 520 } 521 } /* extrapolated above */ 522 } /* for all pdGainUsed */ 523 524 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 525 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 526 ii++; 527 } 528 while (kk < 128) { 529 pPDADCValues[kk] = pPDADCValues[kk-1]; 530 kk++; 531 } 532 533 return numPdGainsUsed; 534#undef VpdTable_L 535#undef VpdTable_R 536#undef VpdTable_I 537} 538 539static HAL_BOOL 540ar5413SetPowerTable(struct ath_hal *ah, 541 int16_t *minPower, int16_t *maxPower, 542 const struct ieee80211_channel *chan, 543 uint16_t *rfXpdGain) 544{ 545 struct ath_hal_5212 *ahp = AH5212(ah); 546 uint16_t freq = ath_hal_gethwchannel(ah, chan); 547 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 548 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 549 uint16_t pdGainOverlap_t2; 550 int16_t minCalPower5413_t2; 551 uint16_t *pdadcValues = ahp->ah_pcdacTable; 552 uint16_t gainBoundaries[4]; 553 uint32_t reg32, regoffset; 554 int i, numPdGainsUsed; 555#ifndef AH_USE_INIPDGAIN 556 uint32_t tpcrg1; 557#endif 558 559 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", 560 __func__, chan->ic_freq, chan->ic_flags); 561 562 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 563 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 564 else if (IEEE80211_IS_CHAN_B(chan)) 565 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 566 else { 567 HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan)); 568 pRawDataset = &ee->ee_rawDataset2413[headerInfo11A]; 569 } 570 571 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 572 AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 573 574 numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah, 575 freq, pRawDataset, pdGainOverlap_t2, 576 &minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues); 577 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3); 578 579#ifdef AH_USE_INIPDGAIN 580 /* 581 * Use pd_gains curve from eeprom; Atheros always uses 582 * the default curve from the ini file but some vendors 583 * (e.g. Zcomax) want to override this curve and not 584 * honoring their settings results in tx power 5dBm low. 585 */ 586 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 587 (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 588#else 589 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1); 590 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN) 591 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN); 592 switch (numPdGainsUsed) { 593 case 3: 594 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3; 595 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3); 596 /* fall thru... */ 597 case 2: 598 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2; 599 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2); 600 /* fall thru... */ 601 case 1: 602 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1; 603 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1); 604 break; 605 } 606#ifdef AH_DEBUG 607 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1)) 608 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default " 609 "pd_gains (default 0x%x, calculated 0x%x)\n", 610 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1); 611#endif 612 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1); 613#endif 614 615 /* 616 * Note the pdadc table may not start at 0 dBm power, could be 617 * negative or greater than 0. Need to offset the power 618 * values by the amount of minPower for griffin 619 */ 620 if (minCalPower5413_t2 != 0) 621 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2); 622 else 623 ahp->ah_txPowerIndexOffset = 0; 624 625 /* Finally, write the power values into the baseband power table */ 626 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 627 for (i = 0; i < 32; i++) { 628 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 629 ((pdadcValues[4*i + 1] & 0xFF) << 8) | 630 ((pdadcValues[4*i + 2] & 0xFF) << 16) | 631 ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 632 OS_REG_WRITE(ah, regoffset, reg32); 633 regoffset += 4; 634 } 635 636 OS_REG_WRITE(ah, AR_PHY_TPCRG5, 637 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 638 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 639 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 640 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 641 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 642 643 return AH_TRUE; 644} 645 646static int16_t 647ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 648{ 649 uint32_t ii,jj; 650 uint16_t Pmin=0,numVpd; 651 652 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 653 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 654 /* work backwards 'cause highest pdGain for lowest power */ 655 numVpd = data->pDataPerPDGain[jj].numVpd; 656 if (numVpd > 0) { 657 Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 658 return(Pmin); 659 } 660 } 661 return(Pmin); 662} 663 664static int16_t 665ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 666{ 667 uint32_t ii; 668 uint16_t Pmax=0,numVpd; 669 670 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 671 /* work forwards cuase lowest pdGain for highest power */ 672 numVpd = data->pDataPerPDGain[ii].numVpd; 673 if (numVpd > 0) { 674 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 675 return(Pmax); 676 } 677 } 678 return(Pmax); 679} 680 681static HAL_BOOL 682ar5413GetChannelMaxMinPower(struct ath_hal *ah, 683 const struct ieee80211_channel *chan, 684 int16_t *maxPow, int16_t *minPow) 685{ 686 uint16_t freq = chan->ic_freq; /* NB: never mapped */ 687 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 688 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 689 const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL; 690 uint16_t numChannels; 691 int totalD,totalF, totalMin,last, i; 692 693 *maxPow = 0; 694 695 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 696 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 697 else if (IEEE80211_IS_CHAN_B(chan)) 698 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 699 else { 700 HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan)); 701 pRawDataset = &ee->ee_rawDataset2413[headerInfo11A]; 702 } 703 704 numChannels = pRawDataset->numChannels; 705 data = pRawDataset->pDataPerChannel; 706 707 /* Make sure the channel is in the range of the TP values 708 * (freq piers) 709 */ 710 if (numChannels < 1) 711 return(AH_FALSE); 712 713 if ((freq < data[0].channelValue) || 714 (freq > data[numChannels-1].channelValue)) { 715 if (freq < data[0].channelValue) { 716 *maxPow = ar5413GetMaxPower(ah, &data[0]); 717 *minPow = ar5413GetMinPower(ah, &data[0]); 718 return(AH_TRUE); 719 } else { 720 *maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]); 721 *minPow = ar5413GetMinPower(ah, &data[numChannels - 1]); 722 return(AH_TRUE); 723 } 724 } 725 726 /* Linearly interpolate the power value now */ 727 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); 728 last = i++); 729 totalD = data[i].channelValue - data[last].channelValue; 730 if (totalD > 0) { 731 totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]); 732 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + 733 ar5413GetMaxPower(ah, &data[last])*totalD)/totalD); 734 totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]); 735 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + 736 ar5413GetMinPower(ah, &data[last])*totalD)/totalD); 737 return(AH_TRUE); 738 } else { 739 if (freq == data[i].channelValue) { 740 *maxPow = ar5413GetMaxPower(ah, &data[i]); 741 *minPow = ar5413GetMinPower(ah, &data[i]); 742 return(AH_TRUE); 743 } else 744 return(AH_FALSE); 745 } 746} 747 748/* 749 * Free memory for analog bank scratch buffers 750 */ 751static void 752ar5413RfDetach(struct ath_hal *ah) 753{ 754 struct ath_hal_5212 *ahp = AH5212(ah); 755 756 HALASSERT(ahp->ah_rfHal != AH_NULL); 757 ath_hal_free(ahp->ah_rfHal); 758 ahp->ah_rfHal = AH_NULL; 759} 760 761/* 762 * Allocate memory for analog bank scratch buffers 763 * Scratch Buffer will be reinitialized every reset so no need to zero now 764 */ 765static HAL_BOOL 766ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status) 767{ 768 struct ath_hal_5212 *ahp = AH5212(ah); 769 struct ar5413State *priv; 770 771 HALASSERT(ah->ah_magic == AR5212_MAGIC); 772 773 HALASSERT(ahp->ah_rfHal == AH_NULL); 774 priv = ath_hal_malloc(sizeof(struct ar5413State)); 775 if (priv == AH_NULL) { 776 HALDEBUG(ah, HAL_DEBUG_ANY, 777 "%s: cannot allocate private state\n", __func__); 778 *status = HAL_ENOMEM; /* XXX */ 779 return AH_FALSE; 780 } 781 priv->base.rfDetach = ar5413RfDetach; 782 priv->base.writeRegs = ar5413WriteRegs; 783 priv->base.getRfBank = ar5413GetRfBank; 784 priv->base.setChannel = ar5413SetChannel; 785 priv->base.setRfRegs = ar5413SetRfRegs; 786 priv->base.setPowerTable = ar5413SetPowerTable; 787 priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower; 788 priv->base.getNfAdjust = ar5212GetNfAdjust; 789 790 ahp->ah_pcdacTable = priv->pcdacTable; 791 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 792 ahp->ah_rfHal = &priv->base; 793 794 return AH_TRUE; 795} 796 797static HAL_BOOL 798ar5413Probe(struct ath_hal *ah) 799{ 800 return IS_5413(ah); 801} 802AH_RF(RF5413, ar5413Probe, ar5413RfAttach); 803